TargetMachine.h revision 50cdabcfd52e88381ade61450d98a1c757195bef
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the TargetMachine and LLVMTargetMachine classes.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGET_TARGETMACHINE_H
15#define LLVM_TARGET_TARGETMACHINE_H
16
17#include "llvm/Target/TargetInstrItineraries.h"
18#include <cassert>
19#include <string>
20
21namespace llvm {
22
23class TargetAsmInfo;
24class TargetData;
25class TargetSubtarget;
26class TargetInstrInfo;
27class TargetInstrDescriptor;
28class TargetJITInfo;
29class TargetLowering;
30class TargetFrameInfo;
31class MachineCodeEmitter;
32class MRegisterInfo;
33class Module;
34class FunctionPassManager;
35class PassManager;
36class Pass;
37class TargetMachOWriterInfo;
38class TargetELFWriterInfo;
39
40// Relocation model types.
41namespace Reloc {
42  enum Model {
43    Default,
44    Static,
45    PIC_,         // Cannot be named PIC due to collision with -DPIC
46    DynamicNoPIC
47  };
48}
49
50// Code model types.
51namespace CodeModel {
52  enum Model {
53    Default,
54    Small,
55    Kernel,
56    Medium,
57    Large
58  };
59}
60
61namespace FileModel {
62  enum Model {
63    Error,
64    None,
65    AsmFile,
66    MachOFile,
67    ElfFile
68  };
69}
70
71//===----------------------------------------------------------------------===//
72///
73/// TargetMachine - Primary interface to the complete machine description for
74/// the target machine.  All target-specific information should be accessible
75/// through this interface.
76///
77class TargetMachine {
78  TargetMachine(const TargetMachine &);   // DO NOT IMPLEMENT
79  void operator=(const TargetMachine &);  // DO NOT IMPLEMENT
80protected: // Can only create subclasses.
81  TargetMachine() : AsmInfo(NULL) { }
82
83  /// getSubtargetImpl - virtual method implemented by subclasses that returns
84  /// a reference to that target's TargetSubtarget-derived member variable.
85  virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
86
87  /// AsmInfo - Contains target specific asm information.
88  ///
89  mutable const TargetAsmInfo *AsmInfo;
90
91  /// createTargetAsmInfo - Create a new instance of target specific asm
92  /// information.
93  virtual const TargetAsmInfo *createTargetAsmInfo() const { return NULL; }
94
95public:
96  virtual ~TargetMachine();
97
98  /// getModuleMatchQuality - This static method should be implemented by
99  /// targets to indicate how closely they match the specified module.  This is
100  /// used by the LLC tool to determine which target to use when an explicit
101  /// -march option is not specified.  If a target returns zero, it will never
102  /// be chosen without an explicit -march option.
103  static unsigned getModuleMatchQuality(const Module &M) { return 0; }
104
105  /// getJITMatchQuality - This static method should be implemented by targets
106  /// that provide JIT capabilities to indicate how suitable they are for
107  /// execution on the current host.  If a value of 0 is returned, the target
108  /// will not be used unless an explicit -march option is used.
109  static unsigned getJITMatchQuality() { return 0; }
110
111  // Interfaces to the major aspects of target machine information:
112  // -- Instruction opcode and operand information
113  // -- Pipelines and scheduling information
114  // -- Stack frame information
115  // -- Selection DAG lowering information
116  //
117  virtual const TargetInstrInfo        *getInstrInfo() const { return 0; }
118  virtual const TargetFrameInfo        *getFrameInfo() const { return 0; }
119  virtual       TargetLowering    *getTargetLowering() const { return 0; }
120  virtual const TargetData            *getTargetData() const { return 0; }
121
122
123  /// getTargetAsmInfo - Return target specific asm information.
124  ///
125  const TargetAsmInfo *getTargetAsmInfo() const {
126    if (!AsmInfo) AsmInfo = createTargetAsmInfo();
127    return AsmInfo;
128  }
129
130  /// getSubtarget - This method returns a pointer to the specified type of
131  /// TargetSubtarget.  In debug builds, it verifies that the object being
132  /// returned is of the correct type.
133  template<typename STC> const STC &getSubtarget() const {
134    const TargetSubtarget *TST = getSubtargetImpl();
135    assert(TST && dynamic_cast<const STC*>(TST) &&
136           "Not the right kind of subtarget!");
137    return *static_cast<const STC*>(TST);
138  }
139
140  /// getRegisterInfo - If register information is available, return it.  If
141  /// not, return null.  This is kept separate from RegInfo until RegInfo has
142  /// details of graph coloring register allocation removed from it.
143  ///
144  virtual const MRegisterInfo *getRegisterInfo() const { return 0; }
145
146  /// getJITInfo - If this target supports a JIT, return information for it,
147  /// otherwise return null.
148  ///
149  virtual TargetJITInfo *getJITInfo() { return 0; }
150
151  /// getInstrItineraryData - Returns instruction itinerary data for the target
152  /// or specific subtarget.
153  ///
154  virtual const InstrItineraryData getInstrItineraryData() const {
155    return InstrItineraryData();
156  }
157
158  /// getMachOWriterInfo - If this target supports a Mach-O writer, return
159  /// information for it, otherwise return null.
160  ///
161  virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
162
163  /// getELFWriterInfo - If this target supports an ELF writer, return
164  /// information for it, otherwise return null.
165  ///
166  virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
167
168  /// getRelocationModel - Returns the code generation relocation model. The
169  /// choices are static, PIC, and dynamic-no-pic, and target default.
170  static Reloc::Model getRelocationModel();
171
172  /// setRelocationModel - Sets the code generation relocation model.
173  static void setRelocationModel(Reloc::Model Model);
174
175  /// getCodeModel - Returns the code model. The choices are small, kernel,
176  /// medium, large, and target default.
177  static CodeModel::Model getCodeModel();
178
179  /// setCodeModel - Sets the code model.
180  static void setCodeModel(CodeModel::Model Model);
181
182  /// CodeGenFileType - These enums are meant to be passed into
183  /// addPassesToEmitFile to indicate what type of file to emit.
184  enum CodeGenFileType {
185    AssemblyFile, ObjectFile, DynamicLibrary
186  };
187
188  /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
189  /// on this target.  User flag overrides.
190  virtual bool getEnableTailMergeDefault() const { return true; }
191
192  /// addPassesToEmitFile - Add passes to the specified pass manager to get the
193  /// specified file emitted.  Typically this will involve several steps of code
194  /// generation.  If Fast is set to true, the code generator should emit code
195  /// as fast as possible, though the generated code may be less efficient.
196  /// This method should return FileModel::Error if emission of this file type
197  /// is not supported.
198  ///
199  virtual FileModel::Model addPassesToEmitFile(FunctionPassManager &PM,
200                                               std::ostream &Out,
201                                               CodeGenFileType FileType,
202                                               bool Fast) {
203    return FileModel::None;
204  }
205
206  /// addPassesToEmitFileFinish - If the passes to emit the specified file had
207  /// to be split up (e.g., to add an object writer pass), this method can be
208  /// used to finish up adding passes to emit the file, if necessary.
209  ///
210  virtual bool addPassesToEmitFileFinish(FunctionPassManager &PM,
211                                         MachineCodeEmitter *MCE, bool Fast) {
212    return true;
213  }
214
215  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
216  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
217  /// actually outputting the machine code and resolving things like the address
218  /// of functions.  This method returns true if machine code emission is
219  /// not supported.
220  ///
221  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
222                                          MachineCodeEmitter &MCE, bool Fast) {
223    return true;
224  }
225
226  /// addPassesToEmitWholeFile - This method can be implemented by targets that
227  /// require having the entire module at once.  This is not recommended, do not
228  /// use this.
229  virtual bool WantsWholeFile() const { return false; }
230  virtual bool addPassesToEmitWholeFile(PassManager &PM, std::ostream &Out,
231                                        CodeGenFileType FileType, bool Fast) {
232    return true;
233  }
234};
235
236/// LLVMTargetMachine - This class describes a target machine that is
237/// implemented with the LLVM target-independent code generator.
238///
239class LLVMTargetMachine : public TargetMachine {
240protected: // Can only create subclasses.
241    LLVMTargetMachine() { }
242public:
243
244  /// addPassesToEmitFile - Add passes to the specified pass manager to get the
245  /// specified file emitted.  Typically this will involve several steps of code
246  /// generation.  If Fast is set to true, the code generator should emit code
247  /// as fast as possible, though the generated code may be less efficient.
248  /// This method should return FileModel::Error if emission of this file type
249  /// is not supported.
250  ///
251  /// The default implementation of this method adds components from the
252  /// LLVM retargetable code generator, invoking the methods below to get
253  /// target-specific passes in standard locations.
254  ///
255  virtual FileModel::Model addPassesToEmitFile(FunctionPassManager &PM,
256                                               std::ostream &Out,
257                                               CodeGenFileType FileType,
258                                               bool Fast);
259
260  /// addPassesToEmitFileFinish - If the passes to emit the specified file had
261  /// to be split up (e.g., to add an object writer pass), this method can be
262  /// used to finish up adding passes to emit the file, if necessary.
263  ///
264  virtual bool addPassesToEmitFileFinish(FunctionPassManager &PM,
265                                         MachineCodeEmitter *MCE, bool Fast);
266
267  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
268  /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
269  /// actually outputting the machine code and resolving things like the address
270  /// of functions.  This method returns true if machine code emission is
271  /// not supported.
272  ///
273  virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
274                                          MachineCodeEmitter &MCE, bool Fast);
275
276  /// Target-Independent Code Generator Pass Configuration Options.
277
278  /// addInstSelector - This method should add any "last minute" LLVM->LLVM
279  /// passes, then install an instruction selector pass, which converts from
280  /// LLVM code to machine instructions.
281  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast) {
282    return true;
283  }
284
285  /// addPostRegAllocPasses - This method may be implemented by targets that
286  /// want to run passes after register allocation but before prolog-epilog
287  /// insertion.  This should return true if -print-machineinstrs should print
288  /// after these passes.
289  virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
290    return false;
291  }
292
293  /// addPreEmitPass - This pass may be implemented by targets that want to run
294  /// passes immediately before machine code is emitted.  This should return
295  /// true if -print-machineinstrs should print out the code after the passes.
296  virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast) {
297    return false;
298  }
299
300
301  /// addAssemblyEmitter - This pass should be overridden by the target to add
302  /// the asmprinter, if asm emission is supported.  If this is not supported,
303  /// 'true' should be returned.
304  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
305                                  std::ostream &Out) {
306    return true;
307  }
308
309  /// addCodeEmitter - This pass should be overridden by the target to add a
310  /// code emitter, if supported.  If this is not supported, 'true' should be
311  /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
312  virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast, bool DumpAsm,
313                              MachineCodeEmitter &MCE) {
314    return true;
315  }
316
317  /// addSimpleCodeEmitter - This pass should be overridden by the target to add
318  /// a code emitter (without setting flags), if supported.  If this is not
319  /// supported, 'true' should be returned.  If DumpAsm is true, the generated
320  /// assembly is printed to cerr.
321  virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
322                                    bool DumpAsm, MachineCodeEmitter &MCE) {
323    return true;
324  }
325
326  /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
327  /// on this target.  User flag overrides.
328  virtual bool getEnableTailMergeDefault() const { return true; }
329};
330
331} // End llvm namespace
332
333#endif
334