TargetMachine.h revision 51b198af83cb0080c2709b04c129a3d774c07765
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the TargetMachine and LLVMTargetMachine classes. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_TARGET_TARGETMACHINE_H 15#define LLVM_TARGET_TARGETMACHINE_H 16 17#include "llvm/Target/TargetInstrItineraries.h" 18#include <cassert> 19 20namespace llvm { 21 22class Target; 23class TargetAsmInfo; 24class TargetData; 25class TargetSubtarget; 26class TargetInstrInfo; 27class TargetIntrinsicInfo; 28class TargetJITInfo; 29class TargetLowering; 30class TargetFrameInfo; 31class MachineCodeEmitter; 32class JITCodeEmitter; 33class ObjectCodeEmitter; 34class TargetRegisterInfo; 35class Module; 36class PassManagerBase; 37class PassManager; 38class Pass; 39class TargetMachOWriterInfo; 40class TargetELFWriterInfo; 41class formatted_raw_ostream; 42 43// Relocation model types. 44namespace Reloc { 45 enum Model { 46 Default, 47 Static, 48 PIC_, // Cannot be named PIC due to collision with -DPIC 49 DynamicNoPIC 50 }; 51} 52 53// Code model types. 54namespace CodeModel { 55 enum Model { 56 Default, 57 Small, 58 Kernel, 59 Medium, 60 Large 61 }; 62} 63 64namespace FileModel { 65 enum Model { 66 Error, 67 None, 68 AsmFile, 69 MachOFile, 70 ElfFile 71 }; 72} 73 74// Code generation optimization level. 75namespace CodeGenOpt { 76 enum Level { 77 Default, 78 None, 79 Aggressive 80 }; 81} 82 83 84// Possible float ABI settings. Used with FloatABIType in TargetOptions.h. 85namespace FloatABI { 86 enum ABIType { 87 Default, // Target-specific (either soft of hard depending on triple, etc). 88 Soft, // Soft float. 89 Hard // Hard float. 90 }; 91} 92 93//===----------------------------------------------------------------------===// 94/// 95/// TargetMachine - Primary interface to the complete machine description for 96/// the target machine. All target-specific information should be accessible 97/// through this interface. 98/// 99class TargetMachine { 100 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT 101 void operator=(const TargetMachine &); // DO NOT IMPLEMENT 102protected: // Can only create subclasses. 103 TargetMachine(const Target &); 104 105 /// getSubtargetImpl - virtual method implemented by subclasses that returns 106 /// a reference to that target's TargetSubtarget-derived member variable. 107 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; } 108 109 /// TheTarget - The Target that this machine was created for. 110 const Target &TheTarget; 111 112 /// AsmInfo - Contains target specific asm information. 113 /// 114 mutable const TargetAsmInfo *AsmInfo; 115 116 /// createTargetAsmInfo - Create a new instance of target specific asm 117 /// information. 118 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; } 119 120public: 121 virtual ~TargetMachine(); 122 123 const Target &getTarget() const { return TheTarget; } 124 125 // Interfaces to the major aspects of target machine information: 126 // -- Instruction opcode and operand information 127 // -- Pipelines and scheduling information 128 // -- Stack frame information 129 // -- Selection DAG lowering information 130 // 131 virtual const TargetInstrInfo *getInstrInfo() const { return 0; } 132 virtual const TargetFrameInfo *getFrameInfo() const { return 0; } 133 virtual TargetLowering *getTargetLowering() const { return 0; } 134 virtual const TargetData *getTargetData() const { return 0; } 135 136 /// getTargetAsmInfo - Return target specific asm information. 137 /// 138 const TargetAsmInfo *getTargetAsmInfo() const { 139 if (!AsmInfo) AsmInfo = createTargetAsmInfo(); 140 return AsmInfo; 141 } 142 143 /// getSubtarget - This method returns a pointer to the specified type of 144 /// TargetSubtarget. In debug builds, it verifies that the object being 145 /// returned is of the correct type. 146 template<typename STC> const STC &getSubtarget() const { 147 const TargetSubtarget *TST = getSubtargetImpl(); 148 assert(TST && dynamic_cast<const STC*>(TST) && 149 "Not the right kind of subtarget!"); 150 return *static_cast<const STC*>(TST); 151 } 152 153 /// getRegisterInfo - If register information is available, return it. If 154 /// not, return null. This is kept separate from RegInfo until RegInfo has 155 /// details of graph coloring register allocation removed from it. 156 /// 157 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; } 158 159 /// getIntrinsicInfo - If intrinsic information is available, return it. If 160 /// not, return null. 161 /// 162 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; } 163 164 /// getJITInfo - If this target supports a JIT, return information for it, 165 /// otherwise return null. 166 /// 167 virtual TargetJITInfo *getJITInfo() { return 0; } 168 169 /// getInstrItineraryData - Returns instruction itinerary data for the target 170 /// or specific subtarget. 171 /// 172 virtual const InstrItineraryData getInstrItineraryData() const { 173 return InstrItineraryData(); 174 } 175 176 /// getMachOWriterInfo - If this target supports a Mach-O writer, return 177 /// information for it, otherwise return null. 178 /// 179 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; } 180 181 /// getELFWriterInfo - If this target supports an ELF writer, return 182 /// information for it, otherwise return null. 183 /// 184 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; } 185 186 /// getRelocationModel - Returns the code generation relocation model. The 187 /// choices are static, PIC, and dynamic-no-pic, and target default. 188 static Reloc::Model getRelocationModel(); 189 190 /// setRelocationModel - Sets the code generation relocation model. 191 /// 192 static void setRelocationModel(Reloc::Model Model); 193 194 /// getCodeModel - Returns the code model. The choices are small, kernel, 195 /// medium, large, and target default. 196 static CodeModel::Model getCodeModel(); 197 198 /// setCodeModel - Sets the code model. 199 /// 200 static void setCodeModel(CodeModel::Model Model); 201 202 /// getAsmVerbosityDefault - Returns the default value of asm verbosity. 203 /// 204 static bool getAsmVerbosityDefault(); 205 206 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default 207 /// is false. 208 static void setAsmVerbosityDefault(bool); 209 210 /// CodeGenFileType - These enums are meant to be passed into 211 /// addPassesToEmitFile to indicate what type of file to emit. 212 enum CodeGenFileType { 213 AssemblyFile, ObjectFile, DynamicLibrary 214 }; 215 216 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 217 /// on this target. User flag overrides. 218 virtual bool getEnableTailMergeDefault() const { return true; } 219 220 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 221 /// specified file emitted. Typically this will involve several steps of code 222 /// generation. If Fast is set to true, the code generator should emit code 223 /// as fast as possible, though the generated code may be less efficient. 224 /// This method should return FileModel::Error if emission of this file type 225 /// is not supported. 226 /// 227 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &, 228 formatted_raw_ostream &, 229 CodeGenFileType, 230 CodeGenOpt::Level) { 231 return FileModel::None; 232 } 233 234 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 235 /// to be split up (e.g., to add an object writer pass), this method can be 236 /// used to finish up adding passes to emit the file, if necessary. 237 /// 238 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 239 MachineCodeEmitter *, 240 CodeGenOpt::Level) { 241 return true; 242 } 243 244 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 245 /// to be split up (e.g., to add an object writer pass), this method can be 246 /// used to finish up adding passes to emit the file, if necessary. 247 /// 248 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 249 JITCodeEmitter *, 250 CodeGenOpt::Level) { 251 return true; 252 } 253 254 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 255 /// to be split up (e.g., to add an object writer pass), this method can be 256 /// used to finish up adding passes to emit the file, if necessary. 257 /// 258 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 259 ObjectCodeEmitter *, 260 CodeGenOpt::Level) { 261 return true; 262 } 263 264 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 265 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 266 /// actually outputting the machine code and resolving things like the address 267 /// of functions. This method returns true if machine code emission is 268 /// not supported. 269 /// 270 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 271 MachineCodeEmitter &, 272 CodeGenOpt::Level) { 273 return true; 274 } 275 276 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 277 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 278 /// actually outputting the machine code and resolving things like the address 279 /// of functions. This method returns true if machine code emission is 280 /// not supported. 281 /// 282 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 283 JITCodeEmitter &, 284 CodeGenOpt::Level) { 285 return true; 286 } 287 288 /// addPassesToEmitWholeFile - This method can be implemented by targets that 289 /// require having the entire module at once. This is not recommended, do not 290 /// use this. 291 virtual bool WantsWholeFile() const { return false; } 292 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &, 293 CodeGenFileType, 294 CodeGenOpt::Level) { 295 return true; 296 } 297}; 298 299/// LLVMTargetMachine - This class describes a target machine that is 300/// implemented with the LLVM target-independent code generator. 301/// 302class LLVMTargetMachine : public TargetMachine { 303protected: // Can only create subclasses. 304 LLVMTargetMachine(const Target &T) : TargetMachine(T) { } 305 306 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for 307 /// both emitting to assembly files or machine code output. 308 /// 309 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level); 310 311public: 312 313 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 314 /// specified file emitted. Typically this will involve several steps of code 315 /// generation. If OptLevel is None, the code generator should emit code as fast 316 /// as possible, though the generated code may be less efficient. This method 317 /// should return FileModel::Error if emission of this file type is not 318 /// supported. 319 /// 320 /// The default implementation of this method adds components from the 321 /// LLVM retargetable code generator, invoking the methods below to get 322 /// target-specific passes in standard locations. 323 /// 324 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM, 325 formatted_raw_ostream &Out, 326 CodeGenFileType FileType, 327 CodeGenOpt::Level); 328 329 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 330 /// to be split up (e.g., to add an object writer pass), this method can be 331 /// used to finish up adding passes to emit the file, if necessary. 332 /// 333 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 334 MachineCodeEmitter *MCE, 335 CodeGenOpt::Level); 336 337 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 338 /// to be split up (e.g., to add an object writer pass), this method can be 339 /// used to finish up adding passes to emit the file, if necessary. 340 /// 341 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 342 JITCodeEmitter *JCE, 343 CodeGenOpt::Level); 344 345 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 346 /// to be split up (e.g., to add an object writer pass), this method can be 347 /// used to finish up adding passes to emit the file, if necessary. 348 /// 349 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 350 ObjectCodeEmitter *OCE, 351 CodeGenOpt::Level); 352 353 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 354 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 355 /// actually outputting the machine code and resolving things like the address 356 /// of functions. This method returns true if machine code emission is 357 /// not supported. 358 /// 359 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 360 MachineCodeEmitter &MCE, 361 CodeGenOpt::Level); 362 363 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 364 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 365 /// actually outputting the machine code and resolving things like the address 366 /// of functions. This method returns true if machine code emission is 367 /// not supported. 368 /// 369 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 370 JITCodeEmitter &MCE, 371 CodeGenOpt::Level); 372 373 /// Target-Independent Code Generator Pass Configuration Options. 374 375 /// addInstSelector - This method should add any "last minute" LLVM->LLVM 376 /// passes, then install an instruction selector pass, which converts from 377 /// LLVM code to machine instructions. 378 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) { 379 return true; 380 } 381 382 /// addPreRegAllocPasses - This method may be implemented by targets that want 383 /// to run passes immediately before register allocation. This should return 384 /// true if -print-machineinstrs should print after these passes. 385 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 386 return false; 387 } 388 389 /// addPostRegAllocPasses - This method may be implemented by targets that 390 /// want to run passes after register allocation but before prolog-epilog 391 /// insertion. This should return true if -print-machineinstrs should print 392 /// after these passes. 393 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 394 return false; 395 } 396 397 /// addPreEmitPass - This pass may be implemented by targets that want to run 398 /// passes immediately before machine code is emitted. This should return 399 /// true if -print-machineinstrs should print out the code after the passes. 400 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) { 401 return false; 402 } 403 404 405 /// addAssemblyEmitter - This pass should be overridden by the target to add 406 /// the asmprinter, if asm emission is supported. If this is not supported, 407 /// 'true' should be returned. 408 virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level, 409 bool /* VerboseAsmDefault */, 410 formatted_raw_ostream &) { 411 return true; 412 } 413 414 /// addCodeEmitter - This pass should be overridden by the target to add a 415 /// code emitter, if supported. If this is not supported, 'true' should be 416 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 417 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 418 bool /*DumpAsm*/, MachineCodeEmitter &) { 419 return true; 420 } 421 422 /// addCodeEmitter - This pass should be overridden by the target to add a 423 /// code emitter, if supported. If this is not supported, 'true' should be 424 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 425 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 426 bool /*DumpAsm*/, JITCodeEmitter &) { 427 return true; 428 } 429 430 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 431 /// a code emitter (without setting flags), if supported. If this is not 432 /// supported, 'true' should be returned. If DumpAsm is true, the generated 433 /// assembly is printed to cerr. 434 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 435 bool /*DumpAsm*/, MachineCodeEmitter &) { 436 return true; 437 } 438 439 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 440 /// a code emitter (without setting flags), if supported. If this is not 441 /// supported, 'true' should be returned. If DumpAsm is true, the generated 442 /// assembly is printed to cerr. 443 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 444 bool /*DumpAsm*/, JITCodeEmitter &) { 445 return true; 446 } 447 448 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 449 /// a code emitter (without setting flags), if supported. If this is not 450 /// supported, 'true' should be returned. If DumpAsm is true, the generated 451 /// assembly is printed to cerr. 452 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 453 bool /*DumpAsm*/, ObjectCodeEmitter &) { 454 return true; 455 } 456 457 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 458 /// on this target. User flag overrides. 459 virtual bool getEnableTailMergeDefault() const { return true; } 460}; 461 462} // End llvm namespace 463 464#endif 465