TargetMachine.h revision 71847813bc419f7a0667468136a07429c6d9f164
1//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the TargetMachine and LLVMTargetMachine classes. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_TARGET_TARGETMACHINE_H 15#define LLVM_TARGET_TARGETMACHINE_H 16 17#include "llvm/Target/TargetInstrItineraries.h" 18#include <cassert> 19 20namespace llvm { 21 22class TargetAsmInfo; 23class TargetData; 24class TargetSubtarget; 25class TargetInstrInfo; 26class TargetIntrinsicInfo; 27class TargetJITInfo; 28class TargetLowering; 29class TargetFrameInfo; 30class MachineCodeEmitter; 31class JITCodeEmitter; 32class ObjectCodeEmitter; 33class TargetRegisterInfo; 34class Module; 35class PassManagerBase; 36class PassManager; 37class Pass; 38class TargetMachOWriterInfo; 39class TargetELFWriterInfo; 40class formatted_raw_ostream; 41 42// Relocation model types. 43namespace Reloc { 44 enum Model { 45 Default, 46 Static, 47 PIC_, // Cannot be named PIC due to collision with -DPIC 48 DynamicNoPIC 49 }; 50} 51 52// Code model types. 53namespace CodeModel { 54 enum Model { 55 Default, 56 Small, 57 Kernel, 58 Medium, 59 Large 60 }; 61} 62 63namespace FileModel { 64 enum Model { 65 Error, 66 None, 67 AsmFile, 68 MachOFile, 69 ElfFile 70 }; 71} 72 73// Code generation optimization level. 74namespace CodeGenOpt { 75 enum Level { 76 Default, 77 None, 78 Aggressive 79 }; 80} 81 82 83// Possible float ABI settings. Used with FloatABIType in TargetOptions.h. 84namespace FloatABI { 85 enum ABIType { 86 Default, // Target-specific (either soft of hard depending on triple, etc). 87 Soft, // Soft float. 88 Hard // Hard float. 89 }; 90} 91 92//===----------------------------------------------------------------------===// 93/// 94/// TargetMachine - Primary interface to the complete machine description for 95/// the target machine. All target-specific information should be accessible 96/// through this interface. 97/// 98class TargetMachine { 99 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT 100 void operator=(const TargetMachine &); // DO NOT IMPLEMENT 101protected: // Can only create subclasses. 102 TargetMachine(); 103 104 /// getSubtargetImpl - virtual method implemented by subclasses that returns 105 /// a reference to that target's TargetSubtarget-derived member variable. 106 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; } 107 108 /// AsmInfo - Contains target specific asm information. 109 /// 110 mutable const TargetAsmInfo *AsmInfo; 111 112 /// createTargetAsmInfo - Create a new instance of target specific asm 113 /// information. 114 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; } 115 116public: 117 virtual ~TargetMachine(); 118 119 /// getModuleMatchQuality - This static method should be implemented by 120 /// targets to indicate how closely they match the specified module. This is 121 /// used by the LLC tool to determine which target to use when an explicit 122 /// -march option is not specified. If a target returns zero, it will never 123 /// be chosen without an explicit -march option. 124 static unsigned getModuleMatchQuality(const Module &) { return 0; } 125 126 /// getJITMatchQuality - This static method should be implemented by targets 127 /// that provide JIT capabilities to indicate how suitable they are for 128 /// execution on the current host. If a value of 0 is returned, the target 129 /// will not be used unless an explicit -march option is used. 130 static unsigned getJITMatchQuality() { return 0; } 131 132 // Interfaces to the major aspects of target machine information: 133 // -- Instruction opcode and operand information 134 // -- Pipelines and scheduling information 135 // -- Stack frame information 136 // -- Selection DAG lowering information 137 // 138 virtual const TargetInstrInfo *getInstrInfo() const { return 0; } 139 virtual const TargetFrameInfo *getFrameInfo() const { return 0; } 140 virtual TargetLowering *getTargetLowering() const { return 0; } 141 virtual const TargetData *getTargetData() const { return 0; } 142 143 /// getTargetAsmInfo - Return target specific asm information. 144 /// 145 const TargetAsmInfo *getTargetAsmInfo() const { 146 if (!AsmInfo) AsmInfo = createTargetAsmInfo(); 147 return AsmInfo; 148 } 149 150 /// getSubtarget - This method returns a pointer to the specified type of 151 /// TargetSubtarget. In debug builds, it verifies that the object being 152 /// returned is of the correct type. 153 template<typename STC> const STC &getSubtarget() const { 154 const TargetSubtarget *TST = getSubtargetImpl(); 155 assert(TST && dynamic_cast<const STC*>(TST) && 156 "Not the right kind of subtarget!"); 157 return *static_cast<const STC*>(TST); 158 } 159 160 /// getRegisterInfo - If register information is available, return it. If 161 /// not, return null. This is kept separate from RegInfo until RegInfo has 162 /// details of graph coloring register allocation removed from it. 163 /// 164 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; } 165 166 /// getIntrinsicInfo - If intrinsic information is available, return it. If 167 /// not, return null. 168 /// 169 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; } 170 171 /// getJITInfo - If this target supports a JIT, return information for it, 172 /// otherwise return null. 173 /// 174 virtual TargetJITInfo *getJITInfo() { return 0; } 175 176 /// getInstrItineraryData - Returns instruction itinerary data for the target 177 /// or specific subtarget. 178 /// 179 virtual const InstrItineraryData getInstrItineraryData() const { 180 return InstrItineraryData(); 181 } 182 183 /// getMachOWriterInfo - If this target supports a Mach-O writer, return 184 /// information for it, otherwise return null. 185 /// 186 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; } 187 188 /// getELFWriterInfo - If this target supports an ELF writer, return 189 /// information for it, otherwise return null. 190 /// 191 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; } 192 193 /// getRelocationModel - Returns the code generation relocation model. The 194 /// choices are static, PIC, and dynamic-no-pic, and target default. 195 static Reloc::Model getRelocationModel(); 196 197 /// setRelocationModel - Sets the code generation relocation model. 198 /// 199 static void setRelocationModel(Reloc::Model Model); 200 201 /// getCodeModel - Returns the code model. The choices are small, kernel, 202 /// medium, large, and target default. 203 static CodeModel::Model getCodeModel(); 204 205 /// setCodeModel - Sets the code model. 206 /// 207 static void setCodeModel(CodeModel::Model Model); 208 209 /// getAsmVerbosityDefault - Returns the default value of asm verbosity. 210 /// 211 static bool getAsmVerbosityDefault(); 212 213 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default 214 /// is false. 215 static void setAsmVerbosityDefault(bool); 216 217 /// CodeGenFileType - These enums are meant to be passed into 218 /// addPassesToEmitFile to indicate what type of file to emit. 219 enum CodeGenFileType { 220 AssemblyFile, ObjectFile, DynamicLibrary 221 }; 222 223 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 224 /// on this target. User flag overrides. 225 virtual bool getEnableTailMergeDefault() const { return true; } 226 227 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 228 /// specified file emitted. Typically this will involve several steps of code 229 /// generation. If Fast is set to true, the code generator should emit code 230 /// as fast as possible, though the generated code may be less efficient. 231 /// This method should return FileModel::Error if emission of this file type 232 /// is not supported. 233 /// 234 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &, 235 formatted_raw_ostream &, 236 CodeGenFileType, 237 CodeGenOpt::Level) { 238 return FileModel::None; 239 } 240 241 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 242 /// to be split up (e.g., to add an object writer pass), this method can be 243 /// used to finish up adding passes to emit the file, if necessary. 244 /// 245 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 246 MachineCodeEmitter *, 247 CodeGenOpt::Level) { 248 return true; 249 } 250 251 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 252 /// to be split up (e.g., to add an object writer pass), this method can be 253 /// used to finish up adding passes to emit the file, if necessary. 254 /// 255 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 256 JITCodeEmitter *, 257 CodeGenOpt::Level) { 258 return true; 259 } 260 261 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 262 /// to be split up (e.g., to add an object writer pass), this method can be 263 /// used to finish up adding passes to emit the file, if necessary. 264 /// 265 virtual bool addPassesToEmitFileFinish(PassManagerBase &, 266 ObjectCodeEmitter *, 267 CodeGenOpt::Level) { 268 return true; 269 } 270 271 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 272 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 273 /// actually outputting the machine code and resolving things like the address 274 /// of functions. This method returns true if machine code emission is 275 /// not supported. 276 /// 277 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 278 MachineCodeEmitter &, 279 CodeGenOpt::Level) { 280 return true; 281 } 282 283 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 284 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 285 /// actually outputting the machine code and resolving things like the address 286 /// of functions. This method returns true if machine code emission is 287 /// not supported. 288 /// 289 virtual bool addPassesToEmitMachineCode(PassManagerBase &, 290 JITCodeEmitter &, 291 CodeGenOpt::Level) { 292 return true; 293 } 294 295 /// addPassesToEmitWholeFile - This method can be implemented by targets that 296 /// require having the entire module at once. This is not recommended, do not 297 /// use this. 298 virtual bool WantsWholeFile() const { return false; } 299 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &, 300 CodeGenFileType, 301 CodeGenOpt::Level) { 302 return true; 303 } 304}; 305 306/// LLVMTargetMachine - This class describes a target machine that is 307/// implemented with the LLVM target-independent code generator. 308/// 309class LLVMTargetMachine : public TargetMachine { 310protected: // Can only create subclasses. 311 LLVMTargetMachine() { } 312 313 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for 314 /// both emitting to assembly files or machine code output. 315 /// 316 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level); 317 318public: 319 320 /// addPassesToEmitFile - Add passes to the specified pass manager to get the 321 /// specified file emitted. Typically this will involve several steps of code 322 /// generation. If OptLevel is None, the code generator should emit code as fast 323 /// as possible, though the generated code may be less efficient. This method 324 /// should return FileModel::Error if emission of this file type is not 325 /// supported. 326 /// 327 /// The default implementation of this method adds components from the 328 /// LLVM retargetable code generator, invoking the methods below to get 329 /// target-specific passes in standard locations. 330 /// 331 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM, 332 formatted_raw_ostream &Out, 333 CodeGenFileType FileType, 334 CodeGenOpt::Level); 335 336 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 337 /// to be split up (e.g., to add an object writer pass), this method can be 338 /// used to finish up adding passes to emit the file, if necessary. 339 /// 340 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 341 MachineCodeEmitter *MCE, 342 CodeGenOpt::Level); 343 344 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 345 /// to be split up (e.g., to add an object writer pass), this method can be 346 /// used to finish up adding passes to emit the file, if necessary. 347 /// 348 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 349 JITCodeEmitter *JCE, 350 CodeGenOpt::Level); 351 352 /// addPassesToEmitFileFinish - If the passes to emit the specified file had 353 /// to be split up (e.g., to add an object writer pass), this method can be 354 /// used to finish up adding passes to emit the file, if necessary. 355 /// 356 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM, 357 ObjectCodeEmitter *OCE, 358 CodeGenOpt::Level); 359 360 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 361 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 362 /// actually outputting the machine code and resolving things like the address 363 /// of functions. This method returns true if machine code emission is 364 /// not supported. 365 /// 366 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 367 MachineCodeEmitter &MCE, 368 CodeGenOpt::Level); 369 370 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 371 /// get machine code emitted. This uses a MachineCodeEmitter object to handle 372 /// actually outputting the machine code and resolving things like the address 373 /// of functions. This method returns true if machine code emission is 374 /// not supported. 375 /// 376 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM, 377 JITCodeEmitter &MCE, 378 CodeGenOpt::Level); 379 380 /// Target-Independent Code Generator Pass Configuration Options. 381 382 /// addInstSelector - This method should add any "last minute" LLVM->LLVM 383 /// passes, then install an instruction selector pass, which converts from 384 /// LLVM code to machine instructions. 385 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) { 386 return true; 387 } 388 389 /// addPreRegAllocPasses - This method may be implemented by targets that want 390 /// to run passes immediately before register allocation. This should return 391 /// true if -print-machineinstrs should print after these passes. 392 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 393 return false; 394 } 395 396 /// addPostRegAllocPasses - This method may be implemented by targets that 397 /// want to run passes after register allocation but before prolog-epilog 398 /// insertion. This should return true if -print-machineinstrs should print 399 /// after these passes. 400 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) { 401 return false; 402 } 403 404 /// addPreEmitPass - This pass may be implemented by targets that want to run 405 /// passes immediately before machine code is emitted. This should return 406 /// true if -print-machineinstrs should print out the code after the passes. 407 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) { 408 return false; 409 } 410 411 412 /// addAssemblyEmitter - This pass should be overridden by the target to add 413 /// the asmprinter, if asm emission is supported. If this is not supported, 414 /// 'true' should be returned. 415 virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level, 416 bool /* VerboseAsmDefault */, 417 formatted_raw_ostream &) { 418 return true; 419 } 420 421 /// addCodeEmitter - This pass should be overridden by the target to add a 422 /// code emitter, if supported. If this is not supported, 'true' should be 423 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 424 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 425 bool /*DumpAsm*/, MachineCodeEmitter &) { 426 return true; 427 } 428 429 /// addCodeEmitter - This pass should be overridden by the target to add a 430 /// code emitter, if supported. If this is not supported, 'true' should be 431 /// returned. If DumpAsm is true, the generated assembly is printed to cerr. 432 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 433 bool /*DumpAsm*/, JITCodeEmitter &) { 434 return true; 435 } 436 437 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 438 /// a code emitter (without setting flags), if supported. If this is not 439 /// supported, 'true' should be returned. If DumpAsm is true, the generated 440 /// assembly is printed to cerr. 441 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 442 bool /*DumpAsm*/, MachineCodeEmitter &) { 443 return true; 444 } 445 446 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 447 /// a code emitter (without setting flags), if supported. If this is not 448 /// supported, 'true' should be returned. If DumpAsm is true, the generated 449 /// assembly is printed to cerr. 450 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 451 bool /*DumpAsm*/, JITCodeEmitter &) { 452 return true; 453 } 454 455 /// addSimpleCodeEmitter - This pass should be overridden by the target to add 456 /// a code emitter (without setting flags), if supported. If this is not 457 /// supported, 'true' should be returned. If DumpAsm is true, the generated 458 /// assembly is printed to cerr. 459 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level, 460 bool /*DumpAsm*/, ObjectCodeEmitter &) { 461 return true; 462 } 463 464 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge 465 /// on this target. User flag overrides. 466 virtual bool getEnableTailMergeDefault() const { return true; } 467}; 468 469} // End llvm namespace 470 471#endif 472