TargetMachine.h revision b7a2d2256fede467c7f50444eb3cddadcd7d34c9 
1//===-- llvm/Target/TargetMachine.h - General Target Information -*- C++ -*-==//
2//
3// This file describes the general parts of a Target machine.
4//
5//===----------------------------------------------------------------------===//
6
7#ifndef LLVM_TARGET_TARGETMACHINE_H
8#define LLVM_TARGET_TARGETMACHINE_H
9
10#include "llvm/Target/TargetData.h"
11#include "Support/NonCopyable.h"
12
13class MachineInstrInfo;
14class MachineInstrDescriptor;
15class MachineSchedInfo;
16class MachineRegInfo;
17class MachineFrameInfo;
18class MachineCacheInfo;
19class MachineOptInfo;
20class MachineCodeEmitter;
21class MRegisterInfo;
22class PassManager;
23class Pass;
24
25//---------------------------------------------------------------------------
26// class TargetMachine
27//
28// Purpose:
29//   Primary interface to the complete machine description for the
30//   target machine.  All target-specific information should be
31//   accessible through this interface.
32//
33//---------------------------------------------------------------------------
34
35class TargetMachine : public NonCopyableV {
36  const std::string Name;
37public:
38  const TargetData DataLayout;		// Calculates type size & alignment
39
40protected:
41  TargetMachine(const std::string &name, // Can only create subclasses...
42                unsigned char SubWordSize = 1, unsigned char IntRegSize = 8,
43		unsigned char PtrSize = 8, unsigned char PtrAl = 8,
44		unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
45		unsigned char LongAl = 8, unsigned char IntAl = 4,
46		unsigned char ShortAl = 2, unsigned char ByteAl = 1)
47    : Name(name), DataLayout(name, SubWordSize, IntRegSize, PtrSize, PtrAl,
48                             DoubleAl, FloatAl, LongAl,
49                             IntAl, ShortAl, ByteAl) {}
50public:
51  virtual ~TargetMachine() {}
52
53  const std::string &getName() const { return Name; }
54
55  //
56  // Interfaces to the major aspects of target machine information:
57  // -- Instruction opcode and operand information
58  // -- Pipelines and scheduling information
59  // -- Register information
60  // -- Stack frame information
61  // -- Cache hierarchy information
62  // -- Machine-level optimization information (peephole only)
63  //
64  virtual const MachineInstrInfo&       getInstrInfo() const = 0;
65  virtual const MachineSchedInfo&       getSchedInfo() const = 0;
66  virtual const MachineRegInfo&	        getRegInfo()   const = 0;
67  virtual const MachineFrameInfo&       getFrameInfo() const = 0;
68  virtual const MachineCacheInfo&       getCacheInfo() const = 0;
69  virtual const MachineOptInfo&         getOptInfo()   const = 0;
70
71  /// getRegisterInfo - If register information is available, return it.  If
72  /// not, return null.  This is kept separate from RegInfo until RegInfo gets
73  /// straightened out.
74  ///
75  virtual const MRegisterInfo*          getRegisterInfo() const { return 0; }
76
77  // Data storage information
78  //
79  virtual unsigned findOptimalStorageSize(const Type* ty) const;
80
81  /// addPassesToJITCompile - Add passes to the specified pass manager to
82  /// implement a fast dynamic compiler for this target.  Return true if this is
83  /// not supported for this target.
84  ///
85  virtual bool addPassesToJITCompile(PassManager &PM) { return true; }
86
87  /// addPassesToEmitAssembly - Add passes to the specified pass manager to get
88  /// assembly langage code emitted.  Typically this will involve several steps
89  /// of code generation.  This method should return true if assembly emission
90  /// is not supported.
91  ///
92  virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) {
93    return true;
94  }
95
96  /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
97  /// get machine code emitted.  This uses a MAchineCodeEmitter object to handle
98  /// actually outputting the machine code and resolving things like the address
99  /// of functions.  This method should returns true if machine code emission is
100  /// not supported.
101  ///
102  virtual bool addPassesToEmitMachineCode(PassManager &PM,
103                                          MachineCodeEmitter &MCE) {
104    return true;
105  }
106};
107
108#endif
109