TargetOpcodes.h revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- llvm/Target/TargetOpcodes.h - Target Indep Opcodes ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the target independent instruction opcodes.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGET_TARGETOPCODES_H
15#define LLVM_TARGET_TARGETOPCODES_H
16
17namespace llvm {
18
19/// Invariant opcodes: All instruction sets have these as their low opcodes.
20///
21/// Every instruction defined here must also appear in Target.td and the order
22/// must be the same as in CodeGenTarget.cpp.
23///
24namespace TargetOpcode {
25enum {
26  PHI = 0,
27  INLINEASM = 1,
28  CFI_INSTRUCTION = 2,
29  EH_LABEL = 3,
30  GC_LABEL = 4,
31
32  /// KILL - This instruction is a noop that is used only to adjust the
33  /// liveness of registers. This can be useful when dealing with
34  /// sub-registers.
35  KILL = 5,
36
37  /// EXTRACT_SUBREG - This instruction takes two operands: a register
38  /// that has subregisters, and a subregister index. It returns the
39  /// extracted subregister value. This is commonly used to implement
40  /// truncation operations on target architectures which support it.
41  EXTRACT_SUBREG = 6,
42
43  /// INSERT_SUBREG - This instruction takes three operands: a register that
44  /// has subregisters, a register providing an insert value, and a
45  /// subregister index. It returns the value of the first register with the
46  /// value of the second register inserted. The first register is often
47  /// defined by an IMPLICIT_DEF, because it is commonly used to implement
48  /// anyext operations on target architectures which support it.
49  INSERT_SUBREG = 7,
50
51  /// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
52  IMPLICIT_DEF = 8,
53
54  /// SUBREG_TO_REG - This instruction is similar to INSERT_SUBREG except that
55  /// the first operand is an immediate integer constant. This constant is
56  /// often zero, because it is commonly used to assert that the instruction
57  /// defining the register implicitly clears the high bits.
58  SUBREG_TO_REG = 9,
59
60  /// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
61  /// register-to-register copy into a specific register class. This is only
62  /// used between instruction selection and MachineInstr creation, before
63  /// virtual registers have been created for all the instructions, and it's
64  /// only needed in cases where the register classes implied by the
65  /// instructions are insufficient. It is emitted as a COPY MachineInstr.
66  COPY_TO_REGCLASS = 10,
67
68  /// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
69  DBG_VALUE = 11,
70
71  /// REG_SEQUENCE - This variadic instruction is used to form a register that
72  /// represents a consecutive sequence of sub-registers. It's used as a
73  /// register coalescing / allocation aid and must be eliminated before code
74  /// emission.
75  // In SDNode form, the first operand encodes the register class created by
76  // the REG_SEQUENCE, while each subsequent pair names a vreg + subreg index
77  // pair.  Once it has been lowered to a MachineInstr, the regclass operand
78  // is no longer present.
79  /// e.g. v1027 = REG_SEQUENCE v1024, 3, v1025, 4, v1026, 5
80  /// After register coalescing references of v1024 should be replace with
81  /// v1027:3, v1025 with v1027:4, etc.
82  REG_SEQUENCE = 12,
83
84  /// COPY - Target-independent register copy. This instruction can also be
85  /// used to copy between subregisters of virtual registers.
86  COPY = 13,
87
88  /// BUNDLE - This instruction represents an instruction bundle. Instructions
89  /// which immediately follow a BUNDLE instruction which are marked with
90  /// 'InsideBundle' flag are inside the bundle.
91  BUNDLE = 14,
92
93  /// Lifetime markers.
94  LIFETIME_START = 15,
95  LIFETIME_END = 16,
96
97  /// A Stackmap instruction captures the location of live variables at its
98  /// position in the instruction stream. It is followed by a shadow of bytes
99  /// that must lie within the function and not contain another stackmap.
100  STACKMAP = 17,
101
102  /// Patchable call instruction - this instruction represents a call to a
103  /// constant address, followed by a series of NOPs. It is intended to
104  /// support optimizations for dynamic languages (such as javascript) that
105  /// rewrite calls to runtimes with more efficient code sequences.
106  /// This also implies a stack map.
107  PATCHPOINT = 18
108};
109} // end namespace TargetOpcode
110} // end namespace llvm
111
112#endif
113