1//===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This is an extremely simple MachineInstr-level dead-code-elimination pass.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/Passes.h"
15#include "llvm/ADT/Statistic.h"
16#include "llvm/CodeGen/MachineFunctionPass.h"
17#include "llvm/CodeGen/MachineRegisterInfo.h"
18#include "llvm/Pass.h"
19#include "llvm/Support/Debug.h"
20#include "llvm/Support/raw_ostream.h"
21#include "llvm/Target/TargetInstrInfo.h"
22#include "llvm/Target/TargetMachine.h"
23using namespace llvm;
24
25#define DEBUG_TYPE "codegen-dce"
26
27STATISTIC(NumDeletes,          "Number of dead instructions deleted");
28
29namespace {
30  class DeadMachineInstructionElim : public MachineFunctionPass {
31    bool runOnMachineFunction(MachineFunction &MF) override;
32
33    const TargetRegisterInfo *TRI;
34    const MachineRegisterInfo *MRI;
35    const TargetInstrInfo *TII;
36    BitVector LivePhysRegs;
37
38  public:
39    static char ID; // Pass identification, replacement for typeid
40    DeadMachineInstructionElim() : MachineFunctionPass(ID) {
41     initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
42    }
43
44  private:
45    bool isDead(const MachineInstr *MI) const;
46  };
47}
48char DeadMachineInstructionElim::ID = 0;
49char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
50
51INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
52                "Remove dead machine instructions", false, false)
53
54bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
55  // Technically speaking inline asm without side effects and no defs can still
56  // be deleted. But there is so much bad inline asm code out there, we should
57  // let them be.
58  if (MI->isInlineAsm())
59    return false;
60
61  // Don't delete instructions with side effects.
62  bool SawStore = false;
63  if (!MI->isSafeToMove(TII, nullptr, SawStore) && !MI->isPHI())
64    return false;
65
66  // Examine each operand.
67  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
68    const MachineOperand &MO = MI->getOperand(i);
69    if (MO.isReg() && MO.isDef()) {
70      unsigned Reg = MO.getReg();
71      if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
72        // Don't delete live physreg defs, or any reserved register defs.
73        if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
74          return false;
75      } else {
76        if (!MRI->use_nodbg_empty(Reg))
77          // This def has a non-debug use. Don't delete the instruction!
78          return false;
79      }
80    }
81  }
82
83  // If there are no defs with uses, the instruction is dead.
84  return true;
85}
86
87bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
88  if (skipOptnoneFunction(*MF.getFunction()))
89    return false;
90
91  bool AnyChanges = false;
92  MRI = &MF.getRegInfo();
93  TRI = MF.getTarget().getRegisterInfo();
94  TII = MF.getTarget().getInstrInfo();
95
96  // Loop over all instructions in all blocks, from bottom to top, so that it's
97  // more likely that chains of dependent but ultimately dead instructions will
98  // be cleaned up.
99  for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
100       I != E; ++I) {
101    MachineBasicBlock *MBB = &*I;
102
103    // Start out assuming that reserved registers are live out of this block.
104    LivePhysRegs = MRI->getReservedRegs();
105
106    // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
107    // live across blocks, but some targets (x86) can have flags live out of a
108    // block.
109    for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
110           E = MBB->succ_end(); S != E; S++)
111      for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
112           LI != (*S)->livein_end(); LI++)
113        LivePhysRegs.set(*LI);
114
115    // Now scan the instructions and delete dead ones, tracking physreg
116    // liveness as we go.
117    for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
118         MIE = MBB->rend(); MII != MIE; ) {
119      MachineInstr *MI = &*MII;
120
121      // If the instruction is dead, delete it!
122      if (isDead(MI)) {
123        DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
124        // It is possible that some DBG_VALUE instructions refer to this
125        // instruction.  Examine each def operand for such references;
126        // if found, mark the DBG_VALUE as undef (but don't delete it).
127        for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
128          const MachineOperand &MO = MI->getOperand(i);
129          if (!MO.isReg() || !MO.isDef())
130            continue;
131          unsigned Reg = MO.getReg();
132          if (!TargetRegisterInfo::isVirtualRegister(Reg))
133            continue;
134          MRI->markUsesInDebugValueAsUndef(Reg);
135        }
136        AnyChanges = true;
137        MI->eraseFromParent();
138        ++NumDeletes;
139        MIE = MBB->rend();
140        // MII is now pointing to the next instruction to process,
141        // so don't increment it.
142        continue;
143      }
144
145      // Record the physreg defs.
146      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
147        const MachineOperand &MO = MI->getOperand(i);
148        if (MO.isReg() && MO.isDef()) {
149          unsigned Reg = MO.getReg();
150          if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
151            // Check the subreg set, not the alias set, because a def
152            // of a super-register may still be partially live after
153            // this def.
154            for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
155                 SR.isValid(); ++SR)
156              LivePhysRegs.reset(*SR);
157          }
158        } else if (MO.isRegMask()) {
159          // Register mask of preserved registers. All clobbers are dead.
160          LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
161        }
162      }
163      // Record the physreg uses, after the defs, in case a physreg is
164      // both defined and used in the same instruction.
165      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
166        const MachineOperand &MO = MI->getOperand(i);
167        if (MO.isReg() && MO.isUse()) {
168          unsigned Reg = MO.getReg();
169          if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
170            for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
171              LivePhysRegs.set(*AI);
172          }
173        }
174      }
175
176      // We didn't delete the current instruction, so increment MII to
177      // the next one.
178      ++MII;
179    }
180  }
181
182  LivePhysRegs.clear();
183  return AnyChanges;
184}
185