1//===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the live stack slot analysis pass. It is analogous to
11// live interval analysis except it's analyzing liveness of stack slots rather
12// than registers.
13//
14//===----------------------------------------------------------------------===//
15
16#include "llvm/CodeGen/LiveStackAnalysis.h"
17#include "llvm/ADT/Statistic.h"
18#include "llvm/CodeGen/LiveIntervalAnalysis.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/Support/Debug.h"
21#include "llvm/Support/raw_ostream.h"
22#include "llvm/Target/TargetRegisterInfo.h"
23#include <limits>
24using namespace llvm;
25
26#define DEBUG_TYPE "livestacks"
27
28char LiveStacks::ID = 0;
29INITIALIZE_PASS_BEGIN(LiveStacks, "livestacks",
30                "Live Stack Slot Analysis", false, false)
31INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
32INITIALIZE_PASS_END(LiveStacks, "livestacks",
33                "Live Stack Slot Analysis", false, false)
34
35char &llvm::LiveStacksID = LiveStacks::ID;
36
37void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
38  AU.setPreservesAll();
39  AU.addPreserved<SlotIndexes>();
40  AU.addRequiredTransitive<SlotIndexes>();
41  MachineFunctionPass::getAnalysisUsage(AU);
42}
43
44void LiveStacks::releaseMemory() {
45  // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
46  VNInfoAllocator.Reset();
47  S2IMap.clear();
48  S2RCMap.clear();
49}
50
51bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {
52  TRI = MF.getTarget().getRegisterInfo();
53  // FIXME: No analysis is being done right now. We are relying on the
54  // register allocators to provide the information.
55  return false;
56}
57
58LiveInterval &
59LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
60  assert(Slot >= 0 && "Spill slot indice must be >= 0");
61  SS2IntervalMap::iterator I = S2IMap.find(Slot);
62  if (I == S2IMap.end()) {
63    I = S2IMap.insert(I, std::make_pair(Slot,
64            LiveInterval(TargetRegisterInfo::index2StackSlot(Slot), 0.0F)));
65    S2RCMap.insert(std::make_pair(Slot, RC));
66  } else {
67    // Use the largest common subclass register class.
68    const TargetRegisterClass *OldRC = S2RCMap[Slot];
69    S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
70  }
71  return I->second;
72}
73
74/// print - Implement the dump method.
75void LiveStacks::print(raw_ostream &OS, const Module*) const {
76
77  OS << "********** INTERVALS **********\n";
78  for (const_iterator I = begin(), E = end(); I != E; ++I) {
79    I->second.print(OS);
80    int Slot = I->first;
81    const TargetRegisterClass *RC = getIntervalRegClass(Slot);
82    if (RC)
83      OS << " [" << RC->getName() << "]\n";
84    else
85      OS << " [Unknown]\n";
86  }
87}
88