MachineRegisterInfo.cpp revision 2bf0649e053d1589689d2e4cf32c7bf1e5e6ae12 
1//===-- lib/Codegen/MachineRegisterInfo.cpp -------------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Implementation of the MachineRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/MachineRegisterInfo.h"
15using namespace llvm;
16
17MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) {
18  VRegInfo.reserve(256);
19  RegAllocHints.reserve(256);
20  RegClass2VRegMap.resize(TRI.getNumRegClasses()+1); // RC ID starts at 1.
21  UsedPhysRegs.resize(TRI.getNumRegs());
22
23  // Create the physreg use/def lists.
24  PhysRegUseDefLists = new MachineOperand*[TRI.getNumRegs()];
25  memset(PhysRegUseDefLists, 0, sizeof(MachineOperand*)*TRI.getNumRegs());
26}
27
28MachineRegisterInfo::~MachineRegisterInfo() {
29#ifndef NDEBUG
30  for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i)
31    assert(VRegInfo[i].second == 0 && "Vreg use list non-empty still?");
32  for (unsigned i = 0, e = UsedPhysRegs.size(); i != e; ++i)
33    assert(!PhysRegUseDefLists[i] &&
34           "PhysRegUseDefLists has entries after all instructions are deleted");
35#endif
36  delete [] PhysRegUseDefLists;
37}
38
39/// setRegClass - Set the register class of the specified virtual register.
40///
41void
42MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) {
43  unsigned VR = Reg;
44  Reg -= TargetRegisterInfo::FirstVirtualRegister;
45  assert(Reg < VRegInfo.size() && "Invalid vreg!");
46  const TargetRegisterClass *OldRC = VRegInfo[Reg].first;
47  VRegInfo[Reg].first = RC;
48
49  // Remove from old register class's vregs list. This may be slow but
50  // fortunately this operation is rarely needed.
51  std::vector<unsigned> &VRegs = RegClass2VRegMap[OldRC->getID()];
52  std::vector<unsigned>::iterator I=std::find(VRegs.begin(), VRegs.end(), VR);
53  VRegs.erase(I);
54
55  // Add to new register class's vregs list.
56  RegClass2VRegMap[RC->getID()].push_back(VR);
57}
58
59/// createVirtualRegister - Create and return a new virtual register in the
60/// function with the specified register class.
61///
62unsigned
63MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass){
64  assert(RegClass && "Cannot create register without RegClass!");
65  // Add a reg, but keep track of whether the vector reallocated or not.
66  void *ArrayBase = VRegInfo.empty() ? 0 : &VRegInfo[0];
67  VRegInfo.push_back(std::make_pair(RegClass, (MachineOperand*)0));
68  RegAllocHints.push_back(std::make_pair(0, 0));
69
70  if (!((&VRegInfo[0] == ArrayBase || VRegInfo.size() == 1)))
71    // The vector reallocated, handle this now.
72    HandleVRegListReallocation();
73  unsigned VR = getLastVirtReg();
74  RegClass2VRegMap[RegClass->getID()].push_back(VR);
75  return VR;
76}
77
78/// HandleVRegListReallocation - We just added a virtual register to the
79/// VRegInfo info list and it reallocated.  Update the use/def lists info
80/// pointers.
81void MachineRegisterInfo::HandleVRegListReallocation() {
82  // The back pointers for the vreg lists point into the previous vector.
83  // Update them to point to their correct slots.
84  for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i) {
85    MachineOperand *List = VRegInfo[i].second;
86    if (!List) continue;
87    // Update the back-pointer to be accurate once more.
88    List->Contents.Reg.Prev = &VRegInfo[i].second;
89  }
90}
91
92/// replaceRegWith - Replace all instances of FromReg with ToReg in the
93/// machine function.  This is like llvm-level X->replaceAllUsesWith(Y),
94/// except that it also changes any definitions of the register as well.
95void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) {
96  assert(FromReg != ToReg && "Cannot replace a reg with itself");
97
98  // TODO: This could be more efficient by bulk changing the operands.
99  for (reg_iterator I = reg_begin(FromReg), E = reg_end(); I != E; ) {
100    MachineOperand &O = I.getOperand();
101    ++I;
102    O.setReg(ToReg);
103  }
104}
105
106
107/// getVRegDef - Return the machine instr that defines the specified virtual
108/// register or null if none is found.  This assumes that the code is in SSA
109/// form, so there should only be one definition.
110MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const {
111  assert(Reg-TargetRegisterInfo::FirstVirtualRegister < VRegInfo.size() &&
112         "Invalid vreg!");
113  // Since we are in SSA form, we can use the first definition.
114  if (!def_empty(Reg))
115    return &*def_begin(Reg);
116  return 0;
117}
118
119
120#ifndef NDEBUG
121void MachineRegisterInfo::dumpUses(unsigned Reg) const {
122  for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I)
123    I.getOperand().getParent()->dump();
124}
125#endif
126