MachineRegisterInfo.cpp revision b13033f61c897224a0be2784faa721ff294c5254
19e49fb63d355446b91d20ff78ad78b297e89a50dcaryclark@google.com//===-- lib/Codegen/MachineRegisterInfo.cpp -------------------------------===// 29e49fb63d355446b91d20ff78ad78b297e89a50dcaryclark@google.com// 39e49fb63d355446b91d20ff78ad78b297e89a50dcaryclark@google.com// The LLVM Compiler Infrastructure 49e49fb63d355446b91d20ff78ad78b297e89a50dcaryclark@google.com// 59e49fb63d355446b91d20ff78ad78b297e89a50dcaryclark@google.com// This file is distributed under the University of Illinois Open Source 69e49fb63d355446b91d20ff78ad78b297e89a50dcaryclark@google.com// License. See LICENSE.TXT for details. 7cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com// 8cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com//===----------------------------------------------------------------------===// 9198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com// 10198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com// Implementation of the MachineRegisterInfo class. 11198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com// 12cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com//===----------------------------------------------------------------------===// 13cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 14cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com#include "llvm/CodeGen/MachineRegisterInfo.h" 15cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com#include "llvm/Support/CommandLine.h" 16cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com#include "llvm/Target/TargetInstrInfo.h" 17cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comusing namespace llvm; 18cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 19cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comMachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) { 20cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com VRegInfo.reserve(256); 21cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com RegAllocHints.reserve(256); 22cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com RegClass2VRegMap.resize(TRI.getNumRegClasses()+1); // RC ID starts at 1. 23cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com UsedPhysRegs.resize(TRI.getNumRegs()); 24198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com 25d6176b0dcacb124539e0cfd051e6d93a9782f020rmistry@google.com // Create the physreg use/def lists. 26cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com PhysRegUseDefLists = new MachineOperand*[TRI.getNumRegs()]; 27cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com memset(PhysRegUseDefLists, 0, sizeof(MachineOperand*)*TRI.getNumRegs()); 28cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 29cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 30cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comMachineRegisterInfo::~MachineRegisterInfo() { 31cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com#ifndef NDEBUG 32cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i) 33cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com assert(VRegInfo[i].second == 0 && "Vreg use list non-empty still?"); 34cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (unsigned i = 0, e = UsedPhysRegs.size(); i != e; ++i) 35cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com assert(!PhysRegUseDefLists[i] && 36cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com "PhysRegUseDefLists has entries after all instructions are deleted"); 37cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com#endif 38198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com delete [] PhysRegUseDefLists; 39cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 40cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 41cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// setRegClass - Set the register class of the specified virtual register. 42cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// 43cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comvoid 44cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comMachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { 45cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com unsigned VR = Reg; 46cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com Reg -= TargetRegisterInfo::FirstVirtualRegister; 47cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com assert(Reg < VRegInfo.size() && "Invalid vreg!"); 48cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com const TargetRegisterClass *OldRC = VRegInfo[Reg].first; 49cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com VRegInfo[Reg].first = RC; 50cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 51198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com // Remove from old register class's vregs list. This may be slow but 52cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // fortunately this operation is rarely needed. 53cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com std::vector<unsigned> &VRegs = RegClass2VRegMap[OldRC->getID()]; 54cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com std::vector<unsigned>::iterator I=std::find(VRegs.begin(), VRegs.end(), VR); 55cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com VRegs.erase(I); 56cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 57cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Add to new register class's vregs list. 58cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com RegClass2VRegMap[RC->getID()].push_back(VR); 59cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 60cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 61cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// createVirtualRegister - Create and return a new virtual register in the 62cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// function with the specified register class. 63cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// 64198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.comunsigned 65cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comMachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass){ 66cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com assert(RegClass && "Cannot create register without RegClass!"); 67cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Add a reg, but keep track of whether the vector reallocated or not. 68cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com void *ArrayBase = VRegInfo.empty() ? 0 : &VRegInfo[0]; 69cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com VRegInfo.push_back(std::make_pair(RegClass, (MachineOperand*)0)); 70cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com RegAllocHints.push_back(std::make_pair(0, 0)); 71cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 72cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (!((&VRegInfo[0] == ArrayBase || VRegInfo.size() == 1))) 73cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // The vector reallocated, handle this now. 74cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com HandleVRegListReallocation(); 75cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com unsigned VR = getLastVirtReg(); 76cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com RegClass2VRegMap[RegClass->getID()].push_back(VR); 77cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return VR; 78cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 79198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com 80cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// HandleVRegListReallocation - We just added a virtual register to the 81cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// VRegInfo info list and it reallocated. Update the use/def lists info 82cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// pointers. 83cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comvoid MachineRegisterInfo::HandleVRegListReallocation() { 84cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // The back pointers for the vreg lists point into the previous vector. 85cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Update them to point to their correct slots. 86cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i) { 87cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MachineOperand *List = VRegInfo[i].second; 88cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (!List) continue; 89cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Update the back-pointer to be accurate once more. 90cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com List->Contents.Reg.Prev = &VRegInfo[i].second; 91cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com } 92cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 93cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 94198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com/// replaceRegWith - Replace all instances of FromReg with ToReg in the 95cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// machine function. This is like llvm-level X->replaceAllUsesWith(Y), 96cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// except that it also changes any definitions of the register as well. 97cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comvoid MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) { 98cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com assert(FromReg != ToReg && "Cannot replace a reg with itself"); 99cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 100cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // TODO: This could be more efficient by bulk changing the operands. 101cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (reg_iterator I = reg_begin(FromReg), E = reg_end(); I != E; ) { 102cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MachineOperand &O = I.getOperand(); 103cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com ++I; 104cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com O.setReg(ToReg); 105cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com } 106cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 107cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 108cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 109198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com/// getVRegDef - Return the machine instr that defines the specified virtual 110cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// register or null if none is found. This assumes that the code is in SSA 111cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// form, so there should only be one definition. 112cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comMachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const { 113cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com assert(Reg-TargetRegisterInfo::FirstVirtualRegister < VRegInfo.size() && 114cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com "Invalid vreg!"); 115cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Since we are in SSA form, we can use the first definition. 116cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (!def_empty(Reg)) 117cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return &*def_begin(Reg); 118cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return 0; 119cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 120cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 121cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.combool MachineRegisterInfo::hasOneUse(unsigned RegNo) const { 122cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com use_iterator UI = use_begin(RegNo); 123cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (UI == use_end()) 124198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com return false; 125cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return ++UI == use_end(); 126cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 127cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 128cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.combool MachineRegisterInfo::hasOneNonDBGUse(unsigned RegNo) const { 129cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com use_nodbg_iterator UI = use_nodbg_begin(RegNo); 130cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (UI == use_nodbg_end()) 131cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return false; 132cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return ++UI == use_nodbg_end(); 133cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 134cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 135cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.combool MachineRegisterInfo::isLiveIn(unsigned Reg) const { 136cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I) 137cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (I->first == Reg || I->second == Reg) 138cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return true; 139198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com return false; 140cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 141cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 142cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.combool MachineRegisterInfo::isLiveOut(unsigned Reg) const { 143cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (liveout_iterator I = liveout_begin(), E = liveout_end(); I != E; ++I) 144cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (*I == Reg) 145cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return true; 146cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com return false; 147cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 148cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 149cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comstatic cl::opt<bool> 150cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comSchedLiveInCopies("schedule-livein-copies", cl::Hidden, 151cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com cl::desc("Schedule copies of livein registers"), 152cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com cl::init(false)); 153cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 154198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com/// EmitLiveInCopy - Emit a copy for a live in physical register. If the 155cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// physical register has only a single copy use, then coalesced the copy 156cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// if possible. 157cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comstatic void EmitLiveInCopy(MachineBasicBlock *MBB, 158cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MachineBasicBlock::iterator &InsertPos, 159cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com unsigned VirtReg, unsigned PhysReg, 160cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com const TargetRegisterClass *RC, 161cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com DenseMap<MachineInstr*, unsigned> &CopyRegMap, 162cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com const MachineRegisterInfo &MRI, 163cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com const TargetRegisterInfo &TRI, 164cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com const TargetInstrInfo &TII) { 165cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com unsigned NumUses = 0; 166cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MachineInstr *UseMI = NULL; 167cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(VirtReg), 168cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com UE = MRI.use_end(); UI != UE; ++UI) { 169198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com UseMI = &*UI; 170cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (++NumUses > 1) 171cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com break; 172cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com } 173cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 174cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // If the number of uses is not one, or the use is not a move instruction, 175cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // don't coalesce. Also, only coalesce away a virtual register to virtual 176cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // register copy. 177cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com bool Coalesced = false; 178cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com unsigned SrcReg, DstReg, SrcSubReg, DstSubReg; 179cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (NumUses == 1 && 180cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com TII.isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubReg, DstSubReg) && 181cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com TargetRegisterInfo::isVirtualRegister(DstReg)) { 182cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com VirtReg = DstReg; 183cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com Coalesced = true; 184198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com } 185cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 186cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Now find an ideal location to insert the copy. 187cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MachineBasicBlock::iterator Pos = InsertPos; 188cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com while (Pos != MBB->begin()) { 189cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MachineInstr *PrevMI = prior(Pos); 190cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com DenseMap<MachineInstr*, unsigned>::iterator RI = CopyRegMap.find(PrevMI); 191cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // copyRegToReg might emit multiple instructions to do a copy. 192cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com unsigned CopyDstReg = (RI == CopyRegMap.end()) ? 0 : RI->second; 193cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (CopyDstReg && !TRI.regsOverlap(CopyDstReg, PhysReg)) 194cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // This is what the BB looks like right now: 195cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // r1024 = mov r0 196cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // ... 197cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // r1 = mov r1024 198cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // 199198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com // We want to insert "r1025 = mov r1". Inserting this copy below the 200cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // move to r1024 makes it impossible for that move to be coalesced. 201cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // 202cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // r1025 = mov r1 203cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // r1024 = mov r0 204cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // ... 205cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // r1 = mov 1024 206cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // r2 = mov 1025 207cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com break; // Woot! Found a good location. 208cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com --Pos; 209cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com } 210cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 211cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com bool Emitted = TII.copyRegToReg(*MBB, Pos, VirtReg, PhysReg, RC, RC); 212cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com assert(Emitted && "Unable to issue a live-in copy instruction!\n"); 213198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com (void) Emitted; 214cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 215cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com CopyRegMap.insert(std::make_pair(prior(Pos), VirtReg)); 216cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (Coalesced) { 217cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (&*InsertPos == UseMI) ++InsertPos; 218cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MBB->erase(UseMI); 219cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com } 220cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com} 221cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com 222cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// EmitLiveInCopies - Emit copies to initialize livein virtual registers 223cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com/// into the given entry block. 224cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comvoid 225cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.comMachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB, 226198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com const TargetRegisterInfo &TRI, 227cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com const TargetInstrInfo &TII) { 228cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (SchedLiveInCopies) { 229cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Emit the copies at a heuristically-determined location in the block. 230cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com DenseMap<MachineInstr*, unsigned> CopyRegMap; 231cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com MachineBasicBlock::iterator InsertPos = EntryMBB->begin(); 232cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com for (MachineRegisterInfo::livein_iterator LI = livein_begin(), 233cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com E = livein_end(); LI != E; ++LI) 234cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com if (LI->second) { 235cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com const TargetRegisterClass *RC = getRegClass(LI->second); 236cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com EmitLiveInCopy(EntryMBB, InsertPos, LI->second, LI->first, 237cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com RC, CopyRegMap, *this, TRI, TII); 238cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com } 239198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com } else { 240cd4421df5012b75c792c6c8bf2c5ee0410921c15caryclark@google.com // Emit the copies into the top of the block. 241d6176b0dcacb124539e0cfd051e6d93a9782f020rmistry@google.com for (MachineRegisterInfo::livein_iterator LI = livein_begin(), 2424917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com E = livein_end(); LI != E; ++LI) 2434917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com if (LI->second) { 2444917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com const TargetRegisterClass *RC = getRegClass(LI->second); 2454917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com bool Emitted = TII.copyRegToReg(*EntryMBB, EntryMBB->begin(), 2464917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com LI->second, LI->first, RC, RC); 2474917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com assert(Emitted && "Unable to issue a live-in copy instruction!\n"); 2484917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com (void) Emitted; 2494917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com } 2504917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com } 2514917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com 252198e054b33051a6cd5f606ccbc8d539cefc5631fcaryclark@google.com // Add function live-ins to entry block live-in set. 2534917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com for (MachineRegisterInfo::livein_iterator I = livein_begin(), 2544917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com E = livein_end(); I != E; ++I) 2554917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com EntryMBB->addLiveIn(I->first); 2564917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com} 2574917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com 2584917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com#ifndef NDEBUG 2594917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.comvoid MachineRegisterInfo::dumpUses(unsigned Reg) const { 2604917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I) 2614917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com I.getOperand().getParent()->dump(); 2624917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com} 2634917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com#endif 2644917f17bf6bd8bff7f4b03717dcb02561cf227c9caryclark@google.com