AArch64BaseInfo.h revision 81a22ba0e7e6aa455cc0ee73c8b43171bff237b6
1//===-- AArch64BaseInfo.h - Top level definitions for AArch64- --*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains small standalone helper functions and enum definitions for 11// the AArch64 target useful for the compiler back-end and the MC libraries. 12// As such, it deliberately does not include references to LLVM core 13// code gen types, passes, etc.. 14// 15//===----------------------------------------------------------------------===// 16 17#ifndef LLVM_AARCH64_BASEINFO_H 18#define LLVM_AARCH64_BASEINFO_H 19 20#include "llvm/ADT/StringSwitch.h" 21#include "llvm/ADT/STLExtras.h" 22#include "llvm/Support/ErrorHandling.h" 23 24namespace llvm { 25 26// // Enums corresponding to AArch64 condition codes 27namespace A64CC { 28 // The CondCodes constants map directly to the 4-bit encoding of the 29 // condition field for predicated instructions. 30 enum CondCodes { // Meaning (integer) Meaning (floating-point) 31 EQ = 0, // Equal Equal 32 NE, // Not equal Not equal, or unordered 33 HS, // Unsigned higher or same >, ==, or unordered 34 LO, // Unsigned lower or same Less than 35 MI, // Minus, negative Less than 36 PL, // Plus, positive or zero >, ==, or unordered 37 VS, // Overflow Unordered 38 VC, // No overflow Ordered 39 HI, // Unsigned higher Greater than, or unordered 40 LS, // Unsigned lower or same Less than or equal 41 GE, // Greater than or equal Greater than or equal 42 LT, // Less than Less than, or unordered 43 GT, // Signed greater than Greater than 44 LE, // Signed less than or equal <, ==, or unordered 45 AL, // Always (unconditional) Always (unconditional) 46 NV, // Always (unconditional) Always (unconditional) 47 // Note the NV exists purely to disassemble 0b1111. Execution 48 // is "always". 49 Invalid 50 }; 51 52} // namespace A64CC 53 54inline static const char *A64CondCodeToString(A64CC::CondCodes CC) { 55 switch (CC) { 56 default: llvm_unreachable("Unknown condition code"); 57 case A64CC::EQ: return "eq"; 58 case A64CC::NE: return "ne"; 59 case A64CC::HS: return "hs"; 60 case A64CC::LO: return "lo"; 61 case A64CC::MI: return "mi"; 62 case A64CC::PL: return "pl"; 63 case A64CC::VS: return "vs"; 64 case A64CC::VC: return "vc"; 65 case A64CC::HI: return "hi"; 66 case A64CC::LS: return "ls"; 67 case A64CC::GE: return "ge"; 68 case A64CC::LT: return "lt"; 69 case A64CC::GT: return "gt"; 70 case A64CC::LE: return "le"; 71 case A64CC::AL: return "al"; 72 case A64CC::NV: return "nv"; 73 } 74} 75 76inline static A64CC::CondCodes A64StringToCondCode(StringRef CondStr) { 77 return StringSwitch<A64CC::CondCodes>(CondStr.lower()) 78 .Case("eq", A64CC::EQ) 79 .Case("ne", A64CC::NE) 80 .Case("ne", A64CC::NE) 81 .Case("hs", A64CC::HS) 82 .Case("cs", A64CC::HS) 83 .Case("lo", A64CC::LO) 84 .Case("cc", A64CC::LO) 85 .Case("mi", A64CC::MI) 86 .Case("pl", A64CC::PL) 87 .Case("vs", A64CC::VS) 88 .Case("vc", A64CC::VC) 89 .Case("hi", A64CC::HI) 90 .Case("ls", A64CC::LS) 91 .Case("ge", A64CC::GE) 92 .Case("lt", A64CC::LT) 93 .Case("gt", A64CC::GT) 94 .Case("le", A64CC::LE) 95 .Case("al", A64CC::AL) 96 .Case("nv", A64CC::NV) 97 .Default(A64CC::Invalid); 98} 99 100inline static A64CC::CondCodes A64InvertCondCode(A64CC::CondCodes CC) { 101 // It turns out that the condition codes have been designed so that in order 102 // to reverse the intent of the condition you only have to invert the low bit: 103 104 return static_cast<A64CC::CondCodes>(static_cast<unsigned>(CC) ^ 0x1); 105} 106 107/// Instances of this class can perform bidirectional mapping from random 108/// identifier strings to operand encodings. For example "MSR" takes a named 109/// system-register which must be encoded somehow and decoded for printing. This 110/// central location means that the information for those transformations is not 111/// duplicated and remains in sync. 112/// 113/// FIXME: currently the algorithm is a completely unoptimised linear 114/// search. Obviously this could be improved, but we would probably want to work 115/// out just how often these instructions are emitted before working on it. It 116/// might even be optimal to just reorder the tables for the common instructions 117/// rather than changing the algorithm. 118struct NamedImmMapper { 119 struct Mapping { 120 const char *Name; 121 uint32_t Value; 122 }; 123 124 template<int N> 125 NamedImmMapper(const Mapping (&Pairs)[N], uint32_t TooBigImm) 126 : Pairs(&Pairs[0]), NumPairs(N), TooBigImm(TooBigImm) {} 127 128 StringRef toString(uint32_t Value, bool &Valid) const; 129 uint32_t fromString(StringRef Name, bool &Valid) const; 130 131 /// Many of the instructions allow an alternative assembly form consisting of 132 /// a simple immediate. Currently the only valid forms are ranges [0, N) where 133 /// N being 0 indicates no immediate syntax-form is allowed. 134 bool validImm(uint32_t Value) const; 135protected: 136 const Mapping *Pairs; 137 size_t NumPairs; 138 uint32_t TooBigImm; 139}; 140 141namespace A64AT { 142 enum ATValues { 143 Invalid = -1, // Op0 Op1 CRn CRm Op2 144 S1E1R = 0x43c0, // 01 000 0111 1000 000 145 S1E2R = 0x63c0, // 01 100 0111 1000 000 146 S1E3R = 0x73c0, // 01 110 0111 1000 000 147 S1E1W = 0x43c1, // 01 000 0111 1000 001 148 S1E2W = 0x63c1, // 01 100 0111 1000 001 149 S1E3W = 0x73c1, // 01 110 0111 1000 001 150 S1E0R = 0x43c2, // 01 000 0111 1000 010 151 S1E0W = 0x43c3, // 01 000 0111 1000 011 152 S12E1R = 0x63c4, // 01 100 0111 1000 100 153 S12E1W = 0x63c5, // 01 100 0111 1000 101 154 S12E0R = 0x63c6, // 01 100 0111 1000 110 155 S12E0W = 0x63c7 // 01 100 0111 1000 111 156 }; 157 158 struct ATMapper : NamedImmMapper { 159 const static Mapping ATPairs[]; 160 161 ATMapper(); 162 }; 163 164} 165namespace A64DB { 166 enum DBValues { 167 Invalid = -1, 168 OSHLD = 0x1, 169 OSHST = 0x2, 170 OSH = 0x3, 171 NSHLD = 0x5, 172 NSHST = 0x6, 173 NSH = 0x7, 174 ISHLD = 0x9, 175 ISHST = 0xa, 176 ISH = 0xb, 177 LD = 0xd, 178 ST = 0xe, 179 SY = 0xf 180 }; 181 182 struct DBarrierMapper : NamedImmMapper { 183 const static Mapping DBarrierPairs[]; 184 185 DBarrierMapper(); 186 }; 187} 188 189namespace A64DC { 190 enum DCValues { 191 Invalid = -1, // Op1 CRn CRm Op2 192 ZVA = 0x5ba1, // 01 011 0111 0100 001 193 IVAC = 0x43b1, // 01 000 0111 0110 001 194 ISW = 0x43b2, // 01 000 0111 0110 010 195 CVAC = 0x5bd1, // 01 011 0111 1010 001 196 CSW = 0x43d2, // 01 000 0111 1010 010 197 CVAU = 0x5bd9, // 01 011 0111 1011 001 198 CIVAC = 0x5bf1, // 01 011 0111 1110 001 199 CISW = 0x43f2 // 01 000 0111 1110 010 200 }; 201 202 struct DCMapper : NamedImmMapper { 203 const static Mapping DCPairs[]; 204 205 DCMapper(); 206 }; 207 208} 209 210namespace A64IC { 211 enum ICValues { 212 Invalid = -1, // Op1 CRn CRm Op2 213 IALLUIS = 0x0388, // 000 0111 0001 000 214 IALLU = 0x03a8, // 000 0111 0101 000 215 IVAU = 0x1ba9 // 011 0111 0101 001 216 }; 217 218 219 struct ICMapper : NamedImmMapper { 220 const static Mapping ICPairs[]; 221 222 ICMapper(); 223 }; 224 225 static inline bool NeedsRegister(ICValues Val) { 226 return Val == IVAU; 227 } 228} 229 230namespace A64ISB { 231 enum ISBValues { 232 Invalid = -1, 233 SY = 0xf 234 }; 235 struct ISBMapper : NamedImmMapper { 236 const static Mapping ISBPairs[]; 237 238 ISBMapper(); 239 }; 240} 241 242namespace A64PRFM { 243 enum PRFMValues { 244 Invalid = -1, 245 PLDL1KEEP = 0x00, 246 PLDL1STRM = 0x01, 247 PLDL2KEEP = 0x02, 248 PLDL2STRM = 0x03, 249 PLDL3KEEP = 0x04, 250 PLDL3STRM = 0x05, 251 PLIL1KEEP = 0x08, 252 PLIL1STRM = 0x09, 253 PLIL2KEEP = 0x0a, 254 PLIL2STRM = 0x0b, 255 PLIL3KEEP = 0x0c, 256 PLIL3STRM = 0x0d, 257 PSTL1KEEP = 0x10, 258 PSTL1STRM = 0x11, 259 PSTL2KEEP = 0x12, 260 PSTL2STRM = 0x13, 261 PSTL3KEEP = 0x14, 262 PSTL3STRM = 0x15 263 }; 264 265 struct PRFMMapper : NamedImmMapper { 266 const static Mapping PRFMPairs[]; 267 268 PRFMMapper(); 269 }; 270} 271 272namespace A64PState { 273 enum PStateValues { 274 Invalid = -1, 275 SPSel = 0x05, 276 DAIFSet = 0x1e, 277 DAIFClr = 0x1f 278 }; 279 280 struct PStateMapper : NamedImmMapper { 281 const static Mapping PStatePairs[]; 282 283 PStateMapper(); 284 }; 285 286} 287 288namespace A64SE { 289 enum ShiftExtSpecifiers { 290 Invalid = -1, 291 LSL, 292 MSL, 293 LSR, 294 ASR, 295 ROR, 296 297 UXTB, 298 UXTH, 299 UXTW, 300 UXTX, 301 302 SXTB, 303 SXTH, 304 SXTW, 305 SXTX 306 }; 307} 308 309namespace A64Layout { 310 enum VectorLayout { 311 Invalid = -1, 312 VL_8B, 313 VL_4H, 314 VL_2S, 315 VL_1D, 316 317 VL_16B, 318 VL_8H, 319 VL_4S, 320 VL_2D, 321 322 // Bare layout for the 128-bit vector 323 // (only show ".b", ".h", ".s", ".d" without vector number) 324 VL_B, 325 VL_H, 326 VL_S, 327 VL_D 328 }; 329} 330 331inline static const char * 332A64VectorLayoutToString(A64Layout::VectorLayout Layout) { 333 switch (Layout) { 334 case A64Layout::VL_8B: return ".8b"; 335 case A64Layout::VL_4H: return ".4h"; 336 case A64Layout::VL_2S: return ".2s"; 337 case A64Layout::VL_1D: return ".1d"; 338 case A64Layout::VL_16B: return ".16b"; 339 case A64Layout::VL_8H: return ".8h"; 340 case A64Layout::VL_4S: return ".4s"; 341 case A64Layout::VL_2D: return ".2d"; 342 case A64Layout::VL_B: return ".b"; 343 case A64Layout::VL_H: return ".h"; 344 case A64Layout::VL_S: return ".s"; 345 case A64Layout::VL_D: return ".d"; 346 default: llvm_unreachable("Unknown Vector Layout"); 347 } 348} 349 350inline static A64Layout::VectorLayout 351A64StringToVectorLayout(StringRef LayoutStr) { 352 return StringSwitch<A64Layout::VectorLayout>(LayoutStr) 353 .Case(".8b", A64Layout::VL_8B) 354 .Case(".4h", A64Layout::VL_4H) 355 .Case(".2s", A64Layout::VL_2S) 356 .Case(".1d", A64Layout::VL_1D) 357 .Case(".16b", A64Layout::VL_16B) 358 .Case(".8h", A64Layout::VL_8H) 359 .Case(".4s", A64Layout::VL_4S) 360 .Case(".2d", A64Layout::VL_2D) 361 .Case(".b", A64Layout::VL_B) 362 .Case(".h", A64Layout::VL_H) 363 .Case(".s", A64Layout::VL_S) 364 .Case(".d", A64Layout::VL_D) 365 .Default(A64Layout::Invalid); 366} 367 368namespace A64SysReg { 369 enum SysRegROValues { 370 MDCCSR_EL0 = 0x9808, // 10 011 0000 0001 000 371 DBGDTRRX_EL0 = 0x9828, // 10 011 0000 0101 000 372 MDRAR_EL1 = 0x8080, // 10 000 0001 0000 000 373 OSLSR_EL1 = 0x808c, // 10 000 0001 0001 100 374 DBGAUTHSTATUS_EL1 = 0x83f6, // 10 000 0111 1110 110 375 PMCEID0_EL0 = 0xdce6, // 11 011 1001 1100 110 376 PMCEID1_EL0 = 0xdce7, // 11 011 1001 1100 111 377 MIDR_EL1 = 0xc000, // 11 000 0000 0000 000 378 CCSIDR_EL1 = 0xc800, // 11 001 0000 0000 000 379 CLIDR_EL1 = 0xc801, // 11 001 0000 0000 001 380 CTR_EL0 = 0xd801, // 11 011 0000 0000 001 381 MPIDR_EL1 = 0xc005, // 11 000 0000 0000 101 382 REVIDR_EL1 = 0xc006, // 11 000 0000 0000 110 383 AIDR_EL1 = 0xc807, // 11 001 0000 0000 111 384 DCZID_EL0 = 0xd807, // 11 011 0000 0000 111 385 ID_PFR0_EL1 = 0xc008, // 11 000 0000 0001 000 386 ID_PFR1_EL1 = 0xc009, // 11 000 0000 0001 001 387 ID_DFR0_EL1 = 0xc00a, // 11 000 0000 0001 010 388 ID_AFR0_EL1 = 0xc00b, // 11 000 0000 0001 011 389 ID_MMFR0_EL1 = 0xc00c, // 11 000 0000 0001 100 390 ID_MMFR1_EL1 = 0xc00d, // 11 000 0000 0001 101 391 ID_MMFR2_EL1 = 0xc00e, // 11 000 0000 0001 110 392 ID_MMFR3_EL1 = 0xc00f, // 11 000 0000 0001 111 393 ID_ISAR0_EL1 = 0xc010, // 11 000 0000 0010 000 394 ID_ISAR1_EL1 = 0xc011, // 11 000 0000 0010 001 395 ID_ISAR2_EL1 = 0xc012, // 11 000 0000 0010 010 396 ID_ISAR3_EL1 = 0xc013, // 11 000 0000 0010 011 397 ID_ISAR4_EL1 = 0xc014, // 11 000 0000 0010 100 398 ID_ISAR5_EL1 = 0xc015, // 11 000 0000 0010 101 399 ID_AA64PFR0_EL1 = 0xc020, // 11 000 0000 0100 000 400 ID_AA64PFR1_EL1 = 0xc021, // 11 000 0000 0100 001 401 ID_AA64DFR0_EL1 = 0xc028, // 11 000 0000 0101 000 402 ID_AA64DFR1_EL1 = 0xc029, // 11 000 0000 0101 001 403 ID_AA64AFR0_EL1 = 0xc02c, // 11 000 0000 0101 100 404 ID_AA64AFR1_EL1 = 0xc02d, // 11 000 0000 0101 101 405 ID_AA64ISAR0_EL1 = 0xc030, // 11 000 0000 0110 000 406 ID_AA64ISAR1_EL1 = 0xc031, // 11 000 0000 0110 001 407 ID_AA64MMFR0_EL1 = 0xc038, // 11 000 0000 0111 000 408 ID_AA64MMFR1_EL1 = 0xc039, // 11 000 0000 0111 001 409 MVFR0_EL1 = 0xc018, // 11 000 0000 0011 000 410 MVFR1_EL1 = 0xc019, // 11 000 0000 0011 001 411 MVFR2_EL1 = 0xc01a, // 11 000 0000 0011 010 412 RVBAR_EL1 = 0xc601, // 11 000 1100 0000 001 413 RVBAR_EL2 = 0xe601, // 11 100 1100 0000 001 414 RVBAR_EL3 = 0xf601, // 11 110 1100 0000 001 415 ISR_EL1 = 0xc608, // 11 000 1100 0001 000 416 CNTPCT_EL0 = 0xdf01, // 11 011 1110 0000 001 417 CNTVCT_EL0 = 0xdf02, // 11 011 1110 0000 010 418 419 // Trace registers 420 TRCSTATR = 0x8818, // 10 001 0000 0011 000 421 TRCIDR8 = 0x8806, // 10 001 0000 0000 110 422 TRCIDR9 = 0x880e, // 10 001 0000 0001 110 423 TRCIDR10 = 0x8816, // 10 001 0000 0010 110 424 TRCIDR11 = 0x881e, // 10 001 0000 0011 110 425 TRCIDR12 = 0x8826, // 10 001 0000 0100 110 426 TRCIDR13 = 0x882e, // 10 001 0000 0101 110 427 TRCIDR0 = 0x8847, // 10 001 0000 1000 111 428 TRCIDR1 = 0x884f, // 10 001 0000 1001 111 429 TRCIDR2 = 0x8857, // 10 001 0000 1010 111 430 TRCIDR3 = 0x885f, // 10 001 0000 1011 111 431 TRCIDR4 = 0x8867, // 10 001 0000 1100 111 432 TRCIDR5 = 0x886f, // 10 001 0000 1101 111 433 TRCIDR6 = 0x8877, // 10 001 0000 1110 111 434 TRCIDR7 = 0x887f, // 10 001 0000 1111 111 435 TRCOSLSR = 0x888c, // 10 001 0001 0001 100 436 TRCPDSR = 0x88ac, // 10 001 0001 0101 100 437 TRCDEVAFF0 = 0x8bd6, // 10 001 0111 1010 110 438 TRCDEVAFF1 = 0x8bde, // 10 001 0111 1011 110 439 TRCLSR = 0x8bee, // 10 001 0111 1101 110 440 TRCAUTHSTATUS = 0x8bf6, // 10 001 0111 1110 110 441 TRCDEVARCH = 0x8bfe, // 10 001 0111 1111 110 442 TRCDEVID = 0x8b97, // 10 001 0111 0010 111 443 TRCDEVTYPE = 0x8b9f, // 10 001 0111 0011 111 444 TRCPIDR4 = 0x8ba7, // 10 001 0111 0100 111 445 TRCPIDR5 = 0x8baf, // 10 001 0111 0101 111 446 TRCPIDR6 = 0x8bb7, // 10 001 0111 0110 111 447 TRCPIDR7 = 0x8bbf, // 10 001 0111 0111 111 448 TRCPIDR0 = 0x8bc7, // 10 001 0111 1000 111 449 TRCPIDR1 = 0x8bcf, // 10 001 0111 1001 111 450 TRCPIDR2 = 0x8bd7, // 10 001 0111 1010 111 451 TRCPIDR3 = 0x8bdf, // 10 001 0111 1011 111 452 TRCCIDR0 = 0x8be7, // 10 001 0111 1100 111 453 TRCCIDR1 = 0x8bef, // 10 001 0111 1101 111 454 TRCCIDR2 = 0x8bf7, // 10 001 0111 1110 111 455 TRCCIDR3 = 0x8bff, // 10 001 0111 1111 111 456 457 // GICv3 registers 458 ICC_IAR1_EL1 = 0xc660, // 11 000 1100 1100 000 459 ICC_IAR0_EL1 = 0xc640, // 11 000 1100 1000 000 460 ICC_HPPIR1_EL1 = 0xc662, // 11 000 1100 1100 010 461 ICC_HPPIR0_EL1 = 0xc642, // 11 000 1100 1000 010 462 ICC_RPR_EL1 = 0xc65b, // 11 000 1100 1011 011 463 ICH_VTR_EL2 = 0xe659, // 11 100 1100 1011 001 464 ICH_EISR_EL2 = 0xe65b, // 11 100 1100 1011 011 465 ICH_ELSR_EL2 = 0xe65d // 11 100 1100 1011 101 466 }; 467 468 enum SysRegWOValues { 469 DBGDTRTX_EL0 = 0x9828, // 10 011 0000 0101 000 470 OSLAR_EL1 = 0x8084, // 10 000 0001 0000 100 471 PMSWINC_EL0 = 0xdce4, // 11 011 1001 1100 100 472 473 // Trace Registers 474 TRCOSLAR = 0x8884, // 10 001 0001 0000 100 475 TRCLAR = 0x8be6, // 10 001 0111 1100 110 476 477 // GICv3 registers 478 ICC_EOIR1_EL1 = 0xc661, // 11 000 1100 1100 001 479 ICC_EOIR0_EL1 = 0xc641, // 11 000 1100 1000 001 480 ICC_DIR_EL1 = 0xc659, // 11 000 1100 1011 001 481 ICC_SGI1R_EL1 = 0xc65d, // 11 000 1100 1011 101 482 ICC_ASGI1R_EL1 = 0xc65e, // 11 000 1100 1011 110 483 ICC_SGI0R_EL1 = 0xc65f // 11 000 1100 1011 111 484 }; 485 486 enum SysRegValues { 487 Invalid = -1, // Op0 Op1 CRn CRm Op2 488 OSDTRRX_EL1 = 0x8002, // 10 000 0000 0000 010 489 OSDTRTX_EL1 = 0x801a, // 10 000 0000 0011 010 490 TEECR32_EL1 = 0x9000, // 10 010 0000 0000 000 491 MDCCINT_EL1 = 0x8010, // 10 000 0000 0010 000 492 MDSCR_EL1 = 0x8012, // 10 000 0000 0010 010 493 DBGDTR_EL0 = 0x9820, // 10 011 0000 0100 000 494 OSECCR_EL1 = 0x8032, // 10 000 0000 0110 010 495 DBGVCR32_EL2 = 0xa038, // 10 100 0000 0111 000 496 DBGBVR0_EL1 = 0x8004, // 10 000 0000 0000 100 497 DBGBVR1_EL1 = 0x800c, // 10 000 0000 0001 100 498 DBGBVR2_EL1 = 0x8014, // 10 000 0000 0010 100 499 DBGBVR3_EL1 = 0x801c, // 10 000 0000 0011 100 500 DBGBVR4_EL1 = 0x8024, // 10 000 0000 0100 100 501 DBGBVR5_EL1 = 0x802c, // 10 000 0000 0101 100 502 DBGBVR6_EL1 = 0x8034, // 10 000 0000 0110 100 503 DBGBVR7_EL1 = 0x803c, // 10 000 0000 0111 100 504 DBGBVR8_EL1 = 0x8044, // 10 000 0000 1000 100 505 DBGBVR9_EL1 = 0x804c, // 10 000 0000 1001 100 506 DBGBVR10_EL1 = 0x8054, // 10 000 0000 1010 100 507 DBGBVR11_EL1 = 0x805c, // 10 000 0000 1011 100 508 DBGBVR12_EL1 = 0x8064, // 10 000 0000 1100 100 509 DBGBVR13_EL1 = 0x806c, // 10 000 0000 1101 100 510 DBGBVR14_EL1 = 0x8074, // 10 000 0000 1110 100 511 DBGBVR15_EL1 = 0x807c, // 10 000 0000 1111 100 512 DBGBCR0_EL1 = 0x8005, // 10 000 0000 0000 101 513 DBGBCR1_EL1 = 0x800d, // 10 000 0000 0001 101 514 DBGBCR2_EL1 = 0x8015, // 10 000 0000 0010 101 515 DBGBCR3_EL1 = 0x801d, // 10 000 0000 0011 101 516 DBGBCR4_EL1 = 0x8025, // 10 000 0000 0100 101 517 DBGBCR5_EL1 = 0x802d, // 10 000 0000 0101 101 518 DBGBCR6_EL1 = 0x8035, // 10 000 0000 0110 101 519 DBGBCR7_EL1 = 0x803d, // 10 000 0000 0111 101 520 DBGBCR8_EL1 = 0x8045, // 10 000 0000 1000 101 521 DBGBCR9_EL1 = 0x804d, // 10 000 0000 1001 101 522 DBGBCR10_EL1 = 0x8055, // 10 000 0000 1010 101 523 DBGBCR11_EL1 = 0x805d, // 10 000 0000 1011 101 524 DBGBCR12_EL1 = 0x8065, // 10 000 0000 1100 101 525 DBGBCR13_EL1 = 0x806d, // 10 000 0000 1101 101 526 DBGBCR14_EL1 = 0x8075, // 10 000 0000 1110 101 527 DBGBCR15_EL1 = 0x807d, // 10 000 0000 1111 101 528 DBGWVR0_EL1 = 0x8006, // 10 000 0000 0000 110 529 DBGWVR1_EL1 = 0x800e, // 10 000 0000 0001 110 530 DBGWVR2_EL1 = 0x8016, // 10 000 0000 0010 110 531 DBGWVR3_EL1 = 0x801e, // 10 000 0000 0011 110 532 DBGWVR4_EL1 = 0x8026, // 10 000 0000 0100 110 533 DBGWVR5_EL1 = 0x802e, // 10 000 0000 0101 110 534 DBGWVR6_EL1 = 0x8036, // 10 000 0000 0110 110 535 DBGWVR7_EL1 = 0x803e, // 10 000 0000 0111 110 536 DBGWVR8_EL1 = 0x8046, // 10 000 0000 1000 110 537 DBGWVR9_EL1 = 0x804e, // 10 000 0000 1001 110 538 DBGWVR10_EL1 = 0x8056, // 10 000 0000 1010 110 539 DBGWVR11_EL1 = 0x805e, // 10 000 0000 1011 110 540 DBGWVR12_EL1 = 0x8066, // 10 000 0000 1100 110 541 DBGWVR13_EL1 = 0x806e, // 10 000 0000 1101 110 542 DBGWVR14_EL1 = 0x8076, // 10 000 0000 1110 110 543 DBGWVR15_EL1 = 0x807e, // 10 000 0000 1111 110 544 DBGWCR0_EL1 = 0x8007, // 10 000 0000 0000 111 545 DBGWCR1_EL1 = 0x800f, // 10 000 0000 0001 111 546 DBGWCR2_EL1 = 0x8017, // 10 000 0000 0010 111 547 DBGWCR3_EL1 = 0x801f, // 10 000 0000 0011 111 548 DBGWCR4_EL1 = 0x8027, // 10 000 0000 0100 111 549 DBGWCR5_EL1 = 0x802f, // 10 000 0000 0101 111 550 DBGWCR6_EL1 = 0x8037, // 10 000 0000 0110 111 551 DBGWCR7_EL1 = 0x803f, // 10 000 0000 0111 111 552 DBGWCR8_EL1 = 0x8047, // 10 000 0000 1000 111 553 DBGWCR9_EL1 = 0x804f, // 10 000 0000 1001 111 554 DBGWCR10_EL1 = 0x8057, // 10 000 0000 1010 111 555 DBGWCR11_EL1 = 0x805f, // 10 000 0000 1011 111 556 DBGWCR12_EL1 = 0x8067, // 10 000 0000 1100 111 557 DBGWCR13_EL1 = 0x806f, // 10 000 0000 1101 111 558 DBGWCR14_EL1 = 0x8077, // 10 000 0000 1110 111 559 DBGWCR15_EL1 = 0x807f, // 10 000 0000 1111 111 560 TEEHBR32_EL1 = 0x9080, // 10 010 0001 0000 000 561 OSDLR_EL1 = 0x809c, // 10 000 0001 0011 100 562 DBGPRCR_EL1 = 0x80a4, // 10 000 0001 0100 100 563 DBGCLAIMSET_EL1 = 0x83c6, // 10 000 0111 1000 110 564 DBGCLAIMCLR_EL1 = 0x83ce, // 10 000 0111 1001 110 565 CSSELR_EL1 = 0xd000, // 11 010 0000 0000 000 566 VPIDR_EL2 = 0xe000, // 11 100 0000 0000 000 567 VMPIDR_EL2 = 0xe005, // 11 100 0000 0000 101 568 CPACR_EL1 = 0xc082, // 11 000 0001 0000 010 569 SCTLR_EL1 = 0xc080, // 11 000 0001 0000 000 570 SCTLR_EL2 = 0xe080, // 11 100 0001 0000 000 571 SCTLR_EL3 = 0xf080, // 11 110 0001 0000 000 572 ACTLR_EL1 = 0xc081, // 11 000 0001 0000 001 573 ACTLR_EL2 = 0xe081, // 11 100 0001 0000 001 574 ACTLR_EL3 = 0xf081, // 11 110 0001 0000 001 575 HCR_EL2 = 0xe088, // 11 100 0001 0001 000 576 SCR_EL3 = 0xf088, // 11 110 0001 0001 000 577 MDCR_EL2 = 0xe089, // 11 100 0001 0001 001 578 SDER32_EL3 = 0xf089, // 11 110 0001 0001 001 579 CPTR_EL2 = 0xe08a, // 11 100 0001 0001 010 580 CPTR_EL3 = 0xf08a, // 11 110 0001 0001 010 581 HSTR_EL2 = 0xe08b, // 11 100 0001 0001 011 582 HACR_EL2 = 0xe08f, // 11 100 0001 0001 111 583 MDCR_EL3 = 0xf099, // 11 110 0001 0011 001 584 TTBR0_EL1 = 0xc100, // 11 000 0010 0000 000 585 TTBR0_EL2 = 0xe100, // 11 100 0010 0000 000 586 TTBR0_EL3 = 0xf100, // 11 110 0010 0000 000 587 TTBR1_EL1 = 0xc101, // 11 000 0010 0000 001 588 TCR_EL1 = 0xc102, // 11 000 0010 0000 010 589 TCR_EL2 = 0xe102, // 11 100 0010 0000 010 590 TCR_EL3 = 0xf102, // 11 110 0010 0000 010 591 VTTBR_EL2 = 0xe108, // 11 100 0010 0001 000 592 VTCR_EL2 = 0xe10a, // 11 100 0010 0001 010 593 DACR32_EL2 = 0xe180, // 11 100 0011 0000 000 594 SPSR_EL1 = 0xc200, // 11 000 0100 0000 000 595 SPSR_EL2 = 0xe200, // 11 100 0100 0000 000 596 SPSR_EL3 = 0xf200, // 11 110 0100 0000 000 597 ELR_EL1 = 0xc201, // 11 000 0100 0000 001 598 ELR_EL2 = 0xe201, // 11 100 0100 0000 001 599 ELR_EL3 = 0xf201, // 11 110 0100 0000 001 600 SP_EL0 = 0xc208, // 11 000 0100 0001 000 601 SP_EL1 = 0xe208, // 11 100 0100 0001 000 602 SP_EL2 = 0xf208, // 11 110 0100 0001 000 603 SPSel = 0xc210, // 11 000 0100 0010 000 604 NZCV = 0xda10, // 11 011 0100 0010 000 605 DAIF = 0xda11, // 11 011 0100 0010 001 606 CurrentEL = 0xc212, // 11 000 0100 0010 010 607 SPSR_irq = 0xe218, // 11 100 0100 0011 000 608 SPSR_abt = 0xe219, // 11 100 0100 0011 001 609 SPSR_und = 0xe21a, // 11 100 0100 0011 010 610 SPSR_fiq = 0xe21b, // 11 100 0100 0011 011 611 FPCR = 0xda20, // 11 011 0100 0100 000 612 FPSR = 0xda21, // 11 011 0100 0100 001 613 DSPSR_EL0 = 0xda28, // 11 011 0100 0101 000 614 DLR_EL0 = 0xda29, // 11 011 0100 0101 001 615 IFSR32_EL2 = 0xe281, // 11 100 0101 0000 001 616 AFSR0_EL1 = 0xc288, // 11 000 0101 0001 000 617 AFSR0_EL2 = 0xe288, // 11 100 0101 0001 000 618 AFSR0_EL3 = 0xf288, // 11 110 0101 0001 000 619 AFSR1_EL1 = 0xc289, // 11 000 0101 0001 001 620 AFSR1_EL2 = 0xe289, // 11 100 0101 0001 001 621 AFSR1_EL3 = 0xf289, // 11 110 0101 0001 001 622 ESR_EL1 = 0xc290, // 11 000 0101 0010 000 623 ESR_EL2 = 0xe290, // 11 100 0101 0010 000 624 ESR_EL3 = 0xf290, // 11 110 0101 0010 000 625 FPEXC32_EL2 = 0xe298, // 11 100 0101 0011 000 626 FAR_EL1 = 0xc300, // 11 000 0110 0000 000 627 FAR_EL2 = 0xe300, // 11 100 0110 0000 000 628 FAR_EL3 = 0xf300, // 11 110 0110 0000 000 629 HPFAR_EL2 = 0xe304, // 11 100 0110 0000 100 630 PAR_EL1 = 0xc3a0, // 11 000 0111 0100 000 631 PMCR_EL0 = 0xdce0, // 11 011 1001 1100 000 632 PMCNTENSET_EL0 = 0xdce1, // 11 011 1001 1100 001 633 PMCNTENCLR_EL0 = 0xdce2, // 11 011 1001 1100 010 634 PMOVSCLR_EL0 = 0xdce3, // 11 011 1001 1100 011 635 PMSELR_EL0 = 0xdce5, // 11 011 1001 1100 101 636 PMCCNTR_EL0 = 0xdce8, // 11 011 1001 1101 000 637 PMXEVTYPER_EL0 = 0xdce9, // 11 011 1001 1101 001 638 PMXEVCNTR_EL0 = 0xdcea, // 11 011 1001 1101 010 639 PMUSERENR_EL0 = 0xdcf0, // 11 011 1001 1110 000 640 PMINTENSET_EL1 = 0xc4f1, // 11 000 1001 1110 001 641 PMINTENCLR_EL1 = 0xc4f2, // 11 000 1001 1110 010 642 PMOVSSET_EL0 = 0xdcf3, // 11 011 1001 1110 011 643 MAIR_EL1 = 0xc510, // 11 000 1010 0010 000 644 MAIR_EL2 = 0xe510, // 11 100 1010 0010 000 645 MAIR_EL3 = 0xf510, // 11 110 1010 0010 000 646 AMAIR_EL1 = 0xc518, // 11 000 1010 0011 000 647 AMAIR_EL2 = 0xe518, // 11 100 1010 0011 000 648 AMAIR_EL3 = 0xf518, // 11 110 1010 0011 000 649 VBAR_EL1 = 0xc600, // 11 000 1100 0000 000 650 VBAR_EL2 = 0xe600, // 11 100 1100 0000 000 651 VBAR_EL3 = 0xf600, // 11 110 1100 0000 000 652 RMR_EL1 = 0xc602, // 11 000 1100 0000 010 653 RMR_EL2 = 0xe602, // 11 100 1100 0000 010 654 RMR_EL3 = 0xf602, // 11 110 1100 0000 010 655 CONTEXTIDR_EL1 = 0xc681, // 11 000 1101 0000 001 656 TPIDR_EL0 = 0xde82, // 11 011 1101 0000 010 657 TPIDR_EL2 = 0xe682, // 11 100 1101 0000 010 658 TPIDR_EL3 = 0xf682, // 11 110 1101 0000 010 659 TPIDRRO_EL0 = 0xde83, // 11 011 1101 0000 011 660 TPIDR_EL1 = 0xc684, // 11 000 1101 0000 100 661 CNTFRQ_EL0 = 0xdf00, // 11 011 1110 0000 000 662 CNTVOFF_EL2 = 0xe703, // 11 100 1110 0000 011 663 CNTKCTL_EL1 = 0xc708, // 11 000 1110 0001 000 664 CNTHCTL_EL2 = 0xe708, // 11 100 1110 0001 000 665 CNTP_TVAL_EL0 = 0xdf10, // 11 011 1110 0010 000 666 CNTHP_TVAL_EL2 = 0xe710, // 11 100 1110 0010 000 667 CNTPS_TVAL_EL1 = 0xff10, // 11 111 1110 0010 000 668 CNTP_CTL_EL0 = 0xdf11, // 11 011 1110 0010 001 669 CNTHP_CTL_EL2 = 0xe711, // 11 100 1110 0010 001 670 CNTPS_CTL_EL1 = 0xff11, // 11 111 1110 0010 001 671 CNTP_CVAL_EL0 = 0xdf12, // 11 011 1110 0010 010 672 CNTHP_CVAL_EL2 = 0xe712, // 11 100 1110 0010 010 673 CNTPS_CVAL_EL1 = 0xff12, // 11 111 1110 0010 010 674 CNTV_TVAL_EL0 = 0xdf18, // 11 011 1110 0011 000 675 CNTV_CTL_EL0 = 0xdf19, // 11 011 1110 0011 001 676 CNTV_CVAL_EL0 = 0xdf1a, // 11 011 1110 0011 010 677 PMEVCNTR0_EL0 = 0xdf40, // 11 011 1110 1000 000 678 PMEVCNTR1_EL0 = 0xdf41, // 11 011 1110 1000 001 679 PMEVCNTR2_EL0 = 0xdf42, // 11 011 1110 1000 010 680 PMEVCNTR3_EL0 = 0xdf43, // 11 011 1110 1000 011 681 PMEVCNTR4_EL0 = 0xdf44, // 11 011 1110 1000 100 682 PMEVCNTR5_EL0 = 0xdf45, // 11 011 1110 1000 101 683 PMEVCNTR6_EL0 = 0xdf46, // 11 011 1110 1000 110 684 PMEVCNTR7_EL0 = 0xdf47, // 11 011 1110 1000 111 685 PMEVCNTR8_EL0 = 0xdf48, // 11 011 1110 1001 000 686 PMEVCNTR9_EL0 = 0xdf49, // 11 011 1110 1001 001 687 PMEVCNTR10_EL0 = 0xdf4a, // 11 011 1110 1001 010 688 PMEVCNTR11_EL0 = 0xdf4b, // 11 011 1110 1001 011 689 PMEVCNTR12_EL0 = 0xdf4c, // 11 011 1110 1001 100 690 PMEVCNTR13_EL0 = 0xdf4d, // 11 011 1110 1001 101 691 PMEVCNTR14_EL0 = 0xdf4e, // 11 011 1110 1001 110 692 PMEVCNTR15_EL0 = 0xdf4f, // 11 011 1110 1001 111 693 PMEVCNTR16_EL0 = 0xdf50, // 11 011 1110 1010 000 694 PMEVCNTR17_EL0 = 0xdf51, // 11 011 1110 1010 001 695 PMEVCNTR18_EL0 = 0xdf52, // 11 011 1110 1010 010 696 PMEVCNTR19_EL0 = 0xdf53, // 11 011 1110 1010 011 697 PMEVCNTR20_EL0 = 0xdf54, // 11 011 1110 1010 100 698 PMEVCNTR21_EL0 = 0xdf55, // 11 011 1110 1010 101 699 PMEVCNTR22_EL0 = 0xdf56, // 11 011 1110 1010 110 700 PMEVCNTR23_EL0 = 0xdf57, // 11 011 1110 1010 111 701 PMEVCNTR24_EL0 = 0xdf58, // 11 011 1110 1011 000 702 PMEVCNTR25_EL0 = 0xdf59, // 11 011 1110 1011 001 703 PMEVCNTR26_EL0 = 0xdf5a, // 11 011 1110 1011 010 704 PMEVCNTR27_EL0 = 0xdf5b, // 11 011 1110 1011 011 705 PMEVCNTR28_EL0 = 0xdf5c, // 11 011 1110 1011 100 706 PMEVCNTR29_EL0 = 0xdf5d, // 11 011 1110 1011 101 707 PMEVCNTR30_EL0 = 0xdf5e, // 11 011 1110 1011 110 708 PMCCFILTR_EL0 = 0xdf7f, // 11 011 1110 1111 111 709 PMEVTYPER0_EL0 = 0xdf60, // 11 011 1110 1100 000 710 PMEVTYPER1_EL0 = 0xdf61, // 11 011 1110 1100 001 711 PMEVTYPER2_EL0 = 0xdf62, // 11 011 1110 1100 010 712 PMEVTYPER3_EL0 = 0xdf63, // 11 011 1110 1100 011 713 PMEVTYPER4_EL0 = 0xdf64, // 11 011 1110 1100 100 714 PMEVTYPER5_EL0 = 0xdf65, // 11 011 1110 1100 101 715 PMEVTYPER6_EL0 = 0xdf66, // 11 011 1110 1100 110 716 PMEVTYPER7_EL0 = 0xdf67, // 11 011 1110 1100 111 717 PMEVTYPER8_EL0 = 0xdf68, // 11 011 1110 1101 000 718 PMEVTYPER9_EL0 = 0xdf69, // 11 011 1110 1101 001 719 PMEVTYPER10_EL0 = 0xdf6a, // 11 011 1110 1101 010 720 PMEVTYPER11_EL0 = 0xdf6b, // 11 011 1110 1101 011 721 PMEVTYPER12_EL0 = 0xdf6c, // 11 011 1110 1101 100 722 PMEVTYPER13_EL0 = 0xdf6d, // 11 011 1110 1101 101 723 PMEVTYPER14_EL0 = 0xdf6e, // 11 011 1110 1101 110 724 PMEVTYPER15_EL0 = 0xdf6f, // 11 011 1110 1101 111 725 PMEVTYPER16_EL0 = 0xdf70, // 11 011 1110 1110 000 726 PMEVTYPER17_EL0 = 0xdf71, // 11 011 1110 1110 001 727 PMEVTYPER18_EL0 = 0xdf72, // 11 011 1110 1110 010 728 PMEVTYPER19_EL0 = 0xdf73, // 11 011 1110 1110 011 729 PMEVTYPER20_EL0 = 0xdf74, // 11 011 1110 1110 100 730 PMEVTYPER21_EL0 = 0xdf75, // 11 011 1110 1110 101 731 PMEVTYPER22_EL0 = 0xdf76, // 11 011 1110 1110 110 732 PMEVTYPER23_EL0 = 0xdf77, // 11 011 1110 1110 111 733 PMEVTYPER24_EL0 = 0xdf78, // 11 011 1110 1111 000 734 PMEVTYPER25_EL0 = 0xdf79, // 11 011 1110 1111 001 735 PMEVTYPER26_EL0 = 0xdf7a, // 11 011 1110 1111 010 736 PMEVTYPER27_EL0 = 0xdf7b, // 11 011 1110 1111 011 737 PMEVTYPER28_EL0 = 0xdf7c, // 11 011 1110 1111 100 738 PMEVTYPER29_EL0 = 0xdf7d, // 11 011 1110 1111 101 739 PMEVTYPER30_EL0 = 0xdf7e, // 11 011 1110 1111 110 740 741 // Trace registers 742 TRCPRGCTLR = 0x8808, // 10 001 0000 0001 000 743 TRCPROCSELR = 0x8810, // 10 001 0000 0010 000 744 TRCCONFIGR = 0x8820, // 10 001 0000 0100 000 745 TRCAUXCTLR = 0x8830, // 10 001 0000 0110 000 746 TRCEVENTCTL0R = 0x8840, // 10 001 0000 1000 000 747 TRCEVENTCTL1R = 0x8848, // 10 001 0000 1001 000 748 TRCSTALLCTLR = 0x8858, // 10 001 0000 1011 000 749 TRCTSCTLR = 0x8860, // 10 001 0000 1100 000 750 TRCSYNCPR = 0x8868, // 10 001 0000 1101 000 751 TRCCCCTLR = 0x8870, // 10 001 0000 1110 000 752 TRCBBCTLR = 0x8878, // 10 001 0000 1111 000 753 TRCTRACEIDR = 0x8801, // 10 001 0000 0000 001 754 TRCQCTLR = 0x8809, // 10 001 0000 0001 001 755 TRCVICTLR = 0x8802, // 10 001 0000 0000 010 756 TRCVIIECTLR = 0x880a, // 10 001 0000 0001 010 757 TRCVISSCTLR = 0x8812, // 10 001 0000 0010 010 758 TRCVIPCSSCTLR = 0x881a, // 10 001 0000 0011 010 759 TRCVDCTLR = 0x8842, // 10 001 0000 1000 010 760 TRCVDSACCTLR = 0x884a, // 10 001 0000 1001 010 761 TRCVDARCCTLR = 0x8852, // 10 001 0000 1010 010 762 TRCSEQEVR0 = 0x8804, // 10 001 0000 0000 100 763 TRCSEQEVR1 = 0x880c, // 10 001 0000 0001 100 764 TRCSEQEVR2 = 0x8814, // 10 001 0000 0010 100 765 TRCSEQRSTEVR = 0x8834, // 10 001 0000 0110 100 766 TRCSEQSTR = 0x883c, // 10 001 0000 0111 100 767 TRCEXTINSELR = 0x8844, // 10 001 0000 1000 100 768 TRCCNTRLDVR0 = 0x8805, // 10 001 0000 0000 101 769 TRCCNTRLDVR1 = 0x880d, // 10 001 0000 0001 101 770 TRCCNTRLDVR2 = 0x8815, // 10 001 0000 0010 101 771 TRCCNTRLDVR3 = 0x881d, // 10 001 0000 0011 101 772 TRCCNTCTLR0 = 0x8825, // 10 001 0000 0100 101 773 TRCCNTCTLR1 = 0x882d, // 10 001 0000 0101 101 774 TRCCNTCTLR2 = 0x8835, // 10 001 0000 0110 101 775 TRCCNTCTLR3 = 0x883d, // 10 001 0000 0111 101 776 TRCCNTVR0 = 0x8845, // 10 001 0000 1000 101 777 TRCCNTVR1 = 0x884d, // 10 001 0000 1001 101 778 TRCCNTVR2 = 0x8855, // 10 001 0000 1010 101 779 TRCCNTVR3 = 0x885d, // 10 001 0000 1011 101 780 TRCIMSPEC0 = 0x8807, // 10 001 0000 0000 111 781 TRCIMSPEC1 = 0x880f, // 10 001 0000 0001 111 782 TRCIMSPEC2 = 0x8817, // 10 001 0000 0010 111 783 TRCIMSPEC3 = 0x881f, // 10 001 0000 0011 111 784 TRCIMSPEC4 = 0x8827, // 10 001 0000 0100 111 785 TRCIMSPEC5 = 0x882f, // 10 001 0000 0101 111 786 TRCIMSPEC6 = 0x8837, // 10 001 0000 0110 111 787 TRCIMSPEC7 = 0x883f, // 10 001 0000 0111 111 788 TRCRSCTLR2 = 0x8890, // 10 001 0001 0010 000 789 TRCRSCTLR3 = 0x8898, // 10 001 0001 0011 000 790 TRCRSCTLR4 = 0x88a0, // 10 001 0001 0100 000 791 TRCRSCTLR5 = 0x88a8, // 10 001 0001 0101 000 792 TRCRSCTLR6 = 0x88b0, // 10 001 0001 0110 000 793 TRCRSCTLR7 = 0x88b8, // 10 001 0001 0111 000 794 TRCRSCTLR8 = 0x88c0, // 10 001 0001 1000 000 795 TRCRSCTLR9 = 0x88c8, // 10 001 0001 1001 000 796 TRCRSCTLR10 = 0x88d0, // 10 001 0001 1010 000 797 TRCRSCTLR11 = 0x88d8, // 10 001 0001 1011 000 798 TRCRSCTLR12 = 0x88e0, // 10 001 0001 1100 000 799 TRCRSCTLR13 = 0x88e8, // 10 001 0001 1101 000 800 TRCRSCTLR14 = 0x88f0, // 10 001 0001 1110 000 801 TRCRSCTLR15 = 0x88f8, // 10 001 0001 1111 000 802 TRCRSCTLR16 = 0x8881, // 10 001 0001 0000 001 803 TRCRSCTLR17 = 0x8889, // 10 001 0001 0001 001 804 TRCRSCTLR18 = 0x8891, // 10 001 0001 0010 001 805 TRCRSCTLR19 = 0x8899, // 10 001 0001 0011 001 806 TRCRSCTLR20 = 0x88a1, // 10 001 0001 0100 001 807 TRCRSCTLR21 = 0x88a9, // 10 001 0001 0101 001 808 TRCRSCTLR22 = 0x88b1, // 10 001 0001 0110 001 809 TRCRSCTLR23 = 0x88b9, // 10 001 0001 0111 001 810 TRCRSCTLR24 = 0x88c1, // 10 001 0001 1000 001 811 TRCRSCTLR25 = 0x88c9, // 10 001 0001 1001 001 812 TRCRSCTLR26 = 0x88d1, // 10 001 0001 1010 001 813 TRCRSCTLR27 = 0x88d9, // 10 001 0001 1011 001 814 TRCRSCTLR28 = 0x88e1, // 10 001 0001 1100 001 815 TRCRSCTLR29 = 0x88e9, // 10 001 0001 1101 001 816 TRCRSCTLR30 = 0x88f1, // 10 001 0001 1110 001 817 TRCRSCTLR31 = 0x88f9, // 10 001 0001 1111 001 818 TRCSSCCR0 = 0x8882, // 10 001 0001 0000 010 819 TRCSSCCR1 = 0x888a, // 10 001 0001 0001 010 820 TRCSSCCR2 = 0x8892, // 10 001 0001 0010 010 821 TRCSSCCR3 = 0x889a, // 10 001 0001 0011 010 822 TRCSSCCR4 = 0x88a2, // 10 001 0001 0100 010 823 TRCSSCCR5 = 0x88aa, // 10 001 0001 0101 010 824 TRCSSCCR6 = 0x88b2, // 10 001 0001 0110 010 825 TRCSSCCR7 = 0x88ba, // 10 001 0001 0111 010 826 TRCSSCSR0 = 0x88c2, // 10 001 0001 1000 010 827 TRCSSCSR1 = 0x88ca, // 10 001 0001 1001 010 828 TRCSSCSR2 = 0x88d2, // 10 001 0001 1010 010 829 TRCSSCSR3 = 0x88da, // 10 001 0001 1011 010 830 TRCSSCSR4 = 0x88e2, // 10 001 0001 1100 010 831 TRCSSCSR5 = 0x88ea, // 10 001 0001 1101 010 832 TRCSSCSR6 = 0x88f2, // 10 001 0001 1110 010 833 TRCSSCSR7 = 0x88fa, // 10 001 0001 1111 010 834 TRCSSPCICR0 = 0x8883, // 10 001 0001 0000 011 835 TRCSSPCICR1 = 0x888b, // 10 001 0001 0001 011 836 TRCSSPCICR2 = 0x8893, // 10 001 0001 0010 011 837 TRCSSPCICR3 = 0x889b, // 10 001 0001 0011 011 838 TRCSSPCICR4 = 0x88a3, // 10 001 0001 0100 011 839 TRCSSPCICR5 = 0x88ab, // 10 001 0001 0101 011 840 TRCSSPCICR6 = 0x88b3, // 10 001 0001 0110 011 841 TRCSSPCICR7 = 0x88bb, // 10 001 0001 0111 011 842 TRCPDCR = 0x88a4, // 10 001 0001 0100 100 843 TRCACVR0 = 0x8900, // 10 001 0010 0000 000 844 TRCACVR1 = 0x8910, // 10 001 0010 0010 000 845 TRCACVR2 = 0x8920, // 10 001 0010 0100 000 846 TRCACVR3 = 0x8930, // 10 001 0010 0110 000 847 TRCACVR4 = 0x8940, // 10 001 0010 1000 000 848 TRCACVR5 = 0x8950, // 10 001 0010 1010 000 849 TRCACVR6 = 0x8960, // 10 001 0010 1100 000 850 TRCACVR7 = 0x8970, // 10 001 0010 1110 000 851 TRCACVR8 = 0x8901, // 10 001 0010 0000 001 852 TRCACVR9 = 0x8911, // 10 001 0010 0010 001 853 TRCACVR10 = 0x8921, // 10 001 0010 0100 001 854 TRCACVR11 = 0x8931, // 10 001 0010 0110 001 855 TRCACVR12 = 0x8941, // 10 001 0010 1000 001 856 TRCACVR13 = 0x8951, // 10 001 0010 1010 001 857 TRCACVR14 = 0x8961, // 10 001 0010 1100 001 858 TRCACVR15 = 0x8971, // 10 001 0010 1110 001 859 TRCACATR0 = 0x8902, // 10 001 0010 0000 010 860 TRCACATR1 = 0x8912, // 10 001 0010 0010 010 861 TRCACATR2 = 0x8922, // 10 001 0010 0100 010 862 TRCACATR3 = 0x8932, // 10 001 0010 0110 010 863 TRCACATR4 = 0x8942, // 10 001 0010 1000 010 864 TRCACATR5 = 0x8952, // 10 001 0010 1010 010 865 TRCACATR6 = 0x8962, // 10 001 0010 1100 010 866 TRCACATR7 = 0x8972, // 10 001 0010 1110 010 867 TRCACATR8 = 0x8903, // 10 001 0010 0000 011 868 TRCACATR9 = 0x8913, // 10 001 0010 0010 011 869 TRCACATR10 = 0x8923, // 10 001 0010 0100 011 870 TRCACATR11 = 0x8933, // 10 001 0010 0110 011 871 TRCACATR12 = 0x8943, // 10 001 0010 1000 011 872 TRCACATR13 = 0x8953, // 10 001 0010 1010 011 873 TRCACATR14 = 0x8963, // 10 001 0010 1100 011 874 TRCACATR15 = 0x8973, // 10 001 0010 1110 011 875 TRCDVCVR0 = 0x8904, // 10 001 0010 0000 100 876 TRCDVCVR1 = 0x8924, // 10 001 0010 0100 100 877 TRCDVCVR2 = 0x8944, // 10 001 0010 1000 100 878 TRCDVCVR3 = 0x8964, // 10 001 0010 1100 100 879 TRCDVCVR4 = 0x8905, // 10 001 0010 0000 101 880 TRCDVCVR5 = 0x8925, // 10 001 0010 0100 101 881 TRCDVCVR6 = 0x8945, // 10 001 0010 1000 101 882 TRCDVCVR7 = 0x8965, // 10 001 0010 1100 101 883 TRCDVCMR0 = 0x8906, // 10 001 0010 0000 110 884 TRCDVCMR1 = 0x8926, // 10 001 0010 0100 110 885 TRCDVCMR2 = 0x8946, // 10 001 0010 1000 110 886 TRCDVCMR3 = 0x8966, // 10 001 0010 1100 110 887 TRCDVCMR4 = 0x8907, // 10 001 0010 0000 111 888 TRCDVCMR5 = 0x8927, // 10 001 0010 0100 111 889 TRCDVCMR6 = 0x8947, // 10 001 0010 1000 111 890 TRCDVCMR7 = 0x8967, // 10 001 0010 1100 111 891 TRCCIDCVR0 = 0x8980, // 10 001 0011 0000 000 892 TRCCIDCVR1 = 0x8990, // 10 001 0011 0010 000 893 TRCCIDCVR2 = 0x89a0, // 10 001 0011 0100 000 894 TRCCIDCVR3 = 0x89b0, // 10 001 0011 0110 000 895 TRCCIDCVR4 = 0x89c0, // 10 001 0011 1000 000 896 TRCCIDCVR5 = 0x89d0, // 10 001 0011 1010 000 897 TRCCIDCVR6 = 0x89e0, // 10 001 0011 1100 000 898 TRCCIDCVR7 = 0x89f0, // 10 001 0011 1110 000 899 TRCVMIDCVR0 = 0x8981, // 10 001 0011 0000 001 900 TRCVMIDCVR1 = 0x8991, // 10 001 0011 0010 001 901 TRCVMIDCVR2 = 0x89a1, // 10 001 0011 0100 001 902 TRCVMIDCVR3 = 0x89b1, // 10 001 0011 0110 001 903 TRCVMIDCVR4 = 0x89c1, // 10 001 0011 1000 001 904 TRCVMIDCVR5 = 0x89d1, // 10 001 0011 1010 001 905 TRCVMIDCVR6 = 0x89e1, // 10 001 0011 1100 001 906 TRCVMIDCVR7 = 0x89f1, // 10 001 0011 1110 001 907 TRCCIDCCTLR0 = 0x8982, // 10 001 0011 0000 010 908 TRCCIDCCTLR1 = 0x898a, // 10 001 0011 0001 010 909 TRCVMIDCCTLR0 = 0x8992, // 10 001 0011 0010 010 910 TRCVMIDCCTLR1 = 0x899a, // 10 001 0011 0011 010 911 TRCITCTRL = 0x8b84, // 10 001 0111 0000 100 912 TRCCLAIMSET = 0x8bc6, // 10 001 0111 1000 110 913 TRCCLAIMCLR = 0x8bce, // 10 001 0111 1001 110 914 915 // GICv3 registers 916 ICC_BPR1_EL1 = 0xc663, // 11 000 1100 1100 011 917 ICC_BPR0_EL1 = 0xc643, // 11 000 1100 1000 011 918 ICC_PMR_EL1 = 0xc230, // 11 000 0100 0110 000 919 ICC_CTLR_EL1 = 0xc664, // 11 000 1100 1100 100 920 ICC_CTLR_EL3 = 0xf664, // 11 110 1100 1100 100 921 ICC_SRE_EL1 = 0xc665, // 11 000 1100 1100 101 922 ICC_SRE_EL2 = 0xe64d, // 11 100 1100 1001 101 923 ICC_SRE_EL3 = 0xf665, // 11 110 1100 1100 101 924 ICC_IGRPEN0_EL1 = 0xc666, // 11 000 1100 1100 110 925 ICC_IGRPEN1_EL1 = 0xc667, // 11 000 1100 1100 111 926 ICC_IGRPEN1_EL3 = 0xf667, // 11 110 1100 1100 111 927 ICC_SEIEN_EL1 = 0xc668, // 11 000 1100 1101 000 928 ICC_AP0R0_EL1 = 0xc644, // 11 000 1100 1000 100 929 ICC_AP0R1_EL1 = 0xc645, // 11 000 1100 1000 101 930 ICC_AP0R2_EL1 = 0xc646, // 11 000 1100 1000 110 931 ICC_AP0R3_EL1 = 0xc647, // 11 000 1100 1000 111 932 ICC_AP1R0_EL1 = 0xc648, // 11 000 1100 1001 000 933 ICC_AP1R1_EL1 = 0xc649, // 11 000 1100 1001 001 934 ICC_AP1R2_EL1 = 0xc64a, // 11 000 1100 1001 010 935 ICC_AP1R3_EL1 = 0xc64b, // 11 000 1100 1001 011 936 ICH_AP0R0_EL2 = 0xe640, // 11 100 1100 1000 000 937 ICH_AP0R1_EL2 = 0xe641, // 11 100 1100 1000 001 938 ICH_AP0R2_EL2 = 0xe642, // 11 100 1100 1000 010 939 ICH_AP0R3_EL2 = 0xe643, // 11 100 1100 1000 011 940 ICH_AP1R0_EL2 = 0xe648, // 11 100 1100 1001 000 941 ICH_AP1R1_EL2 = 0xe649, // 11 100 1100 1001 001 942 ICH_AP1R2_EL2 = 0xe64a, // 11 100 1100 1001 010 943 ICH_AP1R3_EL2 = 0xe64b, // 11 100 1100 1001 011 944 ICH_HCR_EL2 = 0xe658, // 11 100 1100 1011 000 945 ICH_MISR_EL2 = 0xe65a, // 11 100 1100 1011 010 946 ICH_VMCR_EL2 = 0xe65f, // 11 100 1100 1011 111 947 ICH_VSEIR_EL2 = 0xe64c, // 11 100 1100 1001 100 948 ICH_LR0_EL2 = 0xe660, // 11 100 1100 1100 000 949 ICH_LR1_EL2 = 0xe661, // 11 100 1100 1100 001 950 ICH_LR2_EL2 = 0xe662, // 11 100 1100 1100 010 951 ICH_LR3_EL2 = 0xe663, // 11 100 1100 1100 011 952 ICH_LR4_EL2 = 0xe664, // 11 100 1100 1100 100 953 ICH_LR5_EL2 = 0xe665, // 11 100 1100 1100 101 954 ICH_LR6_EL2 = 0xe666, // 11 100 1100 1100 110 955 ICH_LR7_EL2 = 0xe667, // 11 100 1100 1100 111 956 ICH_LR8_EL2 = 0xe668, // 11 100 1100 1101 000 957 ICH_LR9_EL2 = 0xe669, // 11 100 1100 1101 001 958 ICH_LR10_EL2 = 0xe66a, // 11 100 1100 1101 010 959 ICH_LR11_EL2 = 0xe66b, // 11 100 1100 1101 011 960 ICH_LR12_EL2 = 0xe66c, // 11 100 1100 1101 100 961 ICH_LR13_EL2 = 0xe66d, // 11 100 1100 1101 101 962 ICH_LR14_EL2 = 0xe66e, // 11 100 1100 1101 110 963 ICH_LR15_EL2 = 0xe66f // 11 100 1100 1101 111 964 }; 965 966 // Note that these do not inherit from NamedImmMapper. This class is 967 // sufficiently different in its behaviour that I don't believe it's worth 968 // burdening the common NamedImmMapper with abstractions only needed in 969 // this one case. 970 struct SysRegMapper { 971 static const NamedImmMapper::Mapping SysRegPairs[]; 972 973 const NamedImmMapper::Mapping *InstPairs; 974 size_t NumInstPairs; 975 976 SysRegMapper() {} 977 uint32_t fromString(StringRef Name, bool &Valid) const; 978 std::string toString(uint32_t Bits, bool &Valid) const; 979 }; 980 981 struct MSRMapper : SysRegMapper { 982 static const NamedImmMapper::Mapping MSRPairs[]; 983 MSRMapper(); 984 }; 985 986 struct MRSMapper : SysRegMapper { 987 static const NamedImmMapper::Mapping MRSPairs[]; 988 MRSMapper(); 989 }; 990 991 uint32_t ParseGenericRegister(StringRef Name, bool &Valid); 992} 993 994namespace A64TLBI { 995 enum TLBIValues { 996 Invalid = -1, // Op0 Op1 CRn CRm Op2 997 IPAS2E1IS = 0x6401, // 01 100 1000 0000 001 998 IPAS2LE1IS = 0x6405, // 01 100 1000 0000 101 999 VMALLE1IS = 0x4418, // 01 000 1000 0011 000 1000 ALLE2IS = 0x6418, // 01 100 1000 0011 000 1001 ALLE3IS = 0x7418, // 01 110 1000 0011 000 1002 VAE1IS = 0x4419, // 01 000 1000 0011 001 1003 VAE2IS = 0x6419, // 01 100 1000 0011 001 1004 VAE3IS = 0x7419, // 01 110 1000 0011 001 1005 ASIDE1IS = 0x441a, // 01 000 1000 0011 010 1006 VAAE1IS = 0x441b, // 01 000 1000 0011 011 1007 ALLE1IS = 0x641c, // 01 100 1000 0011 100 1008 VALE1IS = 0x441d, // 01 000 1000 0011 101 1009 VALE2IS = 0x641d, // 01 100 1000 0011 101 1010 VALE3IS = 0x741d, // 01 110 1000 0011 101 1011 VMALLS12E1IS = 0x641e, // 01 100 1000 0011 110 1012 VAALE1IS = 0x441f, // 01 000 1000 0011 111 1013 IPAS2E1 = 0x6421, // 01 100 1000 0100 001 1014 IPAS2LE1 = 0x6425, // 01 100 1000 0100 101 1015 VMALLE1 = 0x4438, // 01 000 1000 0111 000 1016 ALLE2 = 0x6438, // 01 100 1000 0111 000 1017 ALLE3 = 0x7438, // 01 110 1000 0111 000 1018 VAE1 = 0x4439, // 01 000 1000 0111 001 1019 VAE2 = 0x6439, // 01 100 1000 0111 001 1020 VAE3 = 0x7439, // 01 110 1000 0111 001 1021 ASIDE1 = 0x443a, // 01 000 1000 0111 010 1022 VAAE1 = 0x443b, // 01 000 1000 0111 011 1023 ALLE1 = 0x643c, // 01 100 1000 0111 100 1024 VALE1 = 0x443d, // 01 000 1000 0111 101 1025 VALE2 = 0x643d, // 01 100 1000 0111 101 1026 VALE3 = 0x743d, // 01 110 1000 0111 101 1027 VMALLS12E1 = 0x643e, // 01 100 1000 0111 110 1028 VAALE1 = 0x443f // 01 000 1000 0111 111 1029 }; 1030 1031 struct TLBIMapper : NamedImmMapper { 1032 const static Mapping TLBIPairs[]; 1033 1034 TLBIMapper(); 1035 }; 1036 1037 static inline bool NeedsRegister(TLBIValues Val) { 1038 switch (Val) { 1039 case VMALLE1IS: 1040 case ALLE2IS: 1041 case ALLE3IS: 1042 case ALLE1IS: 1043 case VMALLS12E1IS: 1044 case VMALLE1: 1045 case ALLE2: 1046 case ALLE3: 1047 case ALLE1: 1048 case VMALLS12E1: 1049 return false; 1050 default: 1051 return true; 1052 } 1053 } 1054} 1055 1056namespace AArch64II { 1057 1058 enum TOF { 1059 //===--------------------------------------------------------------===// 1060 // AArch64 Specific MachineOperand flags. 1061 1062 MO_NO_FLAG, 1063 1064 // MO_GOT - Represents a relocation referring to the GOT entry of a given 1065 // symbol. Used in adrp. 1066 MO_GOT, 1067 1068 // MO_GOT_LO12 - Represents a relocation referring to the low 12 bits of the 1069 // GOT entry of a given symbol. Used in ldr only. 1070 MO_GOT_LO12, 1071 1072 // MO_DTPREL_* - Represents a relocation referring to the offset from a 1073 // module's dynamic thread pointer. Used in the local-dynamic TLS access 1074 // model. 1075 MO_DTPREL_G1, 1076 MO_DTPREL_G0_NC, 1077 1078 // MO_GOTTPREL_* - Represents a relocation referring to a GOT entry 1079 // providing the offset of a variable from the thread-pointer. Used in 1080 // initial-exec TLS model where this offset is assigned in the static thread 1081 // block and thus known by the dynamic linker. 1082 MO_GOTTPREL, 1083 MO_GOTTPREL_LO12, 1084 1085 // MO_TLSDESC_* - Represents a relocation referring to a GOT entry providing 1086 // a TLS descriptor chosen by the dynamic linker. Used for the 1087 // general-dynamic and local-dynamic TLS access models where very littls is 1088 // known at link-time. 1089 MO_TLSDESC, 1090 MO_TLSDESC_LO12, 1091 1092 // MO_TPREL_* - Represents a relocation referring to the offset of a 1093 // variable from the thread pointer itself. Used in the local-exec TLS 1094 // access model. 1095 MO_TPREL_G1, 1096 MO_TPREL_G0_NC, 1097 1098 // MO_LO12 - On a symbol operand, this represents a relocation containing 1099 // lower 12 bits of the address. Used in add/sub/ldr/str. 1100 MO_LO12, 1101 1102 // MO_ABS_G* - Represent the 16-bit granules of an absolute reference using 1103 // movz/movk instructions. 1104 MO_ABS_G3, 1105 MO_ABS_G2_NC, 1106 MO_ABS_G1_NC, 1107 MO_ABS_G0_NC 1108 }; 1109} 1110 1111class APFloat; 1112 1113namespace A64Imms { 1114 bool isFPImm(const APFloat &Val, uint32_t &Imm8Bits); 1115 1116 inline bool isFPImm(const APFloat &Val) { 1117 uint32_t Imm8; 1118 return isFPImm(Val, Imm8); 1119 } 1120 1121 bool isLogicalImm(unsigned RegWidth, uint64_t Imm, uint32_t &Bits); 1122 bool isLogicalImmBits(unsigned RegWidth, uint32_t Bits, uint64_t &Imm); 1123 1124 bool isMOVZImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift); 1125 bool isMOVNImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift); 1126 1127 // We sometimes want to know whether the immediate is representable with a 1128 // MOVN but *not* with a MOVZ (because that would take priority). 1129 bool isOnlyMOVNImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift); 1130 1131 uint64_t decodeNeonModImm(unsigned Val, unsigned OpCmode, unsigned &EltBits); 1132 bool decodeNeonModShiftImm(unsigned OpCmode, unsigned &ShiftImm, 1133 unsigned &ShiftOnesIn); 1134 } 1135 1136} // end namespace llvm; 1137 1138#endif 1139