1a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===// 2a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 3a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// The LLVM Compiler Infrastructure 4a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 8a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 9a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 10a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// This file defines the interfaces that ARM uses to lower LLVM code into a 11a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// selection DAG. 12a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 13a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 14a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 15a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#ifndef ARMISELLOWERING_H 16a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#define ARMISELLOWERING_H 17a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 1836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "MCTargetDesc/ARMBaseInfo.h" 19a1514e24cc24b050f53a12650e047799358833a1Chandler Carruth#include "llvm/CodeGen/CallingConvLower.h" 20a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/CodeGen/SelectionDAG.h" 21a1514e24cc24b050f53a12650e047799358833a1Chandler Carruth#include "llvm/Target/TargetLowering.h" 22a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include <vector> 23a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 24a8e2989ece6dc46df59b0768184028257f913843Evan Chengnamespace llvm { 25a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMConstantPoolValue; 2636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines class ARMSubtarget; 27a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 28a8e2989ece6dc46df59b0768184028257f913843Evan Cheng namespace ARMISD { 29a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // ARM Specific DAG Nodes 30a8e2989ece6dc46df59b0768184028257f913843Evan Cheng enum NodeType { 316aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach // Start the numbering where the builtin ops and target ops leave off. 320ba2bcfcc3149a25d08aa8aa00fb6c34a4e25bddDan Gohman FIRST_NUMBER = ISD::BUILTIN_OP_END, 33a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 34a8e2989ece6dc46df59b0768184028257f913843Evan Cheng Wrapper, // Wrapper - A wrapper node for TargetConstantPool, 35a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // TargetExternalSymbol, and TargetGlobalAddress. 365de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng WrapperPIC, // WrapperPIC - A wrapper node for TargetGlobalAddress in 375de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng // PIC mode. 38a8e2989ece6dc46df59b0768184028257f913843Evan Cheng WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable 396aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 40763a75dbf719242e7f99c6447d20b9bffb75dfa2Manman Ren // Add pseudo op to model memcpy for struct byval. 41763a75dbf719242e7f99c6447d20b9bffb75dfa2Manman Ren COPY_STRUCT_BYVAL, 42763a75dbf719242e7f99c6447d20b9bffb75dfa2Manman Ren 43a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL, // Function call. 44277f0741c5ea123b30360c382a153df238c31caeEvan Cheng CALL_PRED, // Function call that's predicable. 45a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL_NOLINK, // Function call with branch not branch-and-link. 46a8e2989ece6dc46df59b0768184028257f913843Evan Cheng tCALL, // Thumb function call. 47a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BRCOND, // Conditional branch. 48a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BR_JT, // Jumptable branch. 495657c01949dca6c012ac60d242d1a8d2ffdf5603Evan Cheng BR2_JT, // Jumptable branch (2 level - jumptable entry is a jump). 50a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RET_FLAG, // Return with a flag operand. 51bba9390fc6c0d536172c6bb4a9c93db557c1aff4Tim Northover INTRET_FLAG, // Interrupt return with an LR-offset and a flag operand. 52a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 53a8e2989ece6dc46df59b0768184028257f913843Evan Cheng PIC_ADD, // Add with a PC operand and a PIC label. 54a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 55a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMP, // ARM compare instructions. 56ad5c8808923ed5b24b586cec544e45cee539e529Bill Wendling CMN, // ARM CMN instructions. 57c0309b48b560f119982c02a81416c8c1fd208648David Goodwin CMPZ, // ARM compare that sets only Z flag. 58a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFP, // ARM VFP compare instruction, sets FPSCR. 59a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR. 60a8e2989ece6dc46df59b0768184028257f913843Evan Cheng FMSTAT, // ARM fmstat instruction. 61c892aeb26601cc5109490d30c7e170cb07f84428Evan Cheng 62a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMOV, // ARM conditional move instructions. 636aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 64218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng BCC_i64, 65218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng 663482c8003ad0c88469b7333aaf658036e3fd0468Jim Grosbach RBIT, // ARM bitreverse instruction 673482c8003ad0c88469b7333aaf658036e3fd0468Jim Grosbach 6876a312b7d1c2b41394696510506967cd0794b831Bob Wilson FTOSI, // FP to sint within a FP register. 6976a312b7d1c2b41394696510506967cd0794b831Bob Wilson FTOUI, // FP to uint within a FP register. 7076a312b7d1c2b41394696510506967cd0794b831Bob Wilson SITOF, // sint to FP within a FP register. 7176a312b7d1c2b41394696510506967cd0794b831Bob Wilson UITOF, // uint to FP within a FP register. 7276a312b7d1c2b41394696510506967cd0794b831Bob Wilson 73a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRL_FLAG, // V,Flag = srl_flag X -> srl X, 1 + save carry out. 74a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRA_FLAG, // V,Flag = sra_flag X -> sra X, 1 + save carry out. 75a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RRX, // V = RRX X, Flag -> srl X, 1 + shift in carry flag. 766aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 77342e3161d9dd4fa485b47788aa0266f9c91c3832Evan Cheng ADDC, // Add with carry 78342e3161d9dd4fa485b47788aa0266f9c91c3832Evan Cheng ADDE, // Add using carry 79342e3161d9dd4fa485b47788aa0266f9c91c3832Evan Cheng SUBC, // Sub with carry 80342e3161d9dd4fa485b47788aa0266f9c91c3832Evan Cheng SUBE, // Sub using carry 81342e3161d9dd4fa485b47788aa0266f9c91c3832Evan Cheng 82e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach VMOVRRD, // double to two gprs. 83e5165490b7ba24bb2f3043399e0d60e7f3bcf8a5Jim Grosbach VMOVDRR, // Two gprs to double. 8464f4fa5e0eb505eec3a72041bec6b3a7f7739dedLauro Ramos Venancio 85e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_SETJMP, // SjLj exception handling setjmp. 86e4ad387a5a88dae20f0f7578e55170bbc8eee2a9Jim Grosbach EH_SJLJ_LONGJMP, // SjLj exception handling longjmp. 870e0da734bbdfa1d3f55cd04db31d83b97e4556f7Jim Grosbach 8851e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen TC_RETURN, // Tail call return pseudo. 8951e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen 905bafff36c798608a189c517d37527e4a38863071Bob Wilson THREAD_POINTER, 915bafff36c798608a189c517d37527e4a38863071Bob Wilson 92861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng DYN_ALLOC, // Dynamic allocation on the stack. 93861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng 94f74a4298163a7d0b500c7f7a818829c153dc942eBob Wilson MEMBARRIER_MCR, // Memory barrier (MCR) 95dfed19fe2c34c1209108afa58e8ab014ffd894e2Evan Cheng 96dfed19fe2c34c1209108afa58e8ab014ffd894e2Evan Cheng PRELOAD, // Preload 975adfba283dc0795ba005545ce38fa5b0ada14511Andrew Trick 98cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines WIN__CHKSTK, // Windows' __chkstk call to do stack probing. 99cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 1005bafff36c798608a189c517d37527e4a38863071Bob Wilson VCEQ, // Vector compare equal. 101c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCEQZ, // Vector compare equal to zero. 1025bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGE, // Vector compare greater than or equal. 103c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCGEZ, // Vector compare greater than or equal to zero. 104c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCLEZ, // Vector compare less than or equal to zero. 1055bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGEU, // Vector compare unsigned greater than or equal. 1065bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGT, // Vector compare greater than. 107c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCGTZ, // Vector compare greater than zero. 108c24cb3551ed66830b53362f593269873cb53a0c4Owen Anderson VCLTZ, // Vector compare less than zero. 1095bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGTU, // Vector compare unsigned greater than. 1105bafff36c798608a189c517d37527e4a38863071Bob Wilson VTST, // Vector test bits. 1115bafff36c798608a189c517d37527e4a38863071Bob Wilson 1125bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift by immediate: 1135bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHL, // ...left 1145bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRs, // ...right (signed) 1155bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRu, // ...right (unsigned) 1165bafff36c798608a189c517d37527e4a38863071Bob Wilson 1175bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector rounding shift by immediate: 1185bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRs, // ...right (signed) 1195bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRu, // ...right (unsigned) 1205bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRN, // ...right narrow 1215bafff36c798608a189c517d37527e4a38863071Bob Wilson 1225bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating shift by immediate: 1235bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLs, // ...left (signed) 1245bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLu, // ...left (unsigned) 1255bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLsu, // ...left (signed to unsigned) 1265bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNs, // ...right narrow (signed) 1275bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNu, // ...right narrow (unsigned) 1285bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNsu, // ...right narrow (signed to unsigned) 1295bafff36c798608a189c517d37527e4a38863071Bob Wilson 1305bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating rounding shift by immediate: 1315bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNs, // ...right narrow (signed) 1325bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNu, // ...right narrow (unsigned) 1335bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNsu, // ...right narrow (signed to unsigned) 1345bafff36c798608a189c517d37527e4a38863071Bob Wilson 1355bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift and insert: 1365bafff36c798608a189c517d37527e4a38863071Bob Wilson VSLI, // ...left 1375bafff36c798608a189c517d37527e4a38863071Bob Wilson VSRI, // ...right 1385bafff36c798608a189c517d37527e4a38863071Bob Wilson 1395bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector get lane (VMOV scalar to ARM core register) 1405bafff36c798608a189c517d37527e4a38863071Bob Wilson // (These are used for 8- and 16-bit element types only.) 1415bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEu, // zero-extend vector extract element 1425bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEs, // sign-extend vector extract element 1435bafff36c798608a189c517d37527e4a38863071Bob Wilson 1447e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson // Vector move immediate and move negated immediate: 145cba270d042862bca213b812656a2181b0de0578eBob Wilson VMOVIMM, 1467e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson VMVNIMM, 1477e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson 148eaa192af18677c4dc5894e049514d8a6b1d6d7c2Evan Cheng // Vector move f32 immediate: 149eaa192af18677c4dc5894e049514d8a6b1d6d7c2Evan Cheng VMOVFPIMM, 150eaa192af18677c4dc5894e049514d8a6b1d6d7c2Evan Cheng 1517e3f0d26908b82bc6a3699251e0d38821610bca7Bob Wilson // Vector duplicate: 152c1d287b4b73487b6ab094a253a7357addc1d8b84Bob Wilson VDUP, 1530ce371082565330672c276f76297f46b362d74b7Bob Wilson VDUPLANE, 154a599bff101095e528198ae85739fe8b97ffba82bBob Wilson 155d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson // Vector shuffles: 156de95c1b88be44d4af916af8fba9d7940b7e98e32Bob Wilson VEXT, // extract 157d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV64, // reverse elements within 64-bit doublewords 158d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV32, // reverse elements within 32-bit words 1591c8e581832440a114c9587d41473d107de4cac74Anton Korobeynikov VREV16, // reverse elements within 16-bit halfwords 160c692cb77aaa8b16bcc7fe0c70d47adce94c43911Bob Wilson VZIP, // zip (interleave) 161c692cb77aaa8b16bcc7fe0c70d47adce94c43911Bob Wilson VUZP, // unzip (deinterleave) 1629f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson VTRN, // transpose 16369a05a7b9205fd4628ed614d1845f3879f6be949Bill Wendling VTBL1, // 1-register shuffle with mask 16469a05a7b9205fd4628ed614d1845f3879f6be949Bill Wendling VTBL2, // 2-register shuffle with mask 1659f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson 166d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson // Vector multiply long: 167d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson VMULLs, // ...signed 168d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson VMULLu, // ...unsigned 169d0b69cf1198dadbb7bdfc385334b67f60f756539Bob Wilson 17067514e90669ec9ffd954c1fcb6f8979bafcabe8aArnold Schwaighofer UMLAL, // 64bit Unsigned Accumulate Multiply 17167514e90669ec9ffd954c1fcb6f8979bafcabe8aArnold Schwaighofer SMLAL, // 64bit Signed Accumulate Multiply 17267514e90669ec9ffd954c1fcb6f8979bafcabe8aArnold Schwaighofer 17340cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // Operands of the standard BUILD_VECTOR node are not legalized, which 17440cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // is fine if BUILD_VECTORs are always lowered to shuffles or other 17540cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // operations, but for ARM some BUILD_VECTORs are legal as-is and their 17640cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // operands need to be legalized. Define an ARM-specific version of 17740cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson // BUILD_VECTOR for this purpose. 17840cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson BUILD_VECTOR, 17940cbe7d5d41d22d32e8ce773548f510fd1ee0ed9Bob Wilson 1809f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson // Floating-point max and min: 1819f6c4c141ffa9c8b13e90dce2f2285c4479ff403Bob Wilson FMAX, 182469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach FMIN, 183a0b2d332c114571716746ba90c815cfb6f68d4abJoey Gouly VMAXNM, 184a0b2d332c114571716746ba90c815cfb6f68d4abJoey Gouly VMINNM, 185469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach 186469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach // Bit-field insert 187d966817f3cb87897cbec29c967b974924fe939baOwen Anderson BFI, 1885adfba283dc0795ba005545ce38fa5b0ada14511Andrew Trick 189d966817f3cb87897cbec29c967b974924fe939baOwen Anderson // Vector OR with immediate 190080c09229739ec2b13f7bccc361994a8d26b4ed2Owen Anderson VORRIMM, 191080c09229739ec2b13f7bccc361994a8d26b4ed2Owen Anderson // Vector AND with NOT of immediate 192b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VBICIMM, 193b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson 194c0e6d780cd7a0935f545a0ec0a9ad4a6ae8db2a9Cameron Zwarich // Vector bitwise select 195c0e6d780cd7a0935f545a0ec0a9ad4a6ae8db2a9Cameron Zwarich VBSL, 196c0e6d780cd7a0935f545a0ec0a9ad4a6ae8db2a9Cameron Zwarich 197b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson // Vector load N-element structure to all lanes: 198b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE, 199b1dfa7a8e0c1972231bee636afd5239b009ba4daBob Wilson VLD3DUP, 2001c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4DUP, 2011c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson 2021c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson // NEON loads with post-increment base updates: 2031c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD1_UPD, 2041c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD2_UPD, 2051c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD3_UPD, 2061c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4_UPD, 2071c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD2LN_UPD, 2081c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD3LN_UPD, 2091c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4LN_UPD, 2101c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD2DUP_UPD, 2111c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD3DUP_UPD, 2121c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VLD4DUP_UPD, 2131c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson 2141c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson // NEON stores with post-increment base updates: 2151c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST1_UPD, 2161c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST2_UPD, 2171c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST3_UPD, 2181c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST4_UPD, 2191c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST2LN_UPD, 2201c3ef90cab9a563427bdd3c2fcd875c717750562Bob Wilson VST3LN_UPD, 221268c743a3ba44ada364938bc5ff9b1be219df54fAmara Emerson VST4LN_UPD 222a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 223a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 224a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 2255bafff36c798608a189c517d37527e4a38863071Bob Wilson /// Define some predicates that are used for node matching. 2265bafff36c798608a189c517d37527e4a38863071Bob Wilson namespace ARM { 227469bbdb597f27d6900c95b6d8ae20a45b79ce91bJim Grosbach bool isBitFieldInvertedMask(unsigned v); 2285bafff36c798608a189c517d37527e4a38863071Bob Wilson } 2295bafff36c798608a189c517d37527e4a38863071Bob Wilson 230261f2a2337990bc7cc3d9e20d3338de54b26c74cBob Wilson //===--------------------------------------------------------------------===// 23180dae195c75a3ef38854645ae3cf41f8ae835644Dale Johannesen // ARMTargetLowering - ARM Implementation of the TargetLowering interface 2326aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 233a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMTargetLowering : public TargetLowering { 234a8e2989ece6dc46df59b0768184028257f913843Evan Cheng public: 23561e729e2e9517ab2d8887bab86fb377900fa1081Dan Gohman explicit ARMTargetLowering(TargetMachine &TM); 236a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 23736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned getJumpTableEncoding() const override; 238e1102caf86c8e09387ac7ee83aae4e69d2d35fc4Jim Grosbach 23936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 2401607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 2411607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// ReplaceNodeResults - Replace the results of node with an illegal result 2421607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// type with new values built out of custom code. 2431607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// 24436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 24536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SelectionDAG &DAG) const override; 2461607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 24736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const char *getTargetNodeName(unsigned Opcode) const override; 248a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 24936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isSelectSupported(SelectSupportKind Kind) const override { 2509f40cb32ac31283f8636d516e7b10f3ad921955cNadav Rotem // ARM does not support scalar condition selects on vectors. 2519f40cb32ac31283f8636d516e7b10f3ad921955cNadav Rotem return (Kind != ScalarCondVectorVal); 2529f40cb32ac31283f8636d516e7b10f3ad921955cNadav Rotem } 2539f40cb32ac31283f8636d516e7b10f3ad921955cNadav Rotem 25428b77e968d2b01fc9da724762bd8ddcd80650e32Duncan Sands /// getSetCCResultType - Return the value type to use for ISD::SETCC. 25536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines EVT getSetCCResultType(LLVMContext &Context, EVT VT) const override; 25628b77e968d2b01fc9da724762bd8ddcd80650e32Duncan Sands 25736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines MachineBasicBlock * 258af1d8ca44a18f304f207e209b3bdb94b590f86ffDan Gohman EmitInstrWithCustomInserter(MachineInstr *MI, 25936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines MachineBasicBlock *MBB) const override; 260a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 26136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines void AdjustInstrPostInstrSelection(MachineInstr *MI, 26236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDNode *Node) const override; 26337fefc20d3a1e3934a377567d54a141f67752227Evan Cheng 264e721f5c8d3ea2cc2cc8c3c308ce8bdd8a3fc3b32Evan Cheng SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const; 26536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 26631959b19a72608051888160514977875a8027dfcEvan Cheng 26736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isDesirableToTransformToIntegerOp(unsigned Opc, EVT VT) const override; 26831959b19a72608051888160514977875a8027dfcEvan Cheng 269af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// allowsUnalignedMemoryAccesses - Returns true if the target allows 270376642ed620ecae05b68c7bc81f79aeb2065abe0Evan Cheng /// unaligned memory accesses of the specified type. Returns whether it 271376642ed620ecae05b68c7bc81f79aeb2065abe0Evan Cheng /// is "fast" by reference in the second argument. 27236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AddrSpace, 27336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool *Fast) const override; 274af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 27536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines EVT getOptimalMemOpType(uint64_t Size, 27636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned DstAlign, unsigned SrcAlign, 27736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool IsMemset, bool ZeroMemset, 27836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool MemcpyStrSrc, 27936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines MachineFunction &MF) const override; 2801a1d1fcc0b955420cdbe0b94bd01c46d4e96b429Lang Hames 281c4e8ddff0c29bfc2eb1d5bf13e947bd04d4454ffMatt Beaumont-Gay using TargetLowering::isZExtFree; 28236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isZExtFree(SDValue Val, EVT VT2) const override; 2832766a47310b05228e9bbc536d9f3a593fc31cd12Evan Cheng 28436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool allowTruncateForTailCall(Type *Ty1, Type *Ty2) const override; 2858775a51d94b277ca6ebe12a1d20bfc2bc5a53960Tim Northover 2868775a51d94b277ca6ebe12a1d20bfc2bc5a53960Tim Northover 287c9addb74883fef318140272768422656a694341fChris Lattner /// isLegalAddressingMode - Return true if the addressing mode represented 288c9addb74883fef318140272768422656a694341fChris Lattner /// by AM is legal for this target, for a load/store of the specified type. 28936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override; 290e6c835f42418c0fae6b63908d3c576a26d64cab2Evan Cheng bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const; 2916aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 29277e4751011da2d6afa930ab91f7baee39e7c7e89Evan Cheng /// isLegalICmpImmediate - Return true if the specified immediate is legal 29318f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// icmp immediate, that is the target has icmp instructions which can 29418f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// compare a register against the immediate without having to materialize 29518f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach /// the immediate into a register. 29636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isLegalICmpImmediate(int64_t Imm) const override; 29777e4751011da2d6afa930ab91f7baee39e7c7e89Evan Cheng 298cca82149adef8306a295abdc963213ae3b11bbb6Dan Gohman /// isLegalAddImmediate - Return true if the specified immediate is legal 299cca82149adef8306a295abdc963213ae3b11bbb6Dan Gohman /// add immediate, that is the target has add instructions which can 300cca82149adef8306a295abdc963213ae3b11bbb6Dan Gohman /// add a register and the immediate without having to materialize 301cca82149adef8306a295abdc963213ae3b11bbb6Dan Gohman /// the immediate into a register. 30236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isLegalAddImmediate(int64_t Imm) const override; 303cca82149adef8306a295abdc963213ae3b11bbb6Dan Gohman 304a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPreIndexedAddressParts - returns true by value, base pointer and 305a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if the node's address 306a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// can be legally represented as pre-indexed load / store address. 30736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset, 30836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines ISD::MemIndexedMode &AM, 30936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SelectionDAG &DAG) const override; 310a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 311a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPostIndexedAddressParts - returns true by value, base pointer and 312a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if this node can be 313a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// combined with a load / store to form a post-indexed load / store. 31436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, 31536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue &Offset, ISD::MemIndexedMode &AM, 31636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SelectionDAG &DAG) const override; 317a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero, 319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt &KnownOne, 320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SelectionDAG &DAG, 321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Depth) const override; 322af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 323af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 32436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool ExpandInlineAsm(CallInst *CI) const override; 32555d42003368c57d3a41c5f464d39b8440050d558Evan Cheng 32636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines ConstraintType 32736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines getConstraintType(const std::string &Constraint) const override; 32844ab89eb376af838d1123293a79975aede501464John Thompson 32944ab89eb376af838d1123293a79975aede501464John Thompson /// Examine constraint string and operand type and determine a weight value. 33044ab89eb376af838d1123293a79975aede501464John Thompson /// The operand object must already have been set up with the operand type. 33144ab89eb376af838d1123293a79975aede501464John Thompson ConstraintWeight getSingleConstraintMatchWeight( 33236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines AsmOperandInfo &info, const char *constraint) const override; 33344ab89eb376af838d1123293a79975aede501464John Thompson 3346aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach std::pair<unsigned, const TargetRegisterClass*> 335a8e2989ece6dc46df59b0768184028257f913843Evan Cheng getRegForInlineAsmConstraint(const std::string &Constraint, 33636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines MVT VT) const override; 337f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 338bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 339bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// vector. If it is invalid, don't add anything to Ops. If hasMemory is 340bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// true it means one of the asm constraint of the inline asm instruction 341bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// being processed is 'm'. 34236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, 34336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines std::vector<SDValue> &Ops, 34436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SelectionDAG &DAG) const override; 3456aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 346419e4f92635cfaa409282691437aff99062e4e0bDan Gohman const ARMSubtarget* getSubtarget() const { 347707e0184233f27e0e9f9aee0309f2daab8cfe7f8Dan Gohman return Subtarget; 348f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola } 349f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 35006b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng /// getRegClassFor - Return the register class that should be used for the 35106b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng /// specified value type. 35236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetRegisterClass *getRegClassFor(MVT VT) const override; 35306b666c7056376b8aaf40be0dc00b97b2cfceb6cEvan Cheng 354cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov /// getMaximalGlobalOffset - Returns the maximal possible offset which can 355cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov /// be used for loads / stores from the global. 35636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned getMaximalGlobalOffset() const override; 357cec36f4c1118dc8388910d4753fe7cbf88d2d793Anton Korobeynikov 35831928dfc03d92322f9f2fb1c4a7878024d3cc9d1Bill Wendling /// Returns true if a cast between SrcAS and DestAS is a noop. 35936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override { 36031928dfc03d92322f9f2fb1c4a7878024d3cc9d1Bill Wendling // Addrspacecasts are always noops. 36131928dfc03d92322f9f2fb1c4a7878024d3cc9d1Bill Wendling return true; 36231928dfc03d92322f9f2fb1c4a7878024d3cc9d1Bill Wendling } 36331928dfc03d92322f9f2fb1c4a7878024d3cc9d1Bill Wendling 364ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher /// createFastISel - This method returns a target specific FastISel object, 365ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher /// or null if the target does not support "fast" ISel. 36636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines FastISel *createFastISel(FunctionLoweringInfo &funcInfo, 36736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const TargetLibraryInfo *libInfo) const override; 368ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher 36936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines Sched::Preference getSchedulingPreference(SDNode *N) const override; 3701cc3984148be113c6e5e470f23c9ddbd37679c5fEvan Cheng 37136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool 37236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const override; 37336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; 37439382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng 37539382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// isFPImmLegal - Returns true if the target can instruction select the 37639382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// specified FP immediate natively. If false, the legalizer will 37739382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng /// materialize the FP immediate as a load from a constant pool. 37836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isFPImmLegal(const APFloat &Imm, EVT VT) const override; 37936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 38036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool getTgtMemIntrinsic(IntrinsicInfo &Info, 38136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const CallInst &I, 38236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned Intrinsic) const override; 38336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 38436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// \brief Returns true if it is beneficial to convert a load of a constant 38536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// to just the constant itself. 38636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool shouldConvertConstantLoadToIntImm(const APInt &Imm, 38736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines Type *Ty) const override; 38839382427f1095f089d73a7dd3d9a371dea75b781Evan Cheng 389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// \brief Returns true if an argument of type Ty needs to be passed in a 390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /// contiguous block of registers in calling convention CallConv. 391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool functionArgumentNeedsConsecutiveRegisters( 392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Ty, CallingConv::ID CallConv, bool isVarArg) const override; 393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 394dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *emitLoadLinked(IRBuilder<> &Builder, Value *Addr, 395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AtomicOrdering Ord) const override; 396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val, 397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *Addr, AtomicOrdering Ord) const override; 398dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool shouldExpandAtomicInIR(Instruction *Inst) const override; 400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 401d70f57b254114841892425a40944268d38ae0bcdEvan Cheng protected: 4024f6b4674be5473319ac5e70c76fd5cb964da2128Evan Cheng std::pair<const TargetRegisterClass*, uint8_t> 40336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines findRepresentativeClass(MVT VT) const override; 404d70f57b254114841892425a40944268d38ae0bcdEvan Cheng 405a8e2989ece6dc46df59b0768184028257f913843Evan Cheng private: 406a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can 407a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// make the right decision when generating code for different targets. 408a8e2989ece6dc46df59b0768184028257f913843Evan Cheng const ARMSubtarget *Subtarget; 409a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 4103144687df78731ac4ddbc716a24b951678a73f57Evan Cheng const TargetRegisterInfo *RegInfo; 4113144687df78731ac4ddbc716a24b951678a73f57Evan Cheng 4123ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1Evan Cheng const InstrItineraryData *Itins; 4133ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1Evan Cheng 414d2559bf3f30cc7400483825414489ec0fb36481aBob Wilson /// ARMPCLabelIndex - Keep track of the number of ARM PC labels created. 415a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// 416a8e2989ece6dc46df59b0768184028257f913843Evan Cheng unsigned ARMPCLabelIndex; 417a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 4180faf46c640c6747f1add89ba06631cebc4fa3afdCraig Topper void addTypeForNEON(MVT VT, MVT PromotedLdStVT, MVT PromotedBitwiseVT); 4190faf46c640c6747f1add89ba06631cebc4fa3afdCraig Topper void addDRTypeForNEON(MVT VT); 4200faf46c640c6747f1add89ba06631cebc4fa3afdCraig Topper void addQRTypeForNEON(MVT VT); 421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::pair<SDValue, SDValue> getARMXALUOOp(SDValue Op, SelectionDAG &DAG, SDValue &ARMcc) const; 4225bafff36c798608a189c517d37527e4a38863071Bob Wilson 4235bafff36c798608a189c517d37527e4a38863071Bob Wilson typedef SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPassVector; 424ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick void PassF64ArgInRegs(SDLoc dl, SelectionDAG &DAG, 4255bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue Chain, SDValue &Arg, 4265bafff36c798608a189c517d37527e4a38863071Bob Wilson RegsToPassVector &RegsToPass, 4275bafff36c798608a189c517d37527e4a38863071Bob Wilson CCValAssign &VA, CCValAssign &NextVA, 4285bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue &StackPtr, 429a0ec3f9b7b826b9b40b80199923b664bad808cceCraig Topper SmallVectorImpl<SDValue> &MemOpChains, 430d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman ISD::ArgFlagsTy Flags) const; 4315bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, 432d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue &Root, SelectionDAG &DAG, 433ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc dl) const; 4345bafff36c798608a189c517d37527e4a38863071Bob Wilson 435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CallingConv::ID getEffectiveCallingConv(CallingConv::ID CC, 436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isVarArg) const; 43718f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, 43818f30e6f5e80787808fe1455742452a5210afe07Jim Grosbach bool isVarArg) const; 43998ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, 440ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc dl, SelectionDAG &DAG, 44198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const CCValAssign &VA, 442d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman ISD::ArgFlagsTy Flags) const; 44323ff7cff52702a8bff904d8ab4c9ca67cc19d6caJim Grosbach SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const; 4445eb195153950bc7ebfc30649494a78b2096b5ef8Jim Grosbach SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const; 445a87ded2695e5bce30dbd0d2d2ac10c571bf1d161Jim Grosbach SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, 446d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman const ARMSubtarget *Subtarget) const; 447d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 448d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG) const; 449d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG) const; 450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerGlobalAddressWindows(SDValue Op, SelectionDAG &DAG) const; 451d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; 452475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, 453d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SelectionDAG &DAG) const; 454475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA, 455fd5abd546e8e035755005a654d60d6f5f74cfe2cHans Wennborg SelectionDAG &DAG, 456fd5abd546e8e035755005a654d60d6f5f74cfe2cHans Wennborg TLSModel::Model model) const; 457d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG) const; 458d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const; 459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) const; 460de2b151dbf125af49717807b9cfc1f6f7a5b9ea6Bill Wendling SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; 461d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 462d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 463515fe3a58877c745a922252a4492e866a2f1e42eEvan Cheng SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const; 4642457f2c66184e978d4ed8fa9e2128effff26cb0bEvan Cheng SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; 465d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; 466d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const; 467d858e90f039f5fcdc2fa93035e911a5a9505cc50Dan Gohman SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const; 468d1fb583128c6682bb8a7c74eafa810a9270cc8dfNate Begeman SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const; 46945b5f88938f59c495209512b545f289bf2cca90aLang Hames SDValue LowerConstantFP(SDValue Op, SelectionDAG &DAG, 47045b5f88938f59c495209512b545f289bf2cca90aLang Hames const ARMSubtarget *ST) const; 4715adfba283dc0795ba005545ce38fa5b0ada14511Andrew Trick SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG, 47211a1dfffc8b6bbe0c0936c2c70681bc74bb5cd56Bob Wilson const ARMSubtarget *ST) const; 473cb01efb7988d119d6e2aedab1740695aa6a9cc0cBob Wilson SDValue LowerFSINCOS(SDValue Op, SelectionDAG &DAG) const; 474103ba845f09252d90a05109af7174f54bf412dafRenato Golin SDValue LowerDivRem(SDValue Op, SelectionDAG &DAG) const; 475cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const; 47611a1dfffc8b6bbe0c0936c2c70681bc74bb5cd56Bob Wilson 477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned getRegisterByName(const char* RegName, EVT VT) const override; 478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4799ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// isFMAFasterThanFMulAndFAdd - Return true if an FMA operation is faster 4809ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// than a pair of fmul and fadd instructions. fmuladd intrinsics will be 4819ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// expanded to FMAs when this method returns true, otherwise fmuladd is 4829ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// expanded to fmul + fadd. 4839ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// 4849ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// ARM supports both fused and unfused multiply-add operations; we already 485ea870a53a5a0c644e5b15af5ae59d8a4378a4d2aStephen Lin /// lower a pair of fmul and fadd to the latter so it's not clear that there 4869ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// would be a gain or that the gain would be worthwhile enough to risk 4879ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin /// correctness bugs. 48836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isFMAFasterThanFMulAndFAdd(EVT VT) const override { return false; } 4899ddfe5ea6f46448cf01e114c971e6bd7ac6ad06cStephen Lin 49011a1dfffc8b6bbe0c0936c2c70681bc74bb5cd56Bob Wilson SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const; 491475871a144eb604ddaf37503397ba0941442e5fbDan Gohman 49298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 49365c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 49498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 495ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc dl, SelectionDAG &DAG, 496456ca048af35163b9f52187e92a23ee0a9f059e8Stephen Lin SmallVectorImpl<SDValue> &InVals, 497456ca048af35163b9f52187e92a23ee0a9f059e8Stephen Lin bool isThisReturn, SDValue ThisVal) const; 49898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 49936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue 50098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerFormalArguments(SDValue Chain, 50165c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 50298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 503ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc dl, SelectionDAG &DAG, 50436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SmallVectorImpl<SDValue> &InVals) const override; 50598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 506f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG, 507ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc dl, SDValue &Chain, 508f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy const Value *OrigArg, 50946abfcf4187432da728cbe452c32143da077e07fStepan Dyatkovskiy unsigned InRegsParamRecordIdx, 510f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy unsigned OffsetFromOrigArg, 511f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy unsigned ArgOffset, 512083bc97344d618884ef04bc1ba1fc4ddf14d867dStepan Dyatkovskiy unsigned ArgSize, 51336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool ForceMutable, 51436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned ByValStoreOffset, 51536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned TotalArgRegsSaveSize) const; 516f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy 517c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG, 518ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc dl, SDValue &Chain, 5190d3c8d5d16caa4c4f1310699722aa2cbe2844f21Stepan Dyatkovskiy unsigned ArgOffset, 52036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned TotalArgRegsSaveSize, 521f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy bool ForceMutable = false) const; 522c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings 523c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings void computeRegArea(CCState &CCInfo, MachineFunction &MF, 52446abfcf4187432da728cbe452c32143da077e07fStepan Dyatkovskiy unsigned InRegsParamRecordIdx, 525083bc97344d618884ef04bc1ba1fc4ddf14d867dStepan Dyatkovskiy unsigned ArgSize, 526f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy unsigned &ArgRegsSize, 527f65e4932f83ac0c36594d97fca73dc9a9fd26672Stepan Dyatkovskiy unsigned &ArgRegsSaveSize) const; 528c73158730d43e7c8bdef32b2107566a6e78a8538Stuart Hastings 52936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue 530d2ea0e10cbd158c93fb870cdd03001b9cd1156b8Justin Holewinski LowerCall(TargetLowering::CallLoweringInfo &CLI, 53136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SmallVectorImpl<SDValue> &InVals) const override; 53298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 533f222e595c0137b8a9571408257f7000c2fb95473Stuart Hastings /// HandleByVal - Target-specific cleanup for ByVal support. 53436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines void HandleByVal(CCState *, unsigned &, unsigned) const override; 535f222e595c0137b8a9571408257f7000c2fb95473Stuart Hastings 53651e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// IsEligibleForTailCallOptimization - Check whether the call is eligible 53751e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// for tail call optimization. Targets which want to do tail call 53851e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen /// optimization should implement this function. 53951e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool IsEligibleForTailCallOptimization(SDValue Callee, 54051e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen CallingConv::ID CalleeCC, 54151e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isVarArg, 54251e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isCalleeStructRet, 54351e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen bool isCallerStructRet, 54451e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen const SmallVectorImpl<ISD::OutputArg> &Outs, 545c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 54651e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen const SmallVectorImpl<ISD::InputArg> &Ins, 54751e28e634880849ed9f7c02e93c08d25dd70291bDale Johannesen SelectionDAG& DAG) const; 548350c00843bad22c5391e33e9e39a78d5d0983c8cBenjamin Kramer 54936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool CanLowerReturn(CallingConv::ID CallConv, 55036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines MachineFunction &MF, bool isVarArg, 55136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines const SmallVectorImpl<ISD::OutputArg> &Outs, 55236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines LLVMContext &Context) const override; 553350c00843bad22c5391e33e9e39a78d5d0983c8cBenjamin Kramer 55436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue 55598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerReturn(SDValue Chain, 55665c3c8f323198b99b88b109654194540cf9b3fa5Sandeep Patel CallingConv::ID CallConv, bool isVarArg, 55798ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::OutputArg> &Outs, 558c9403659a98bf6487ab6fbf40b81628b5695c02eDan Gohman const SmallVectorImpl<SDValue> &OutVals, 55936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDLoc dl, SelectionDAG &DAG) const override; 56006b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng 56136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override; 5623d2125c9dbac695c93f42c0f59fd040e413fd711Evan Cheng 56336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines bool mayBeEmittedAsTailCall(CallInst *CI) const override; 564485fafc8406db8552ba5e3ff871a6ee32694ad90Evan Cheng 56506b53c0d51f029eb754b40350faf5ba4b33c4bcbEvan Cheng SDValue getARMCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, 566ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDValue &ARMcc, SelectionDAG &DAG, SDLoc dl) const; 567218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue getVFPCmp(SDValue LHS, SDValue RHS, 568ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SelectionDAG &DAG, SDLoc dl) const; 56979f56c9618e60c390932a6866929b82c9a6d6f96Bob Wilson SDValue duplicateCmp(SDValue Cmp, SelectionDAG &DAG) const; 570218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng 571218977b53eb215e5534db2f727d109ab18817cc1Evan Cheng SDValue OptimizeVFPBrcond(SDValue Op, SelectionDAG &DAG) const; 5725278eb802fae2ee1a7b2a428596bc364d8bcd9dbJim Grosbach 573e29fa1df55584b6f07290a91e33bf742f1c549e4Bill Wendling void SetupEntryBlockForSjLj(MachineInstr *MI, 574e29fa1df55584b6f07290a91e33bf742f1c549e4Bill Wendling MachineBasicBlock *MBB, 575e29fa1df55584b6f07290a91e33bf742f1c549e4Bill Wendling MachineBasicBlock *DispatchBB, int FI) const; 576e29fa1df55584b6f07290a91e33bf742f1c549e4Bill Wendling 577f7e4aefd0f78441bef3b9eb683ecccbed9582b8aBill Wendling MachineBasicBlock *EmitSjLjDispatchBlock(MachineInstr *MI, 578f7e4aefd0f78441bef3b9eb683ecccbed9582b8aBill Wendling MachineBasicBlock *MBB) const; 579f7e4aefd0f78441bef3b9eb683ecccbed9582b8aBill Wendling 5801c3af779fc6b184204efd7e98dc16e475c251e7fAndrew Trick bool RemapAddSubWithFlags(MachineInstr *MI, MachineBasicBlock *BB) const; 58168f25571e759c1fcf2da206109647259f49f7416Manman Ren 58268f25571e759c1fcf2da206109647259f49f7416Manman Ren MachineBasicBlock *EmitStructByval(MachineInstr *MI, 58368f25571e759c1fcf2da206109647259f49f7416Manman Ren MachineBasicBlock *MBB) const; 584cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 585cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MachineBasicBlock *EmitLowered__chkstk(MachineInstr *MI, 586cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MachineBasicBlock *MBB) const; 587a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 5885adfba283dc0795ba005545ce38fa5b0ada14511Andrew Trick 58936fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson enum NEONModImmType { 59036fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson VMOVModImm, 59136fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson VMVNModImm, 59236fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson OtherModImm 59336fa3ea566c66b42e4dd7b4394be2f1e071647b8Owen Anderson }; 5945adfba283dc0795ba005545ce38fa5b0ada14511Andrew Trick 595ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher namespace ARM { 596d49edb7ab098fa0c82f59efbcf1b4eb2958f8dc3Bob Wilson FastISel *createFastISel(FunctionLoweringInfo &funcInfo, 597d49edb7ab098fa0c82f59efbcf1b4eb2958f8dc3Bob Wilson const TargetLibraryInfo *libInfo); 598ab695889c67fb499bd902e8a969d0ff02ce66788Eric Christopher } 599a8e2989ece6dc46df59b0768184028257f913843Evan Cheng} 600a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 601a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#endif // ARMISELLOWERING_H 602