ARMISelLowering.h revision d0ac234b1b3a88946ad8bb52677764f3e3eeb8b3
1a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===// 2a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 3a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// The LLVM Compiler Infrastructure 4a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 8a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 9a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 10a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// This file defines the interfaces that ARM uses to lower LLVM code into a 11a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// selection DAG. 12a8e2989ece6dc46df59b0768184028257f913843Evan Cheng// 13a8e2989ece6dc46df59b0768184028257f913843Evan Cheng//===----------------------------------------------------------------------===// 14a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 15a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#ifndef ARMISELLOWERING_H 16a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#define ARMISELLOWERING_H 17a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 18f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola#include "ARMSubtarget.h" 19a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/Target/TargetLowering.h" 20a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include "llvm/CodeGen/SelectionDAG.h" 211f595bb42950088ccb8246e6b065a96027b46ec6Bob Wilson#include "llvm/CodeGen/CallingConvLower.h" 22a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#include <vector> 23a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 24a8e2989ece6dc46df59b0768184028257f913843Evan Chengnamespace llvm { 25a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMConstantPoolValue; 26a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 27a8e2989ece6dc46df59b0768184028257f913843Evan Cheng namespace ARMISD { 28a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // ARM Specific DAG Nodes 29a8e2989ece6dc46df59b0768184028257f913843Evan Cheng enum NodeType { 306aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach // Start the numbering where the builtin ops and target ops leave off. 310ba2bcfcc3149a25d08aa8aa00fb6c34a4e25bddDan Gohman FIRST_NUMBER = ISD::BUILTIN_OP_END, 32a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 33a8e2989ece6dc46df59b0768184028257f913843Evan Cheng Wrapper, // Wrapper - A wrapper node for TargetConstantPool, 34a8e2989ece6dc46df59b0768184028257f913843Evan Cheng // TargetExternalSymbol, and TargetGlobalAddress. 35a8e2989ece6dc46df59b0768184028257f913843Evan Cheng WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable 366aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 37a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL, // Function call. 38277f0741c5ea123b30360c382a153df238c31caeEvan Cheng CALL_PRED, // Function call that's predicable. 39a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CALL_NOLINK, // Function call with branch not branch-and-link. 40a8e2989ece6dc46df59b0768184028257f913843Evan Cheng tCALL, // Thumb function call. 41a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BRCOND, // Conditional branch. 42a8e2989ece6dc46df59b0768184028257f913843Evan Cheng BR_JT, // Jumptable branch. 435657c01949dca6c012ac60d242d1a8d2ffdf5603Evan Cheng BR2_JT, // Jumptable branch (2 level - jumptable entry is a jump). 44a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RET_FLAG, // Return with a flag operand. 45a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 46a8e2989ece6dc46df59b0768184028257f913843Evan Cheng PIC_ADD, // Add with a PC operand and a PIC label. 47a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 48a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMP, // ARM compare instructions. 49c0309b48b560f119982c02a81416c8c1fd208648David Goodwin CMPZ, // ARM compare that sets only Z flag. 50a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFP, // ARM VFP compare instruction, sets FPSCR. 51a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMPFPw0, // ARM VFP compare against zero instruction, sets FPSCR. 52a8e2989ece6dc46df59b0768184028257f913843Evan Cheng FMSTAT, // ARM fmstat instruction. 53a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CMOV, // ARM conditional move instructions. 54a8e2989ece6dc46df59b0768184028257f913843Evan Cheng CNEG, // ARM conditional negate instructions. 556aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 56a8e2989ece6dc46df59b0768184028257f913843Evan Cheng FTOSI, // FP to sint within a FP register. 57a8e2989ece6dc46df59b0768184028257f913843Evan Cheng FTOUI, // FP to uint within a FP register. 58a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SITOF, // sint to FP within a FP register. 59a8e2989ece6dc46df59b0768184028257f913843Evan Cheng UITOF, // uint to FP within a FP register. 60a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 61a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRL_FLAG, // V,Flag = srl_flag X -> srl X, 1 + save carry out. 62a8e2989ece6dc46df59b0768184028257f913843Evan Cheng SRA_FLAG, // V,Flag = sra_flag X -> sra X, 1 + save carry out. 63a8e2989ece6dc46df59b0768184028257f913843Evan Cheng RRX, // V = RRX X, Flag -> srl X, 1 + shift in carry flag. 646aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 65a8e2989ece6dc46df59b0768184028257f913843Evan Cheng FMRRD, // double to two gprs. 66261f2a2337990bc7cc3d9e20d3338de54b26c74cBob Wilson FMDRR, // Two gprs to double. 6764f4fa5e0eb505eec3a72041bec6b3a7f7739dedLauro Ramos Venancio 68861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng EH_SJLJ_SETJMP, // SjLj exception handling setjmp. 69861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng EH_SJLJ_LONGJMP, // SjLj exception handling longjmp. 700e0da734bbdfa1d3f55cd04db31d83b97e4556f7Jim Grosbach 715bafff36c798608a189c517d37527e4a38863071Bob Wilson THREAD_POINTER, 725bafff36c798608a189c517d37527e4a38863071Bob Wilson 73861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng DYN_ALLOC, // Dynamic allocation on the stack. 74861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng 755bafff36c798608a189c517d37527e4a38863071Bob Wilson VCEQ, // Vector compare equal. 765bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGE, // Vector compare greater than or equal. 775bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGEU, // Vector compare unsigned greater than or equal. 785bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGT, // Vector compare greater than. 795bafff36c798608a189c517d37527e4a38863071Bob Wilson VCGTU, // Vector compare unsigned greater than. 805bafff36c798608a189c517d37527e4a38863071Bob Wilson VTST, // Vector test bits. 815bafff36c798608a189c517d37527e4a38863071Bob Wilson 825bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift by immediate: 835bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHL, // ...left 845bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRs, // ...right (signed) 855bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRu, // ...right (unsigned) 865bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLs, // ...left long (signed) 875bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLu, // ...left long (unsigned) 885bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHLLi, // ...left long (with maximum shift count) 895bafff36c798608a189c517d37527e4a38863071Bob Wilson VSHRN, // ...right narrow 905bafff36c798608a189c517d37527e4a38863071Bob Wilson 915bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector rounding shift by immediate: 925bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRs, // ...right (signed) 935bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRu, // ...right (unsigned) 945bafff36c798608a189c517d37527e4a38863071Bob Wilson VRSHRN, // ...right narrow 955bafff36c798608a189c517d37527e4a38863071Bob Wilson 965bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating shift by immediate: 975bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLs, // ...left (signed) 985bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLu, // ...left (unsigned) 995bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHLsu, // ...left (signed to unsigned) 1005bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNs, // ...right narrow (signed) 1015bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNu, // ...right narrow (unsigned) 1025bafff36c798608a189c517d37527e4a38863071Bob Wilson VQSHRNsu, // ...right narrow (signed to unsigned) 1035bafff36c798608a189c517d37527e4a38863071Bob Wilson 1045bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector saturating rounding shift by immediate: 1055bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNs, // ...right narrow (signed) 1065bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNu, // ...right narrow (unsigned) 1075bafff36c798608a189c517d37527e4a38863071Bob Wilson VQRSHRNsu, // ...right narrow (signed to unsigned) 1085bafff36c798608a189c517d37527e4a38863071Bob Wilson 1095bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector shift and insert: 1105bafff36c798608a189c517d37527e4a38863071Bob Wilson VSLI, // ...left 1115bafff36c798608a189c517d37527e4a38863071Bob Wilson VSRI, // ...right 1125bafff36c798608a189c517d37527e4a38863071Bob Wilson 1135bafff36c798608a189c517d37527e4a38863071Bob Wilson // Vector get lane (VMOV scalar to ARM core register) 1145bafff36c798608a189c517d37527e4a38863071Bob Wilson // (These are used for 8- and 16-bit element types only.) 1155bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEu, // zero-extend vector extract element 1165bafff36c798608a189c517d37527e4a38863071Bob Wilson VGETLANEs, // sign-extend vector extract element 1175bafff36c798608a189c517d37527e4a38863071Bob Wilson 118c1d287b4b73487b6ab094a253a7357addc1d8b84Bob Wilson // Vector duplicate: 119c1d287b4b73487b6ab094a253a7357addc1d8b84Bob Wilson VDUP, 1200ce371082565330672c276f76297f46b362d74b7Bob Wilson VDUPLANE, 121a599bff101095e528198ae85739fe8b97ffba82bBob Wilson 122a599bff101095e528198ae85739fe8b97ffba82bBob Wilson // Vector load/store with (de)interleaving 123a599bff101095e528198ae85739fe8b97ffba82bBob Wilson VLD2D, 124a599bff101095e528198ae85739fe8b97ffba82bBob Wilson VLD3D, 125b36ec86c01e3c3238dca621648f017aef96dda60Bob Wilson VLD4D, 126b36ec86c01e3c3238dca621648f017aef96dda60Bob Wilson VST2D, 127b36ec86c01e3c3238dca621648f017aef96dda60Bob Wilson VST3D, 128d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VST4D, 129d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson 130d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson // Vector shuffles: 131de95c1b88be44d4af916af8fba9d7940b7e98e32Bob Wilson VEXT, // extract 132d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV64, // reverse elements within 64-bit doublewords 133d8e1757eacbcbae6657558f40fdada4279a9d1edBob Wilson VREV32, // reverse elements within 32-bit words 134bab812b4b0126839fe6e026aad54c90164c89765Bob Wilson VREV16 // reverse elements within 16-bit halfwords 135a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 136a8e2989ece6dc46df59b0768184028257f913843Evan Cheng } 137a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 1385bafff36c798608a189c517d37527e4a38863071Bob Wilson /// Define some predicates that are used for node matching. 1395bafff36c798608a189c517d37527e4a38863071Bob Wilson namespace ARM { 1405bafff36c798608a189c517d37527e4a38863071Bob Wilson /// getVMOVImm - If this is a build_vector of constants which can be 1415bafff36c798608a189c517d37527e4a38863071Bob Wilson /// formed by using a VMOV instruction of the specified element size, 1425bafff36c798608a189c517d37527e4a38863071Bob Wilson /// return the constant being splatted. The ByteSize field indicates the 1435bafff36c798608a189c517d37527e4a38863071Bob Wilson /// number of bytes of each element [1248]. 1445bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue getVMOVImm(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); 1455bafff36c798608a189c517d37527e4a38863071Bob Wilson } 1465bafff36c798608a189c517d37527e4a38863071Bob Wilson 147261f2a2337990bc7cc3d9e20d3338de54b26c74cBob Wilson //===--------------------------------------------------------------------===// 14880dae195c75a3ef38854645ae3cf41f8ae835644Dale Johannesen // ARMTargetLowering - ARM Implementation of the TargetLowering interface 1496aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 150a8e2989ece6dc46df59b0768184028257f913843Evan Cheng class ARMTargetLowering : public TargetLowering { 151a8e2989ece6dc46df59b0768184028257f913843Evan Cheng int VarArgsFrameIndex; // FrameIndex for start of varargs area. 152a8e2989ece6dc46df59b0768184028257f913843Evan Cheng public: 15361e729e2e9517ab2d8887bab86fb377900fa1081Dan Gohman explicit ARMTargetLowering(TargetMachine &TM); 154a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 155475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); 1561607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 1571607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// ReplaceNodeResults - Replace the results of node with an illegal result 1581607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// type with new values built out of custom code. 1591607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands /// 1601607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 1611607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands SelectionDAG &DAG); 1621607f05cb7d77d01ce521a30232faa389dbed4e2Duncan Sands 163475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 1646aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 165a8e2989ece6dc46df59b0768184028257f913843Evan Cheng virtual const char *getTargetNodeName(unsigned Opcode) const; 166a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 167ff9b373e8f5006c629af81e2619778b4c4f5249eEvan Cheng virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI, 1681fdbc1dd4e9cb42c79a30e8dc308c322e923cc52Dan Gohman MachineBasicBlock *MBB) const; 169a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 170af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// allowsUnalignedMemoryAccesses - Returns true if the target allows 171af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// unaligned memory accesses. of the specified type. 172af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling /// FIXME: Add getOptimalMemOpType to implement memcpy with NEON? 173af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling virtual bool allowsUnalignedMemoryAccesses(EVT VT) const; 174af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 175c9addb74883fef318140272768422656a694341fChris Lattner /// isLegalAddressingMode - Return true if the addressing mode represented 176c9addb74883fef318140272768422656a694341fChris Lattner /// by AM is legal for this target, for a load/store of the specified type. 177c9addb74883fef318140272768422656a694341fChris Lattner virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const; 178e6c835f42418c0fae6b63908d3c576a26d64cab2Evan Cheng bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const; 1796aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 180a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPreIndexedAddressParts - returns true by value, base pointer and 181a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if the node's address 182a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// can be legally represented as pre-indexed load / store address. 183475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 184475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue &Offset, 185a8e2989ece6dc46df59b0768184028257f913843Evan Cheng ISD::MemIndexedMode &AM, 18673e0914848662404cf2aa18eb049ff5aae543388Dan Gohman SelectionDAG &DAG) const; 187a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 188a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// getPostIndexedAddressParts - returns true by value, base pointer and 189a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// offset pointer and addressing mode by reference if this node can be 190a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// combined with a load / store to form a post-indexed load / store. 191a8e2989ece6dc46df59b0768184028257f913843Evan Cheng virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, 192475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue &Base, SDValue &Offset, 193a8e2989ece6dc46df59b0768184028257f913843Evan Cheng ISD::MemIndexedMode &AM, 19473e0914848662404cf2aa18eb049ff5aae543388Dan Gohman SelectionDAG &DAG) const; 195a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 196475871a144eb604ddaf37503397ba0941442e5fbDan Gohman virtual void computeMaskedBitsForTargetNode(const SDValue Op, 197977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3Dan Gohman const APInt &Mask, 1986aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach APInt &KnownZero, 199fd29e0eb060ea8b4d490860329234d2ae5f5952eDan Gohman APInt &KnownOne, 200ea859be53ca13a1547c4675549946b74dc3c6f41Dan Gohman const SelectionDAG &DAG, 201a8e2989ece6dc46df59b0768184028257f913843Evan Cheng unsigned Depth) const; 202af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 203af5663405834ca7cf4a847f2efa2d624ce99b1d8Bill Wendling 2044234f57fa02b1f04a9f52a7b3c2aa22d32ac521cChris Lattner ConstraintType getConstraintType(const std::string &Constraint) const; 2056aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach std::pair<unsigned, const TargetRegisterClass*> 206a8e2989ece6dc46df59b0768184028257f913843Evan Cheng getRegForInlineAsmConstraint(const std::string &Constraint, 207e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT) const; 208a8e2989ece6dc46df59b0768184028257f913843Evan Cheng std::vector<unsigned> 209a8e2989ece6dc46df59b0768184028257f913843Evan Cheng getRegClassForInlineAsmConstraint(const std::string &Constraint, 210e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson EVT VT) const; 211f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 212bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 213bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// vector. If it is invalid, don't add anything to Ops. If hasMemory is 214bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// true it means one of the asm constraint of the inline asm instruction 215bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson /// being processed is 'm'. 216bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson virtual void LowerAsmOperandForConstraint(SDValue Op, 217bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson char ConstraintLetter, 218bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson bool hasMemory, 219bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson std::vector<SDValue> &Ops, 220bf6396bed0597238110aad5b680fd18a4f8769faBob Wilson SelectionDAG &DAG) const; 2216aa7197fb5aa478a5c813d41a11689bb6d8f7abcJim Grosbach 222707e0184233f27e0e9f9aee0309f2daab8cfe7f8Dan Gohman virtual const ARMSubtarget* getSubtarget() { 223707e0184233f27e0e9f9aee0309f2daab8cfe7f8Dan Gohman return Subtarget; 224f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola } 225f1ba1cad387dc52f3c2c5afc665edf9caad00992Rafael Espindola 226b4202b84d7e54efe5e144885c7da63e6cc465f80Bill Wendling /// getFunctionAlignment - Return the Log2 alignment of this function. 22720c568f366be211323eeaf0e45ef053278ec9ddcBill Wendling virtual unsigned getFunctionAlignment(const Function *F) const; 22820c568f366be211323eeaf0e45ef053278ec9ddcBill Wendling 229d0ac234b1b3a88946ad8bb52677764f3e3eeb8b3Anton Korobeynikov bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const; 230a8e2989ece6dc46df59b0768184028257f913843Evan Cheng private: 231a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can 232a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// make the right decision when generating code for different targets. 233a8e2989ece6dc46df59b0768184028257f913843Evan Cheng const ARMSubtarget *Subtarget; 234a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 235d2559bf3f30cc7400483825414489ec0fb36481aBob Wilson /// ARMPCLabelIndex - Keep track of the number of ARM PC labels created. 236a8e2989ece6dc46df59b0768184028257f913843Evan Cheng /// 237a8e2989ece6dc46df59b0768184028257f913843Evan Cheng unsigned ARMPCLabelIndex; 238a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 239e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addTypeForNEON(EVT VT, EVT PromotedLdStVT, EVT PromotedBitwiseVT); 240e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addDRTypeForNEON(EVT VT); 241e50ed30282bb5b4a9ed952580523f2dda16215acOwen Anderson void addQRTypeForNEON(EVT VT); 2425bafff36c798608a189c517d37527e4a38863071Bob Wilson 2435bafff36c798608a189c517d37527e4a38863071Bob Wilson typedef SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPassVector; 24498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman void PassF64ArgInRegs(DebugLoc dl, SelectionDAG &DAG, 2455bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue Chain, SDValue &Arg, 2465bafff36c798608a189c517d37527e4a38863071Bob Wilson RegsToPassVector &RegsToPass, 2475bafff36c798608a189c517d37527e4a38863071Bob Wilson CCValAssign &VA, CCValAssign &NextVA, 2485bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue &StackPtr, 2495bafff36c798608a189c517d37527e4a38863071Bob Wilson SmallVector<SDValue, 8> &MemOpChains, 2505bafff36c798608a189c517d37527e4a38863071Bob Wilson ISD::ArgFlagsTy Flags); 2515bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, 2525bafff36c798608a189c517d37527e4a38863071Bob Wilson SDValue &Root, SelectionDAG &DAG, DebugLoc dl); 2535bafff36c798608a189c517d37527e4a38863071Bob Wilson 254567d14f07cd62bfb9dd0edd90144a0a840450f7aAnton Korobeynikov CCAssignFn *CCAssignFnForNode(unsigned CC, bool Return, bool isVarArg) const; 25598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, 25698ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 25798ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const CCValAssign &VA, 25898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman ISD::ArgFlagsTy Flags); 259a599bff101095e528198ae85739fe8b97ffba82bBob Wilson SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG); 2600e0da734bbdfa1d3f55cd04db31d83b97e4556f7Jim Grosbach SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG); 261475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG); 262475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG); 263475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG); 264475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, 26564f4fa5e0eb505eec3a72041bec6b3a7f7739dedLauro Ramos Venancio SelectionDAG &DAG); 266475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerToTLSExecModels(GlobalAddressSDNode *GA, 2674102eb57bbeecbbf5b5b5122ed1ecd4cd5487878Evan Cheng SelectionDAG &DAG); 268475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG); 269475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG); 2700e0da734bbdfa1d3f55cd04db31d83b97e4556f7Jim Grosbach SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG); 271861986401e05e437cb33bfd8320d510b956fe41eEvan Cheng SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG); 272475871a144eb604ddaf37503397ba0941442e5fbDan Gohman 2730f502f6f44f2756f5cb7b17d8f1d8eae000d51b4Dale Johannesen SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, 274475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue Chain, 275475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue Dst, SDValue Src, 276475871a144eb604ddaf37503397ba0941442e5fbDan Gohman SDValue Size, unsigned Align, 277707e0184233f27e0e9f9aee0309f2daab8cfe7f8Dan Gohman bool AlwaysInline, 2781f13c686df75ddbbe15b208606ece4846d7479a8Dan Gohman const Value *DstSV, uint64_t DstSVOff, 2791f13c686df75ddbbe15b208606ece4846d7479a8Dan Gohman const Value *SrcSV, uint64_t SrcSVOff); 28098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 28198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman unsigned CallConv, bool isVarArg, 28298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 28398ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 28498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SmallVectorImpl<SDValue> &InVals); 28598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 28698ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 28798ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerFormalArguments(SDValue Chain, 28898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman unsigned CallConv, bool isVarArg, 28998ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 29098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 29198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SmallVectorImpl<SDValue> &InVals); 29298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 29398ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 29498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerCall(SDValue Chain, SDValue Callee, 29598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman unsigned CallConv, bool isVarArg, 29698ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman bool isTailCall, 29798ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::OutputArg> &Outs, 29898ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::InputArg> &Ins, 29998ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG, 30098ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman SmallVectorImpl<SDValue> &InVals); 30198ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman 30298ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman virtual SDValue 30398ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman LowerReturn(SDValue Chain, 30498ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman unsigned CallConv, bool isVarArg, 30598ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman const SmallVectorImpl<ISD::OutputArg> &Outs, 30698ca4f2a325f72374a477f9deba7d09e8999c29bDan Gohman DebugLoc dl, SelectionDAG &DAG); 307a8e2989ece6dc46df59b0768184028257f913843Evan Cheng }; 308a8e2989ece6dc46df59b0768184028257f913843Evan Cheng} 309a8e2989ece6dc46df59b0768184028257f913843Evan Cheng 310a8e2989ece6dc46df59b0768184028257f913843Evan Cheng#endif // ARMISELLOWERING_H 311