ARMJITInfo.cpp revision 437c1738ef0ca451b710c31c87166f6abfd04ec7
1//===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the JIT interfaces for the ARM target. 11// 12//===----------------------------------------------------------------------===// 13 14#define DEBUG_TYPE "jit" 15#include "ARMJITInfo.h" 16#include "ARMConstantPoolValue.h" 17#include "ARMRelocations.h" 18#include "ARMSubtarget.h" 19#include "llvm/Function.h" 20#include "llvm/CodeGen/MachineCodeEmitter.h" 21#include "llvm/Config/alloca.h" 22#include "llvm/Support/Streams.h" 23#include "llvm/System/Memory.h" 24#include <cstdlib> 25using namespace llvm; 26 27void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) { 28 abort(); 29} 30 31/// JITCompilerFunction - This contains the address of the JIT function used to 32/// compile a function lazily. 33static TargetJITInfo::JITCompilerFn JITCompilerFunction; 34 35// Get the ASMPREFIX for the current host. This is often '_'. 36#ifndef __USER_LABEL_PREFIX__ 37#define __USER_LABEL_PREFIX__ 38#endif 39#define GETASMPREFIX2(X) #X 40#define GETASMPREFIX(X) GETASMPREFIX2(X) 41#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__) 42 43// CompilationCallback stub - We can't use a C function with inline assembly in 44// it, because we the prolog/epilog inserted by GCC won't work for us (we need 45// to preserve more context and manipulate the stack directly). Instead, 46// write our own wrapper, which does things our way, so we have complete 47// control over register saving and restoring. 48extern "C" { 49#if defined(__arm__) 50 void ARMCompilationCallback(void); 51 asm( 52 ".text\n" 53 ".align 2\n" 54 ".globl " ASMPREFIX "ARMCompilationCallback\n" 55 ASMPREFIX "ARMCompilationCallback:\n" 56 // Save caller saved registers since they may contain stuff 57 // for the real target function right now. We have to act as if this 58 // whole compilation callback doesn't exist as far as the caller is 59 // concerned, so we can't just preserve the callee saved regs. 60 "stmdb sp!, {r0, r1, r2, r3, lr}\n" 61 // The LR contains the address of the stub function on entry. 62 // pass it as the argument to the C part of the callback 63 "mov r0, lr\n" 64 "sub sp, sp, #4\n" 65 // Call the C portion of the callback 66 "bl " ASMPREFIX "ARMCompilationCallbackC\n" 67 "add sp, sp, #4\n" 68 // Restoring the LR to the return address of the function that invoked 69 // the stub and de-allocating the stack space for it requires us to 70 // swap the two saved LR values on the stack, as they're backwards 71 // for what we need since the pop instruction has a pre-determined 72 // order for the registers. 73 // +--------+ 74 // 0 | LR | Original return address 75 // +--------+ 76 // 1 | LR | Stub address (start of stub) 77 // 2-5 | R3..R0 | Saved registers (we need to preserve all regs) 78 // +--------+ 79 // 80 // We need to exchange the values in slots 0 and 1 so we can 81 // return to the address in slot 1 with the address in slot 0 82 // restored to the LR. 83 "ldr r0, [sp,#20]\n" 84 "ldr r1, [sp,#16]\n" 85 "str r1, [sp,#20]\n" 86 "str r0, [sp,#16]\n" 87 // Return to the (newly modified) stub to invoke the real function. 88 // The above twiddling of the saved return addresses allows us to 89 // deallocate everything, including the LR the stub saved, all in one 90 // pop instruction. 91 "ldmia sp!, {r0, r1, r2, r3, lr, pc}\n" 92 ); 93#else // Not an ARM host 94 void ARMCompilationCallback() { 95 assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n"); 96 abort(); 97 } 98#endif 99} 100 101/// ARMCompilationCallbackC - This is the target-specific function invoked 102/// by the function stub when we did not know the real target of a call. 103/// This function must locate the start of the stub or call site and pass 104/// it into the JIT compiler function. 105extern "C" void ARMCompilationCallbackC(intptr_t StubAddr) { 106 // Get the address of the compiled code for this function. 107 intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)StubAddr); 108 109 // Rewrite the call target... so that we don't end up here every time we 110 // execute the call. We're replacing the first two instructions of the 111 // stub with: 112 // ldr pc, [pc,#-4] 113 // <addr> 114 bool ok = sys::Memory::setRangeWritable((void*)StubAddr, 8); 115 if (!ok) 116 { 117 cerr << "ERROR: Unable to mark stub writable\n"; 118 abort(); 119 } 120 *(intptr_t *)StubAddr = 0xe51ff004; 121 *(intptr_t *)(StubAddr+4) = NewVal; 122 ok = sys::Memory::setRangeExecutable((void*)StubAddr, 8); 123 if (!ok) 124 { 125 cerr << "ERROR: Unable to mark stub executable\n"; 126 abort(); 127 } 128} 129 130TargetJITInfo::LazyResolverFn 131ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) { 132 JITCompilerFunction = F; 133 return ARMCompilationCallback; 134} 135 136void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn, 137 MachineCodeEmitter &MCE) { 138 unsigned addr = (intptr_t)Fn; 139 // If this is just a call to an external function, emit a branch instead of a 140 // call. The code is the same except for one bit of the last instruction. 141 if (Fn != (void*)(intptr_t)ARMCompilationCallback) { 142 // branch to the corresponding function addr 143 // the stub is 8-byte size and 4-aligned 144 MCE.startFunctionStub(F, 8, 4); 145 MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4] 146 MCE.emitWordLE(addr); // addr of function 147 } else { 148 // The compilation callback will overwrite the first two words of this 149 // stub with indirect branch instructions targeting the compiled code. 150 // This stub sets the return address to restart the stub, so that 151 // the new branch will be invoked when we come back. 152 // 153 // branch and link to the compilation callback. 154 // the stub is 16-byte size and 4-byte aligned. 155 MCE.startFunctionStub(F, 16, 4); 156 // Save LR so the callback can determine which stub called it. 157 // The compilation callback is responsible for popping this prior 158 // to returning. 159 MCE.emitWordLE(0xe92d4000); // PUSH {lr} 160 // Set the return address to go back to the start of this stub 161 MCE.emitWordLE(0xe24fe00c); // SUB LR, PC, #12 162 // Invoke the compilation callback 163 MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4] 164 // The address of the compilation callback 165 MCE.emitWordLE((intptr_t)ARMCompilationCallback); 166 } 167 168 return MCE.finishFunctionStub(F); 169} 170 171intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const { 172 ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType(); 173 if (RT == ARM::reloc_arm_pic_jt) 174 // Destination address - jump table base. 175 return (intptr_t)(MR->getResultPointer()) - MR->getConstantVal(); 176 else if (RT == ARM::reloc_arm_jt_base) 177 // Jump table base address. 178 return getJumpTableBaseAddr(MR->getJumpTableIndex()); 179 else if (RT == ARM::reloc_arm_cp_entry) 180 // Constant pool entry address. 181 return getConstantPoolEntryAddr(MR->getConstantPoolIndex()); 182 else if (RT == ARM::reloc_arm_machine_cp_entry) { 183 const MachineConstantPoolEntry &MCPE = (*MCPEs)[MR->getConstantVal()]; 184 assert(MCPE.isMachineConstantPoolEntry() && 185 "Expecting a machine constant pool entry!"); 186 ARMConstantPoolValue *ACPV = 187 static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal); 188 assert((!ACPV->hasModifier() && !ACPV->mustAddCurrentAddress()) && 189 "Can't handle this machine constant pool entry yet!"); 190 intptr_t Addr = (intptr_t)(MR->getResultPointer()); 191 Addr -= getPCLabelAddr(ACPV->getLabelId()) + ACPV->getPCAdjustment(); 192 return Addr; 193 } 194 return (intptr_t)(MR->getResultPointer()); 195} 196 197/// relocate - Before the JIT can run a block of code that has been emitted, 198/// it must rewrite the code to contain the actual addresses of any 199/// referenced global symbols. 200void ARMJITInfo::relocate(void *Function, MachineRelocation *MR, 201 unsigned NumRelocs, unsigned char* GOTBase) { 202 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) { 203 void *RelocPos = (char*)Function + MR->getMachineCodeOffset(); 204 intptr_t ResultPtr = resolveRelocDestAddr(MR); 205 switch ((ARM::RelocationType)MR->getRelocationType()) { 206 case ARM::reloc_arm_cp_entry: 207 case ARM::reloc_arm_relative: { 208 // It is necessary to calculate the correct PC relative value. We 209 // subtract the base addr from the target addr to form a byte offset. 210 ResultPtr = ResultPtr-(intptr_t)RelocPos-8; 211 // If the result is positive, set bit U(23) to 1. 212 if (ResultPtr >= 0) 213 *((unsigned*)RelocPos) |= 1 << 23; 214 else { 215 // Otherwise, obtain the absolute value and set 216 // bit U(23) to 0. 217 ResultPtr *= -1; 218 *((unsigned*)RelocPos) &= 0xFF7FFFFF; 219 } 220 // Set the immed value calculated. 221 *((unsigned*)RelocPos) |= (unsigned)ResultPtr; 222 // Set register Rn to PC. 223 *((unsigned*)RelocPos) |= 0xF << 16; 224 break; 225 } 226 case ARM::reloc_arm_pic_jt: 227 case ARM::reloc_arm_machine_cp_entry: 228 case ARM::reloc_arm_absolute: { 229 // These addresses have already been resolved. 230 *((unsigned*)RelocPos) |= (unsigned)ResultPtr; 231 break; 232 } 233 case ARM::reloc_arm_branch: { 234 // It is necessary to calculate the correct value of signed_immed_24 235 // field. We subtract the base addr from the target addr to form a 236 // byte offset, which must be inside the range -33554432 and +33554428. 237 // Then, we set the signed_immed_24 field of the instruction to bits 238 // [25:2] of the byte offset. More details ARM-ARM p. A4-11. 239 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8; 240 ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2; 241 assert(ResultPtr >= -33554432 && ResultPtr <= 33554428); 242 *((unsigned*)RelocPos) |= ResultPtr; 243 break; 244 } 245 case ARM::reloc_arm_jt_base: { 246 // JT base - (instruction addr + 8) 247 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8; 248 *((unsigned*)RelocPos) |= ResultPtr; 249 break; 250 } 251 } 252 } 253} 254