ARMRegisterInfo.cpp revision 7ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362
17bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===- ARMRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===// 27bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 37bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// The LLVM Compiler Infrastructure 47bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 57bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// This file was developed by the "Instituto Nokia de Tecnologia" and 67bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// is distributed under the University of Illinois Open Source 77bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// License. See LICENSE.TXT for details. 87bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 97bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 107bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 117bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// This file contains the ARM implementation of the MRegisterInfo class. 127bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola// 137bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola//===----------------------------------------------------------------------===// 147bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 157bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "ARM.h" 167bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "ARMRegisterInfo.h" 177bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/CodeGen/MachineInstrBuilder.h" 187bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/CodeGen/MachineFunction.h" 197bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/CodeGen/MachineFrameInfo.h" 207bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/CodeGen/MachineLocation.h" 217bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/Type.h" 227ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola#include "llvm/Target/TargetOptions.h" 237bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "llvm/ADT/STLExtras.h" 247bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include <iostream> 257bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolausing namespace llvm; 267bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 277ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola// hasFP - Return true if the specified function should have a dedicated frame 287ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola// pointer register. This is true if the function has variable sized allocas or 297ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola// if frame pointer elimination is disabled. 307ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola// 317ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindolastatic bool hasFP(const MachineFunction &MF) { 327ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola const MachineFrameInfo *MFI = MF.getFrameInfo(); 337ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola return NoFramePointerElim || MFI->hasVarSizedObjects(); 347ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola} 357ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola 367bc59bc3952ad7842b1e079753deb32217a768a3Rafael EspindolaARMRegisterInfo::ARMRegisterInfo() 377bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP) { 387bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 397bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 407bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid ARMRegisterInfo:: 417bc59bc3952ad7842b1e079753deb32217a768a3Rafael EspindolastoreRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 427bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola unsigned SrcReg, int FI, 437bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola const TargetRegisterClass *RC) const { 447bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola assert (RC == ARM::IntRegsRegisterClass); 457a53bd0890b0529c6dd95e97611dca7a8c4d6077Rafael Espindola BuildMI(MBB, I, ARM::str, 3).addReg(SrcReg).addImm(0).addFrameIndex(FI); 467bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 477bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 487bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid ARMRegisterInfo:: 497bc59bc3952ad7842b1e079753deb32217a768a3Rafael EspindolaloadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 507bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola unsigned DestReg, int FI, 517bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola const TargetRegisterClass *RC) const { 527bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola assert (RC == ARM::IntRegsRegisterClass); 537a53bd0890b0529c6dd95e97611dca7a8c4d6077Rafael Espindola BuildMI(MBB, I, ARM::ldr, 2, DestReg).addImm(0).addFrameIndex(FI); 547bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 557bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 567bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB, 577bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola MachineBasicBlock::iterator I, 587bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola unsigned DestReg, unsigned SrcReg, 597bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola const TargetRegisterClass *RC) const { 60199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola assert(RC == ARM::IntRegsRegisterClass || 61199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola RC == ARM::FPRegsRegisterClass || 62199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola RC == ARM::DFPRegsRegisterClass); 63199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola 64199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola if (RC == ARM::IntRegsRegisterClass) 65199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola BuildMI(MBB, I, ARM::MOV, 3, DestReg).addReg(SrcReg).addImm(0) 66199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola .addImm(ARMShift::LSL); 67199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola else if (RC == ARM::FPRegsRegisterClass) 68199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola BuildMI(MBB, I, ARM::FCPYS, 1, DestReg).addReg(SrcReg); 69199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola else 70199dd67c50990a45876b871008cad0dad0f63b88Rafael Espindola BuildMI(MBB, I, ARM::FCPYD, 1, DestReg).addReg(SrcReg); 717bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 727bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 737bc59bc3952ad7842b1e079753deb32217a768a3Rafael EspindolaMachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr* MI, 747bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola unsigned OpNum, 757bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola int FI) const { 767bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola return NULL; 777bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 787bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 790f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Chengconst unsigned* ARMRegisterInfo::getCalleeSaveRegs() const { 80ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola static const unsigned CalleeSaveRegs[] = { 81ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola ARM::R4, ARM::R5, ARM::R6, ARM::R7, 82ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola ARM::R8, ARM::R9, ARM::R10, ARM::R11, 83ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola ARM::R14, 0 84ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola }; 850f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng return CalleeSaveRegs; 860f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng} 870f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng 880f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Chengconst TargetRegisterClass* const * 890f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan ChengARMRegisterInfo::getCalleeSaveRegClasses() const { 90ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola static const TargetRegisterClass * const CalleeSaveRegClasses[] = { 91ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, 92ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, &ARM::IntRegsRegClass, 93ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola &ARM::IntRegsRegClass, 0 94ec46ea34dcc615558294e9e0dbd0dd0f2894f574Rafael Espindola }; 950f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng return CalleeSaveRegClasses; 960f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng} 970f3ac8d8d4ce23eb2ae6f9d850f389250874eea5Evan Cheng 987bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid ARMRegisterInfo:: 997bc59bc3952ad7842b1e079753deb32217a768a3Rafael EspindolaeliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 1007bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola MachineBasicBlock::iterator I) const { 1017ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola if (hasFP(MF)) { 1027ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola assert(0); 1037ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola } 1047bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola MBB.erase(I); 1057bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 1067bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 1077bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid 1087bc59bc3952ad7842b1e079753deb32217a768a3Rafael EspindolaARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const { 10958421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola MachineInstr &MI = *II; 11058421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola MachineBasicBlock &MBB = *MI.getParent(); 11158421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola MachineFunction &MF = *MBB.getParent(); 11258421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola 1137a53bd0890b0529c6dd95e97611dca7a8c4d6077Rafael Espindola assert (MI.getOpcode() == ARM::ldr || 114f3a335cedff423438789c593d58be068b124dc1eRafael Espindola MI.getOpcode() == ARM::str || 115f3a335cedff423438789c593d58be068b124dc1eRafael Espindola MI.getOpcode() == ARM::lea_addri); 11658421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola 117a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola unsigned FrameIdx = 2; 118a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola unsigned OffIdx = 1; 11958421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola 12058421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola int FrameIndex = MI.getOperand(FrameIdx).getFrameIndex(); 12158421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola 1220d479ecbb132e324da27b674fea5b232115fe964Rafael Espindola int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) + 1230d479ecbb132e324da27b674fea5b232115fe964Rafael Espindola MI.getOperand(OffIdx).getImmedValue(); 12458421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola 12558421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola unsigned StackSize = MF.getFrameInfo()->getStackSize(); 12658421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola 12758421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola Offset += StackSize; 12858421d7d0847bbb5f4cc95c647726d55c45582c0Rafael Espindola 129a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola assert (Offset >= 0); 1307ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola unsigned BaseRegister = hasFP(MF) ? ARM::R11 : ARM::R13; 131a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola if (Offset < 4096) { 132a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola // Replace the FrameIndex with r13 1337ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola MI.getOperand(FrameIdx).ChangeToRegister(BaseRegister, false); 134a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola // Replace the ldr offset with Offset 135a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola MI.getOperand(OffIdx).ChangeToImmediate(Offset); 136a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola } else { 137a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola // Insert a set of r12 with the full address 138a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola // r12 = r13 + offset 139a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola MachineBasicBlock *MBB2 = MI.getParent(); 1407ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola BuildMI(*MBB2, II, ARM::ADD, 4, ARM::R12).addReg(BaseRegister) 1417ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola .addImm(Offset).addImm(0).addImm(ARMShift::LSL); 142a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola 143a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola // Replace the FrameIndex with r12 14409e460662a8d7328da1b938d5581a6ef3740b51dChris Lattner MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12, false); 145a4e64359aafaf23e440e9dc171859daef1995f1bRafael Espindola } 1467bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 1477bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 1487bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid ARMRegisterInfo:: 1497bc59bc3952ad7842b1e079753deb32217a768a3Rafael EspindolaprocessFunctionBeforeFrameFinalized(MachineFunction &MF) const {} 1507bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 1517bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { 152355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola MachineBasicBlock &MBB = MF.front(); 15344819cb20ab8e84fc14ea1e6fc69fb797c70a50dRafael Espindola MachineBasicBlock::iterator MBBI = MBB.begin(); 154355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola MachineFrameInfo *MFI = MF.getFrameInfo(); 155355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola int NumBytes = (int) MFI->getStackSize(); 156355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola 1577ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola bool HasFP = hasFP(MF); 1587ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola 1591a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola if (MFI->hasCalls()) { 1601a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola // We reserve argument space for call sites in the function immediately on 1611a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola // entry to the current function. This eliminates the need for add/sub 1621a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola // brackets around call sites. 1631a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola NumBytes += MFI->getMaxCallFrameSize(); 1641a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola } 1651a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola 1667ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola if (HasFP) 1677ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola // Add space for storing the FP 1687ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola NumBytes += 4; 1697ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola 1701b5076887e32f9a16a1f65f3ce9abf11c31abcd7Rafael Espindola // Align to 8 bytes 1711b5076887e32f9a16a1f65f3ce9abf11c31abcd7Rafael Espindola NumBytes = ((NumBytes + 7) / 8) * 8; 1721b5076887e32f9a16a1f65f3ce9abf11c31abcd7Rafael Espindola 1731a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola MFI->setStackSize(NumBytes); 1741a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola 1751a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola //sub sp, sp, #NumBytes 1763ad5e5cf998841681e9d11e08eb82a94ddffd1f8Rafael Espindola BuildMI(MBB, MBBI, ARM::SUB, 4, ARM::R13).addReg(ARM::R13).addImm(NumBytes) 1773ad5e5cf998841681e9d11e08eb82a94ddffd1f8Rafael Espindola .addImm(0).addImm(ARMShift::LSL); 1787ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola 1797ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola if (HasFP) { 1807ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola BuildMI(MBB, MBBI, ARM::str, 3) 1817ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola .addReg(ARM::R11).addImm(0).addReg(ARM::R13); 1827ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola BuildMI(MBB, MBBI, ARM::MOV, 3, ARM::R11).addReg(ARM::R13).addImm(0). 1837ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola addImm(ARMShift::LSL); 1847ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola } 1857bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 1867bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 1877bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolavoid ARMRegisterInfo::emitEpilogue(MachineFunction &MF, 1887bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola MachineBasicBlock &MBB) const { 189355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola MachineBasicBlock::iterator MBBI = prior(MBB.end()); 190355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola assert(MBBI->getOpcode() == ARM::bx && 191355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola "Can only insert epilog into returning blocks"); 192355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola 193355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola MachineFrameInfo *MFI = MF.getFrameInfo(); 194355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola int NumBytes = (int) MFI->getStackSize(); 195355746359ebca83ccb5accab0f3ffd20f0374a35Rafael Espindola 1967ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola if (hasFP(MF)) { 1977ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola BuildMI(MBB, MBBI, ARM::MOV, 3, ARM::R13).addReg(ARM::R11).addImm(0). 1987ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola addImm(ARMShift::LSL); 1997ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola BuildMI(MBB, MBBI, ARM::ldr, 2, ARM::R11).addImm(0).addReg(ARM::R13); 2007ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola } 2017ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola 2021a009468175a6e123cc3f1e847c10e3e126a44dbRafael Espindola //add sp, sp, #NumBytes 2033ad5e5cf998841681e9d11e08eb82a94ddffd1f8Rafael Espindola BuildMI(MBB, MBBI, ARM::ADD, 4, ARM::R13).addReg(ARM::R13).addImm(NumBytes) 2043ad5e5cf998841681e9d11e08eb82a94ddffd1f8Rafael Espindola .addImm(0).addImm(ARMShift::LSL); 2057bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 2067bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 2077bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolaunsigned ARMRegisterInfo::getRARegister() const { 2087bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola return ARM::R14; 2097bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 2107bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 2117bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindolaunsigned ARMRegisterInfo::getFrameRegister(MachineFunction &MF) const { 2127ae68ab3bccb6ef2d0e4c489f0648dc5d37ae362Rafael Espindola return hasFP(MF) ? ARM::R11 : ARM::R13; 2137bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola} 2147bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 2157bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola#include "ARMGenRegisterInfo.inc" 2167bc59bc3952ad7842b1e079753deb32217a768a3Rafael Espindola 217