ARMRegisterInfo.h revision 0e4e974119676cf4c46b4fd0b6a29e85c3be562e 
1//===- ARMRegisterInfo.h - ARM Register Information Impl --------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the ARM implementation of the TargetRegisterInfo class.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef ARMREGISTERINFO_H
15#define ARMREGISTERINFO_H
16
17#include "llvm/Target/TargetRegisterInfo.h"
18#include "ARMGenRegisterInfo.h.inc"
19
20namespace llvm {
21  class ARMSubtarget;
22  class TargetInstrInfo;
23  class Type;
24
25struct ARMRegisterInfo : public ARMGenRegisterInfo {
26  const TargetInstrInfo &TII;
27  const ARMSubtarget &STI;
28private:
29  /// FramePtr - ARM physical register used as frame ptr.
30  unsigned FramePtr;
31
32public:
33  ARMRegisterInfo(const TargetInstrInfo &tii, const ARMSubtarget &STI);
34
35  /// emitLoadConstPool - Emits a load from constpool to materialize the
36  /// specified immediate.
37  void emitLoadConstPool(MachineBasicBlock &MBB,
38                         MachineBasicBlock::iterator &MBBI,
39                         unsigned DestReg, int Val,
40                         unsigned Pred, unsigned PredReg,
41                         const TargetInstrInfo *TII, bool isThumb,
42                         DebugLoc dl) const;
43
44  /// getRegisterNumbering - Given the enum value for some register, e.g.
45  /// ARM::LR, return the number that it corresponds to (e.g. 14).
46  static unsigned getRegisterNumbering(unsigned RegEnum);
47
48  /// Same as previous getRegisterNumbering except it returns true in isSPVFP
49  /// if the register is a single precision VFP register.
50  static unsigned getRegisterNumbering(unsigned RegEnum, bool &isSPVFP);
51
52  /// getPointerRegClass - Return the register class to use to hold pointers.
53  /// This is used for addressing modes.
54  const TargetRegisterClass *getPointerRegClass() const;
55
56  /// Code Generation virtual methods...
57  const TargetRegisterClass *
58    getPhysicalRegisterRegClass(unsigned Reg, MVT VT = MVT::Other) const;
59  const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
60
61  const TargetRegisterClass* const*
62  getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
63
64  BitVector getReservedRegs(const MachineFunction &MF) const;
65
66  bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
67
68  bool requiresRegisterScavenging(const MachineFunction &MF) const;
69
70  bool hasFP(const MachineFunction &MF) const;
71
72  bool hasReservedCallFrame(MachineFunction &MF) const;
73
74  void eliminateCallFramePseudoInstr(MachineFunction &MF,
75                                     MachineBasicBlock &MBB,
76                                     MachineBasicBlock::iterator I) const;
77
78  void eliminateFrameIndex(MachineBasicBlock::iterator II,
79                           int SPAdj, RegScavenger *RS = NULL) const;
80
81  void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
82                                            RegScavenger *RS = NULL) const;
83
84  void emitPrologue(MachineFunction &MF) const;
85  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
86
87  // Debug information queries.
88  unsigned getRARegister() const;
89  unsigned getFrameRegister(MachineFunction &MF) const;
90
91  // Exception handling queries.
92  unsigned getEHExceptionRegister() const;
93  unsigned getEHHandlerRegister() const;
94
95  int getDwarfRegNum(unsigned RegNum, bool isEH) const;
96
97  bool isLowRegister(unsigned Reg) const;
98};
99
100} // end namespace llvm
101
102#endif
103