1//===-- ARMUnwindOpAsm.cpp - ARM Unwind Opcodes Assembler -------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the unwind opcode assmebler for ARM exception handling
11// table.
12//
13//===----------------------------------------------------------------------===//
14
15#include "ARMUnwindOpAsm.h"
16#include "llvm/Support/ARMEHABI.h"
17#include "llvm/Support/ErrorHandling.h"
18#include "llvm/Support/LEB128.h"
19
20using namespace llvm;
21
22namespace {
23  /// UnwindOpcodeStreamer - The simple wrapper over SmallVector to emit bytes
24  /// with MSB to LSB per uint32_t ordering.  For example, the first byte will
25  /// be placed in Vec[3], and the following bytes will be placed in 2, 1, 0,
26  /// 7, 6, 5, 4, 11, 10, 9, 8, and so on.
27  class UnwindOpcodeStreamer {
28  private:
29    SmallVectorImpl<uint8_t> &Vec;
30    size_t Pos;
31
32  public:
33    UnwindOpcodeStreamer(SmallVectorImpl<uint8_t> &V) : Vec(V), Pos(3) {
34    }
35
36    /// Emit the byte in MSB to LSB per uint32_t order.
37    inline void EmitByte(uint8_t elem) {
38      Vec[Pos] = elem;
39      Pos = (((Pos ^ 0x3u) + 1) ^ 0x3u);
40    }
41
42    /// Emit the size prefix.
43    inline void EmitSize(size_t Size) {
44      size_t SizeInWords = (Size + 3) / 4;
45      assert(SizeInWords <= 0x100u &&
46             "Only 256 additional words are allowed for unwind opcodes");
47      EmitByte(static_cast<uint8_t>(SizeInWords - 1));
48    }
49
50    /// Emit the personality index prefix.
51    inline void EmitPersonalityIndex(unsigned PI) {
52      assert(PI < ARM::EHABI::NUM_PERSONALITY_INDEX &&
53             "Invalid personality prefix");
54      EmitByte(ARM::EHABI::EHT_COMPACT | PI);
55    }
56
57    /// Fill the rest of bytes with FINISH opcode.
58    inline void FillFinishOpcode() {
59      while (Pos < Vec.size())
60        EmitByte(ARM::EHABI::UNWIND_OPCODE_FINISH);
61    }
62  };
63}
64
65void UnwindOpcodeAssembler::EmitRegSave(uint32_t RegSave) {
66  if (RegSave == 0u)
67    return;
68
69  // One byte opcode to save register r14 and r11-r4
70  if (RegSave & (1u << 4)) {
71    // The one byte opcode will always save r4, thus we can't use the one byte
72    // opcode when r4 is not in .save directive.
73
74    // Compute the consecutive registers from r4 to r11.
75    uint32_t Range = 0;
76    uint32_t Mask = (1u << 4);
77    for (uint32_t Bit = (1u << 5); Bit < (1u << 12); Bit <<= 1) {
78      if ((RegSave & Bit) == 0u)
79        break;
80      ++Range;
81      Mask |= Bit;
82    }
83
84    // Emit this opcode when the mask covers every registers.
85    uint32_t UnmaskedReg = RegSave & 0xfff0u & (~Mask);
86    if (UnmaskedReg == 0u) {
87      // Pop r[4 : (4 + n)]
88      EmitInt8(ARM::EHABI::UNWIND_OPCODE_POP_REG_RANGE_R4 | Range);
89      RegSave &= 0x000fu;
90    } else if (UnmaskedReg == (1u << 14)) {
91      // Pop r[14] + r[4 : (4 + n)]
92      EmitInt8(ARM::EHABI::UNWIND_OPCODE_POP_REG_RANGE_R4_R14 | Range);
93      RegSave &= 0x000fu;
94    }
95  }
96
97  // Two bytes opcode to save register r15-r4
98  if ((RegSave & 0xfff0u) != 0)
99    EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_REG_MASK_R4 | (RegSave >> 4));
100
101  // Opcode to save register r3-r0
102  if ((RegSave & 0x000fu) != 0)
103    EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_REG_MASK | (RegSave & 0x000fu));
104}
105
106/// Emit unwind opcodes for .vsave directives
107void UnwindOpcodeAssembler::EmitVFPRegSave(uint32_t VFPRegSave) {
108  size_t i = 32;
109
110  while (i > 16) {
111    uint32_t Bit = 1u << (i - 1);
112    if ((VFPRegSave & Bit) == 0u) {
113      --i;
114      continue;
115    }
116
117    uint32_t Range = 0;
118
119    --i;
120    Bit >>= 1;
121
122    while (i > 16 && (VFPRegSave & Bit)) {
123      --i;
124      ++Range;
125      Bit >>= 1;
126    }
127
128    EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D16 |
129              ((i - 16) << 4) | Range);
130  }
131
132  while (i > 0) {
133    uint32_t Bit = 1u << (i - 1);
134    if ((VFPRegSave & Bit) == 0u) {
135      --i;
136      continue;
137    }
138
139    uint32_t Range = 0;
140
141    --i;
142    Bit >>= 1;
143
144    while (i > 0 && (VFPRegSave & Bit)) {
145      --i;
146      ++Range;
147      Bit >>= 1;
148    }
149
150    EmitInt16(ARM::EHABI::UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD | (i << 4) |
151              Range);
152  }
153}
154
155/// Emit unwind opcodes to copy address from source register to $sp.
156void UnwindOpcodeAssembler::EmitSetSP(uint16_t Reg) {
157  EmitInt8(ARM::EHABI::UNWIND_OPCODE_SET_VSP | Reg);
158}
159
160/// Emit unwind opcodes to add $sp with an offset.
161void UnwindOpcodeAssembler::EmitSPOffset(int64_t Offset) {
162  if (Offset > 0x200) {
163    uint8_t Buff[16];
164    Buff[0] = ARM::EHABI::UNWIND_OPCODE_INC_VSP_ULEB128;
165    size_t ULEBSize = encodeULEB128((Offset - 0x204) >> 2, Buff + 1);
166    EmitBytes(Buff, ULEBSize + 1);
167  } else if (Offset > 0) {
168    if (Offset > 0x100) {
169      EmitInt8(ARM::EHABI::UNWIND_OPCODE_INC_VSP | 0x3fu);
170      Offset -= 0x100;
171    }
172    EmitInt8(ARM::EHABI::UNWIND_OPCODE_INC_VSP |
173             static_cast<uint8_t>((Offset - 4) >> 2));
174  } else if (Offset < 0) {
175    while (Offset < -0x100) {
176      EmitInt8(ARM::EHABI::UNWIND_OPCODE_DEC_VSP | 0x3fu);
177      Offset += 0x100;
178    }
179    EmitInt8(ARM::EHABI::UNWIND_OPCODE_DEC_VSP |
180             static_cast<uint8_t>(((-Offset) - 4) >> 2));
181  }
182}
183
184void UnwindOpcodeAssembler::Finalize(unsigned &PersonalityIndex,
185                                     SmallVectorImpl<uint8_t> &Result) {
186
187  UnwindOpcodeStreamer OpStreamer(Result);
188
189  if (HasPersonality) {
190    // User-specifed personality routine: [ SIZE , OP1 , OP2 , ... ]
191    PersonalityIndex = ARM::EHABI::NUM_PERSONALITY_INDEX;
192    size_t TotalSize = Ops.size() + 1;
193    size_t RoundUpSize = (TotalSize + 3) / 4 * 4;
194    Result.resize(RoundUpSize);
195    OpStreamer.EmitSize(RoundUpSize);
196  } else {
197    // If no personalityindex is specified, select ane
198    if (PersonalityIndex == ARM::EHABI::NUM_PERSONALITY_INDEX)
199      PersonalityIndex = (Ops.size() <= 3) ? ARM::EHABI::AEABI_UNWIND_CPP_PR0
200                                           : ARM::EHABI::AEABI_UNWIND_CPP_PR1;
201    if (PersonalityIndex == ARM::EHABI::AEABI_UNWIND_CPP_PR0) {
202      // __aeabi_unwind_cpp_pr0: [ 0x80 , OP1 , OP2 , OP3 ]
203      assert(Ops.size() <= 3 && "too many opcodes for __aeabi_unwind_cpp_pr0");
204      Result.resize(4);
205      OpStreamer.EmitPersonalityIndex(PersonalityIndex);
206    } else {
207      // __aeabi_unwind_cpp_pr{1,2}: [ {0x81,0x82} , SIZE , OP1 , OP2 , ... ]
208      size_t TotalSize = Ops.size() + 2;
209      size_t RoundUpSize = (TotalSize + 3) / 4 * 4;
210      Result.resize(RoundUpSize);
211      OpStreamer.EmitPersonalityIndex(PersonalityIndex);
212      OpStreamer.EmitSize(RoundUpSize);
213    }
214  }
215
216  // Copy the unwind opcodes
217  for (size_t i = OpBegins.size() - 1; i > 0; --i)
218    for (size_t j = OpBegins[i - 1], end = OpBegins[i]; j < end; ++j)
219      OpStreamer.EmitByte(Ops[j]);
220
221  // Emit the padding finish opcodes if the size is not multiple of 4.
222  OpStreamer.FillFinishOpcode();
223
224  // Reset the assembler state
225  Reset();
226}
227