Thumb1RegisterInfo.cpp revision 764ab52dd80310a205c9888bf166d09dab858f90
1b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin//===- Thumb1RegisterInfo.cpp - Thumb-1 Register Information -------*- C++ -*-===// 2a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// 3a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// The LLVM Compiler Infrastructure 4a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// 5a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// This file is distributed under the University of Illinois Open Source 6a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// License. See LICENSE.TXT for details. 7a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// 8a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//===----------------------------------------------------------------------===// 9a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// 10b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin// This file contains the Thumb-1 implementation of the TargetRegisterInfo class. 11a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// 12a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//===----------------------------------------------------------------------===// 13a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 14a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "ARM.h" 15a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "ARMAddressingModes.h" 1677521f5232e679aa3de10aaaed2464aa91d7ff55David Goodwin#include "ARMBaseInstrInfo.h" 17a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "ARMMachineFunctionInfo.h" 18a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "ARMSubtarget.h" 19b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin#include "Thumb1InstrInfo.h" 20b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin#include "Thumb1RegisterInfo.h" 21a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/Constants.h" 22a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/DerivedTypes.h" 239adc0abad3c3ed40a268ccbcee0c74cb9e1359feOwen Anderson#include "llvm/Function.h" 249adc0abad3c3ed40a268ccbcee0c74cb9e1359feOwen Anderson#include "llvm/LLVMContext.h" 25a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/CodeGen/MachineConstantPool.h" 26a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/CodeGen/MachineFrameInfo.h" 27a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/CodeGen/MachineFunction.h" 28a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/CodeGen/MachineInstrBuilder.h" 29a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/CodeGen/MachineLocation.h" 30a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/CodeGen/MachineRegisterInfo.h" 31a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/Target/TargetFrameInfo.h" 32a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/Target/TargetMachine.h" 33a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/ADT/BitVector.h" 34a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/ADT/SmallVector.h" 35a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/Support/CommandLine.h" 36ab7c09b6b6f4516a631fd6788918c237c83939afTorok Edwin#include "llvm/Support/ErrorHandling.h" 37dac237e18209b697a8ba122d0ddd9cad4dfba1f8Torok Edwin#include "llvm/Support/raw_ostream.h" 38a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovusing namespace llvm; 39a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 40a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovstatic cl::opt<bool> 41a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton KorobeynikovThumbRegScavenging("enable-thumb-reg-scavenging", 42a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov cl::Hidden, 43a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov cl::desc("Enable register scavenging on Thumb")); 44a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 45db5a71a8e01ed9a0d93a19176df6ea0aea510d7bDavid GoodwinThumb1RegisterInfo::Thumb1RegisterInfo(const ARMBaseInstrInfo &tii, 46b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin const ARMSubtarget &sti) 47a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov : ARMBaseRegisterInfo(tii, sti) { 48a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 49a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 50a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// emitLoadConstPool - Emits a load from constpool to materialize the 51a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// specified immediate. 52b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinvoid Thumb1RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB, 53b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin MachineBasicBlock::iterator &MBBI, 5477521f5232e679aa3de10aaaed2464aa91d7ff55David Goodwin DebugLoc dl, 55378445303b10b092a898a75131141a8259cff50bEvan Cheng unsigned DestReg, unsigned SubIdx, 56378445303b10b092a898a75131141a8259cff50bEvan Cheng int Val, 57db5a71a8e01ed9a0d93a19176df6ea0aea510d7bDavid Goodwin ARMCC::CondCodes Pred, 58db5a71a8e01ed9a0d93a19176df6ea0aea510d7bDavid Goodwin unsigned PredReg) const { 59a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineFunction &MF = *MBB.getParent(); 60a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineConstantPool *ConstantPool = MF.getConstantPool(); 61eed707b1e6097aac2bb6b3d47271f6300ace7f2eOwen Anderson Constant *C = ConstantInt::get(Type::Int32Ty, Val); 62a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4); 63a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 64378445303b10b092a898a75131141a8259cff50bEvan Cheng BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRcp)) 65378445303b10b092a898a75131141a8259cff50bEvan Cheng .addReg(DestReg, getDefRegState(true), SubIdx) 66378445303b10b092a898a75131141a8259cff50bEvan Cheng .addConstantPoolIndex(Idx).addImm(Pred).addReg(PredReg); 67a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 68a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 69a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovconst TargetRegisterClass* 70e50ed30282bb5b4a9ed952580523f2dda16215acOwen AndersonThumb1RegisterInfo::getPhysicalRegisterRegClass(unsigned Reg, EVT VT) const { 7155ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov if (isARMLowRegister(Reg)) 72a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return ARM::tGPRRegisterClass; 73a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov switch (Reg) { 74a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov default: 75a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov break; 76a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R8: case ARM::R9: case ARM::R10: case ARM::R11: 77a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R12: case ARM::SP: case ARM::LR: case ARM::PC: 78a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return ARM::GPRRegisterClass; 79a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 80a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 81a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return TargetRegisterInfo::getPhysicalRegisterRegClass(Reg, VT); 82a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 83a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 84a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovbool 85b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid GoodwinThumb1RegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const { 86a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return ThumbRegScavenging; 87a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 88a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 89b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinbool Thumb1RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const { 90a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov const MachineFrameInfo *FFI = MF.getFrameInfo(); 91a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned CFSize = FFI->getMaxCallFrameSize(); 92a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // It's not always a good idea to include the call frame as part of the 93a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // stack frame. ARM (especially Thumb) has small immediate offset to 94a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // address the stack frame. So a large call frame can cause poor codegen 95a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // and may even makes it impossible to scavenge a register. 96a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4 97a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return false; 98a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 99a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return !MF.getFrameInfo()->hasVarSizedObjects(); 100a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 101a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 102446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng 103a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// emitThumbRegPlusImmInReg - Emits a series of instructions to materialize 104a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// a destreg = basereg + immediate in Thumb code. Materialize the immediate 105a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// in a register using mov / mvn sequences or load the immediate from a 106a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// constpool entry. 107a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovstatic 108a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovvoid emitThumbRegPlusImmInReg(MachineBasicBlock &MBB, 109a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator &MBBI, 110a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned DestReg, unsigned BaseReg, 111a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int NumBytes, bool CanChangeCC, 112a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov const TargetInstrInfo &TII, 113b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin const Thumb1RegisterInfo& MRI, 114a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DebugLoc dl) { 11555ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov bool isHigh = !isARMLowRegister(DestReg) || 11655ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov (BaseReg != 0 && !isARMLowRegister(BaseReg)); 117a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool isSub = false; 118a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Subtract doesn't have high register version. Load the negative value 119a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // if either base or dest register is a high register. Also, if do not 120a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // issue sub as part of the sequence if condition register is to be 121a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // preserved. 122a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumBytes < 0 && !isHigh && CanChangeCC) { 123a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov isSub = true; 124a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBytes = -NumBytes; 125a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 126a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned LdReg = DestReg; 127a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (DestReg == ARM::SP) { 128a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert(BaseReg == ARM::SP && "Unexpected!"); 129a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov LdReg = ARM::R3; 130d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::R12) 131a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(ARM::R3, RegState::Kill); 132a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 133a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 134a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumBytes <= 255 && NumBytes >= 0) 135b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg)) 136446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng .addImm(NumBytes); 137a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else if (NumBytes < 0 && NumBytes >= -255) { 138b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg)) 139446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng .addImm(NumBytes); 140b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg)) 141a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(LdReg, RegState::Kill); 142a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else 143378445303b10b092a898a75131141a8259cff50bEvan Cheng MRI.emitLoadConstPool(MBB, MBBI, dl, LdReg, 0, NumBytes); 144a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 145a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Emit add / sub. 146a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr); 147446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MachineInstrBuilder MIB = 148446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); 149446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (Opc != ARM::tADDhirr) 150b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng MIB = AddDefaultT1CC(MIB); 151a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (DestReg == ARM::SP || isSub) 152a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MIB.addReg(BaseReg).addReg(LdReg, RegState::Kill); 153a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else 154a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MIB.addReg(LdReg).addReg(BaseReg, RegState::Kill); 155446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng AddDefaultPred(MIB); 156446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng 157a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (DestReg == ARM::SP) 158d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2tgpr), ARM::R3) 159a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(ARM::R12, RegState::Kill); 160a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 161a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 162a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// calcNumMI - Returns the number of instructions required to materialize 163a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// the specific add / sub r, c instruction. 164a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovstatic unsigned calcNumMI(int Opc, int ExtraOpc, unsigned Bytes, 165a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumBits, unsigned Scale) { 166a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumMIs = 0; 167a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Chunk = ((1 << NumBits) - 1) * Scale; 168a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 169a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Opc == ARM::tADDrSPi) { 170a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned ThisVal = (Bytes > Chunk) ? Chunk : Bytes; 171a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Bytes -= ThisVal; 172a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumMIs++; 173a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 8; 174a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Scale = 1; // Followed by a number of tADDi8. 175a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Chunk = ((1 << NumBits) - 1) * Scale; 176a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 177a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 178a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumMIs += Bytes / Chunk; 179a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if ((Bytes % Chunk) != 0) 180a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumMIs++; 181a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (ExtraOpc) 182a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumMIs++; 183a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return NumMIs; 184a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 185a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 186a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// emitThumbRegPlusImmediate - Emits a series of instructions to materialize 187a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// a destreg = basereg + immediate in Thumb code. 188a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovstatic 189a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovvoid emitThumbRegPlusImmediate(MachineBasicBlock &MBB, 190a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator &MBBI, 191a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned DestReg, unsigned BaseReg, 192a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int NumBytes, const TargetInstrInfo &TII, 193b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin const Thumb1RegisterInfo& MRI, 194a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DebugLoc dl) { 195a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool isSub = NumBytes < 0; 196a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Bytes = (unsigned)NumBytes; 197a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (isSub) Bytes = -NumBytes; 198a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool isMul4 = (Bytes & 3) == 0; 199a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool isTwoAddr = false; 200a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool DstNotEqBase = false; 201a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumBits = 1; 202a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Scale = 1; 203a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int Opc = 0; 204a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int ExtraOpc = 0; 205446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng bool NeedCC = false; 206446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng bool NeedPred = false; 207a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 208a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (DestReg == BaseReg && BaseReg == ARM::SP) { 209a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert(isMul4 && "Thumb sp inc / dec size must be multiple of 4!"); 210a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 7; 211a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Scale = 4; 212a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; 213a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov isTwoAddr = true; 214a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else if (!isSub && BaseReg == ARM::SP) { 215a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r1 = add sp, 403 216a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // => 217a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r1 = add sp, 100 * 4 218a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r1 = add r1, 3 219a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (!isMul4) { 220a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Bytes &= ~3; 221a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ExtraOpc = ARM::tADDi3; 222a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 223a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 8; 224a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Scale = 4; 225a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Opc = ARM::tADDrSPi; 226a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 227a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // sp = sub sp, c 228a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r1 = sub sp, c 229a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r8 = sub sp, c 230a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (DestReg != BaseReg) 231a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DstNotEqBase = true; 232a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 8; 233f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng if (DestReg == ARM::SP) { 234f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; 235f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng assert(isMul4 && "Thumb sp inc / dec size must be multiple of 4!"); 236f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng NumBits = 7; 237f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng Scale = 4; 238f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng } else { 239f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng Opc = isSub ? ARM::tSUBi8 : ARM::tADDi8; 240f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng NumBits = 8; 241f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng NeedPred = NeedCC = true; 242f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng } 243a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov isTwoAddr = true; 244a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 245a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 246a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumMIs = calcNumMI(Opc, ExtraOpc, Bytes, NumBits, Scale); 247a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Threshold = (DestReg == ARM::SP) ? 3 : 2; 248a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumMIs > Threshold) { 249a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // This will expand into too many instructions. Load the immediate from a 250a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // constpool entry. 251a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmInReg(MBB, MBBI, DestReg, BaseReg, NumBytes, true, TII, 252a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MRI, dl); 253a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return; 254a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 255a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 256a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (DstNotEqBase) { 25755ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov if (isARMLowRegister(DestReg) && isARMLowRegister(BaseReg)) { 258a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // If both are low registers, emit DestReg = add BaseReg, max(Imm, 7) 259a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Chunk = (1 << 3) - 1; 260a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned ThisVal = (Bytes > Chunk) ? Chunk : Bytes; 261a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Bytes -= ThisVal; 262446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng const TargetInstrDesc &TID = TII.get(isSub ? ARM::tSUBi3 : ARM::tADDi3); 263446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng const MachineInstrBuilder MIB = 264b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TID, DestReg)); 265446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng AddDefaultPred(MIB.addReg(BaseReg, RegState::Kill).addImm(ThisVal)); 266a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 267a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), DestReg) 268a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(BaseReg, RegState::Kill); 269a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 270a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov BaseReg = DestReg; 271a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 272a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 273a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Chunk = ((1 << NumBits) - 1) * Scale; 274a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov while (Bytes) { 275a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned ThisVal = (Bytes > Chunk) ? Chunk : Bytes; 276a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Bytes -= ThisVal; 277a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ThisVal /= Scale; 278a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Build the new tADD / tSUB. 279446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (isTwoAddr) { 280446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); 281446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (NeedCC) 282b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng MIB = AddDefaultT1CC(MIB); 283446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MIB .addReg(DestReg).addImm(ThisVal); 284446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (NeedPred) 285446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MIB = AddDefaultPred(MIB); 286446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } 287a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else { 288a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool isKill = BaseReg != ARM::SP; 289446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); 290446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (NeedCC) 291b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng MIB = AddDefaultT1CC(MIB); 292446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MIB.addReg(BaseReg, getKillRegState(isKill)).addImm(ThisVal); 293446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (NeedPred) 294446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MIB = AddDefaultPred(MIB); 295a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov BaseReg = DestReg; 296a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 297a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Opc == ARM::tADDrSPi) { 298a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r4 = add sp, imm 299a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r4 = add r4, imm 300a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // ... 301a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 8; 302a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Scale = 1; 303a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Chunk = ((1 << NumBits) - 1) * Scale; 304a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Opc = isSub ? ARM::tSUBi8 : ARM::tADDi8; 305446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng NeedPred = NeedCC = isTwoAddr = true; 306a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 307a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 308a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 309a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 310446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (ExtraOpc) { 311446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng const TargetInstrDesc &TID = TII.get(ExtraOpc); 312b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TID, DestReg)) 313446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng .addReg(DestReg, RegState::Kill) 314446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng .addImm(((unsigned)NumBytes) & 3)); 315446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } 316a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 317a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 31855ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikovstatic void emitSPUpdate(MachineBasicBlock &MBB, 31955ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov MachineBasicBlock::iterator &MBBI, 32055ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov const TargetInstrInfo &TII, DebugLoc dl, 321b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin const Thumb1RegisterInfo &MRI, 32255ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov int NumBytes) { 323a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmediate(MBB, MBBI, ARM::SP, ARM::SP, NumBytes, TII, 32455ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov MRI, dl); 325a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 326a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 327b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinvoid Thumb1RegisterInfo:: 328a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton KorobeynikoveliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 329a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator I) const { 330a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (!hasReservedCallFrame(MF)) { 331a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // If we have alloca, convert as follows: 332a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // ADJCALLSTACKDOWN -> sub, sp, sp, amount 333a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // ADJCALLSTACKUP -> add, sp, sp, amount 334a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineInstr *Old = I; 335a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DebugLoc dl = Old->getDebugLoc(); 336a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Amount = Old->getOperand(0).getImm(); 337a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Amount != 0) { 338a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // We need to keep the stack aligned properly. To do this, we round the 339a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // amount of space needed for the outgoing arguments up to the next 340a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // alignment boundary. 341a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); 342a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Amount = (Amount+Align-1)/Align*Align; 343a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 344a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Replace the pseudo instruction with a new instruction... 345a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Opc = Old->getOpcode(); 346a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) { 34755ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, I, TII, dl, *this, -Amount); 348a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 349a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP); 35055ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, I, TII, dl, *this, Amount); 351a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 352a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 353a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 354a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MBB.erase(I); 355a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 356a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 357a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// emitThumbConstant - Emit a series of instructions to materialize a 358a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov/// constant. 359a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovstatic void emitThumbConstant(MachineBasicBlock &MBB, 360a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator &MBBI, 361a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned DestReg, int Imm, 362a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov const TargetInstrInfo &TII, 363b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin const Thumb1RegisterInfo& MRI, 364a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DebugLoc dl) { 365a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool isSub = Imm < 0; 366a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (isSub) Imm = -Imm; 367a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 368a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int Chunk = (1 << 8) - 1; 369a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int ThisVal = (Imm > Chunk) ? Chunk : Imm; 370a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Imm -= ThisVal; 371b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), 372b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng DestReg)) 373446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng .addImm(ThisVal)); 374a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Imm > 0) 375a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmediate(MBB, MBBI, DestReg, DestReg, Imm, TII, MRI, dl); 376446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (isSub) { 377446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng const TargetInstrDesc &TID = TII.get(ARM::tRSB); 378b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TID, DestReg)) 379446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng .addReg(DestReg, RegState::Kill)); 380446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } 381446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng} 382446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng 383446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Chengstatic void removeOperands(MachineInstr &MI, unsigned i) { 384446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng unsigned Op = i; 385446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng for (unsigned e = MI.getNumOperands(); i != e; ++i) 386446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MI.RemoveOperand(Op); 387a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 388a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 3895ff58b5c3ab6df332600678798ea5c69c5e943d3David Goodwinint Thumb1RegisterInfo:: 3905ff58b5c3ab6df332600678798ea5c69c5e943d3David GoodwinrewriteFrameIndex(MachineInstr &MI, unsigned FrameRegIdx, 3916495f63945e8dbde81f03a1dc2ab421993b9a495Evan Cheng unsigned FrameReg, int Offset, 392764ab52dd80310a205c9888bf166d09dab858f90Jim Grosbach unsigned MOVOpc, unsigned ADDriOpc, unsigned SUBriOpc) const 3935ff58b5c3ab6df332600678798ea5c69c5e943d3David Goodwin{ 3945ff58b5c3ab6df332600678798ea5c69c5e943d3David Goodwin // if/when eliminateFrameIndex() conforms with ARMBaseRegisterInfo 3955ff58b5c3ab6df332600678798ea5c69c5e943d3David Goodwin // version then can pull out Thumb1 specific parts here 3965ff58b5c3ab6df332600678798ea5c69c5e943d3David Goodwin return 0; 3975ff58b5c3ab6df332600678798ea5c69c5e943d3David Goodwin} 3985ff58b5c3ab6df332600678798ea5c69c5e943d3David Goodwin 399b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinvoid Thumb1RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, 400b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin int SPAdj, RegScavenger *RS) const{ 401a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned i = 0; 402a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineInstr &MI = *II; 403a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock &MBB = *MI.getParent(); 404a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineFunction &MF = *MBB.getParent(); 405a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); 406a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DebugLoc dl = MI.getDebugLoc(); 407a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 408a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov while (!MI.getOperand(i).isFI()) { 409a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ++i; 410a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 411a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 412a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 413a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned FrameReg = ARM::SP; 414a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int FrameIndex = MI.getOperand(i).getIndex(); 415a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) + 416a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MF.getFrameInfo()->getStackSize() + SPAdj; 417a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 418a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex)) 419a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset -= AFI->getGPRCalleeSavedArea1Offset(); 420a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else if (AFI->isGPRCalleeSavedArea2Frame(FrameIndex)) 421a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset -= AFI->getGPRCalleeSavedArea2Offset(); 422a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else if (hasFP(MF)) { 423a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert(SPAdj == 0 && "Unexpected"); 424a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // There is alloca()'s in this function, must reference off the frame 425a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // pointer instead. 426a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov FrameReg = getFrameRegister(MF); 427a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset -= AFI->getFramePtrSpillOffset(); 428a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 429a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 430a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Opcode = MI.getOpcode(); 431a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov const TargetInstrDesc &Desc = MI.getDesc(); 432a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); 433a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 434a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Opcode == ARM::tADDrSPi) { 435a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset += MI.getOperand(i+1).getImm(); 436a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 437a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Can't use tADDrSPi if it's based off the frame pointer. 438a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumBits = 0; 439a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Scale = 1; 440a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (FrameReg != ARM::SP) { 441a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Opcode = ARM::tADDi3; 442446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MI.setDesc(TII.get(Opcode)); 443a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 3; 444a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 445a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 8; 446a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Scale = 4; 447a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert((Offset & 3) == 0 && 448a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov "Thumb add/sub sp, #imm immediate must be multiple of 4!"); 449a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 450a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 451a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Offset == 0) { 452a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Turn it into a move. 453d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng MI.setDesc(TII.get(ARM::tMOVgpr2tgpr)); 454a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.getOperand(i).ChangeToRegister(FrameReg, false); 455a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.RemoveOperand(i+1); 456a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return; 457a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 458a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 459a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Common case: small offset, fits into instruction. 460a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Mask = (1 << NumBits) - 1; 461a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (((Offset / Scale) & ~Mask) == 0) { 462a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Replace the FrameIndex with sp / fp 463446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (Opcode == ARM::tADDi3) { 464446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng removeOperands(MI, i); 465446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MachineInstrBuilder MIB(&MI); 466b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultPred(AddDefaultT1CC(MIB).addReg(FrameReg) 467f6fe9579505be86420beea04f2c9ecb0fd7c55fdEvan Cheng .addImm(Offset / Scale)); 468446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } else { 469446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MI.getOperand(i).ChangeToRegister(FrameReg, false); 470446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MI.getOperand(i+1).ChangeToImmediate(Offset / Scale); 471446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } 472a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return; 473a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 474a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 475a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned DestReg = MI.getOperand(0).getReg(); 476a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Bytes = (Offset > 0) ? Offset : -Offset; 477a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumMIs = calcNumMI(Opcode, 0, Bytes, NumBits, Scale); 478a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // MI would expand into a large number of instructions. Don't try to 479a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // simplify the immediate. 480a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumMIs > 2) { 481a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmediate(MBB, II, DestReg, FrameReg, Offset, TII, 482a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov *this, dl); 483a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MBB.erase(II); 484a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return; 485a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 486a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 487a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Offset > 0) { 488a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Translate r0 = add sp, imm to 489a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r0 = add sp, 255*4 490a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r0 = add r0, (imm - 255*4) 491446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (Opcode == ARM::tADDi3) { 492446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng removeOperands(MI, i); 493446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MachineInstrBuilder MIB(&MI); 494b46aaa3874d2753632c48400c66be1a10ac18d42Evan Cheng AddDefaultPred(AddDefaultT1CC(MIB).addReg(FrameReg).addImm(Mask)); 495446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } else { 496446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MI.getOperand(i).ChangeToRegister(FrameReg, false); 497446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MI.getOperand(i+1).ChangeToImmediate(Mask); 498446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } 499a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset = (Offset - Mask * Scale); 500a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator NII = next(II); 501a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmediate(MBB, NII, DestReg, DestReg, Offset, TII, 502a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov *this, dl); 503a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 504a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Translate r0 = add sp, -imm to 505a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r0 = -imm (this is then translated into a series of instructons) 506a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r0 = add r0, sp 507a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbConstant(MBB, II, DestReg, Offset, TII, *this, dl); 508bae20a6353583089224b94280a2dd69805dca247Evan Cheng 509a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.setDesc(TII.get(ARM::tADDhirr)); 510a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.getOperand(i).ChangeToRegister(DestReg, false, false, true); 511a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.getOperand(i+1).ChangeToRegister(FrameReg, false); 512bae20a6353583089224b94280a2dd69805dca247Evan Cheng if (Opcode == ARM::tADDi3) { 513bae20a6353583089224b94280a2dd69805dca247Evan Cheng MachineInstrBuilder MIB(&MI); 514bae20a6353583089224b94280a2dd69805dca247Evan Cheng AddDefaultPred(MIB); 515bae20a6353583089224b94280a2dd69805dca247Evan Cheng } 516a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 517a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return; 518a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 519a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned ImmIdx = 0; 520a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int InstrOffs = 0; 521a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumBits = 0; 522a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Scale = 1; 523a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov switch (AddrMode) { 524055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng case ARMII::AddrModeT1_s: { 525a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ImmIdx = i+1; 526a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov InstrOffs = MI.getOperand(ImmIdx).getImm(); 527a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = (FrameReg == ARM::SP) ? 8 : 5; 528a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Scale = 4; 529a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov break; 530a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 531a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov default: 532c23197a26f34f559ea9797de51e187087c039c42Torok Edwin llvm_unreachable("Unsupported addressing mode!"); 533a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov break; 534a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 535a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 536a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset += InstrOffs * Scale; 537a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert((Offset & (Scale-1)) == 0 && "Can't encode this offset!"); 538a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 539a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Common case: small offset, fits into instruction. 540a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineOperand &ImmOp = MI.getOperand(ImmIdx); 541a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int ImmedOffset = Offset / Scale; 542a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Mask = (1 << NumBits) - 1; 543a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if ((unsigned)Offset <= Mask * Scale) { 544a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Replace the FrameIndex with sp 545a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.getOperand(i).ChangeToRegister(FrameReg, false); 546a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ImmOp.ChangeToImmediate(ImmedOffset); 547a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return; 548a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 549a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 550a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool isThumSpillRestore = Opcode == ARM::tRestore || Opcode == ARM::tSpill; 551055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng if (AddrMode == ARMII::AddrModeT1_s) { 552a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Thumb tLDRspi, tSTRspi. These will change to instructions that use 553a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // a different base register. 554a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBits = 5; 555a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Mask = (1 << NumBits) - 1; 556a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 557a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // If this is a thumb spill / restore, we will be using a constpool load to 558a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // materialize the offset. 559055b0310f862b91f33699037ce67d3ab8137c20cEvan Cheng if (AddrMode == ARMII::AddrModeT1_s && isThumSpillRestore) 560a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ImmOp.ChangeToImmediate(0); 561a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else { 562a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Otherwise, it didn't fit. Pull in what we can to simplify the immed. 563a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ImmedOffset = ImmedOffset & Mask; 564a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ImmOp.ChangeToImmediate(ImmedOffset); 565a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset &= ~(Mask*Scale); 566a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 567a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 568a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 569a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // If we get here, the immediate doesn't fit into the instruction. We folded 570a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // as much as possible above, handle the rest, providing a register that is 571a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // SP+LargeImm. 572a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert(Offset && "This code isn't needed if offset already handled!"); 573a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 574446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng // Remove predicate first. 575446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng int PIdx = MI.findFirstPredOperandIdx(); 576446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (PIdx != -1) 577446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng removeOperands(MI, PIdx); 578446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng 579a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Desc.mayLoad()) { 580a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Use the destination register to materialize sp + offset. 581a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned TmpReg = MI.getOperand(0).getReg(); 582a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool UseRR = false; 583a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Opcode == ARM::tRestore) { 584a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (FrameReg == ARM::SP) 585a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg, 586a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset, false, TII, *this, dl); 587a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else { 588378445303b10b092a898a75131141a8259cff50bEvan Cheng emitLoadConstPool(MBB, II, dl, TmpReg, 0, Offset); 589a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov UseRR = true; 590a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 591446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } else { 592a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmediate(MBB, II, TmpReg, FrameReg, Offset, TII, 593a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov *this, dl); 594446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } 595446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng 596a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.setDesc(TII.get(ARM::tLDR)); 597a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.getOperand(i).ChangeToRegister(TmpReg, false, false, true); 598a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (UseRR) 599a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Use [reg, reg] addrmode. 600a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.addOperand(MachineOperand::CreateReg(FrameReg, false)); 601a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else // tLDR has an extra register operand. 602a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.addOperand(MachineOperand::CreateReg(0, false)); 603a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else if (Desc.mayStore()) { 604a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // FIXME! This is horrific!!! We need register scavenging. 605a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Our temporary workaround has marked r3 unavailable. Of course, r3 is 606a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // also a ABI register so it's possible that is is the register that is 607a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // being storing here. If that's the case, we do the following: 608a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r12 = r2 609a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Use r2 to materialize sp + offset 610a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // str r3, r2 611a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // r2 = r12 612a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned ValReg = MI.getOperand(0).getReg(); 613a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned TmpReg = ARM::R3; 614a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov bool UseRR = false; 615a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (ValReg == ARM::R3) { 616d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng BuildMI(MBB, II, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::R12) 617a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(ARM::R2, RegState::Kill); 618a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov TmpReg = ARM::R2; 619a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 620a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (TmpReg == ARM::R3 && AFI->isR3LiveIn()) 621d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng BuildMI(MBB, II, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::R12) 622a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(ARM::R3, RegState::Kill); 623a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Opcode == ARM::tSpill) { 624a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (FrameReg == ARM::SP) 625a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg, 626a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov Offset, false, TII, *this, dl); 627a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else { 628378445303b10b092a898a75131141a8259cff50bEvan Cheng emitLoadConstPool(MBB, II, dl, TmpReg, 0, Offset); 629a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov UseRR = true; 630a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 631a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else 632a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmediate(MBB, II, TmpReg, FrameReg, Offset, TII, 633a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov *this, dl); 634a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.setDesc(TII.get(ARM::tSTR)); 635a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.getOperand(i).ChangeToRegister(TmpReg, false, false, true); 636a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (UseRR) // Use [reg, reg] addrmode. 637a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.addOperand(MachineOperand::CreateReg(FrameReg, false)); 638a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else // tSTR has an extra register operand. 639a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI.addOperand(MachineOperand::CreateReg(0, false)); 640a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 641a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator NII = next(II); 642a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (ValReg == ARM::R3) 643d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng BuildMI(MBB, NII, dl, TII.get(ARM::tMOVgpr2tgpr), ARM::R2) 644a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(ARM::R12, RegState::Kill); 645a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (TmpReg == ARM::R3 && AFI->isR3LiveIn()) 646d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng BuildMI(MBB, NII, dl, TII.get(ARM::tMOVgpr2tgpr), ARM::R3) 647a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(ARM::R12, RegState::Kill); 648a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else 649a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert(false && "Unexpected opcode!"); 650446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng 651446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng // Add predicate back if it's needed. 652446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng if (MI.getDesc().isPredicable()) { 653446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng MachineInstrBuilder MIB(&MI); 654446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng AddDefaultPred(MIB); 655446c428bf394b7113b0f18cbacb5e87b4efd1e14Evan Cheng } 656a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 657a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 658b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinvoid Thumb1RegisterInfo::emitPrologue(MachineFunction &MF) const { 659a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock &MBB = MF.front(); 660a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator MBBI = MBB.begin(); 661a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineFrameInfo *MFI = MF.getFrameInfo(); 662a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); 663a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize(); 664a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned NumBytes = MFI->getStackSize(); 665a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 666a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DebugLoc dl = (MBBI != MBB.end() ? 667a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MBBI->getDebugLoc() : DebugLoc::getUnknownLoc()); 668a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 669a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Check if R3 is live in. It might have to be used as a scratch register. 670a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov for (MachineRegisterInfo::livein_iterator I =MF.getRegInfo().livein_begin(), 671a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov E = MF.getRegInfo().livein_end(); I != E; ++I) { 672a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (I->first == ARM::R3) { 673a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setR3IsLiveIn(true); 674a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov break; 675a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 676a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 677a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 678a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4. 679a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBytes = (NumBytes + 3) & ~3; 680a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MFI->setStackSize(NumBytes); 681a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 682a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Determine the sizes of each callee-save spill areas and record which frame 683a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // belongs to which callee-save spill areas. 684a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0; 685a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int FramePtrSpillFI = 0; 686a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 687a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (VARegSaveSize) 68855ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, MBBI, TII, dl, *this, -VARegSaveSize); 689a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 690a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (!AFI->hasStackFrame()) { 691a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumBytes != 0) 69255ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, MBBI, TII, dl, *this, -NumBytes); 693a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return; 694a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 695a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 696a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 697a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned Reg = CSI[i].getReg(); 698a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int FI = CSI[i].getFrameIdx(); 699a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov switch (Reg) { 700a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R4: 701a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R5: 702a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R6: 703a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R7: 704a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::LR: 705a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Reg == FramePtr) 706a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov FramePtrSpillFI = FI; 707a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->addGPRCalleeSavedArea1Frame(FI); 708a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov GPRCS1Size += 4; 709a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov break; 710a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R8: 711a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R9: 712a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R10: 713a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov case ARM::R11: 714a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Reg == FramePtr) 715a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov FramePtrSpillFI = FI; 716a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (STI.isTargetDarwin()) { 717a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->addGPRCalleeSavedArea2Frame(FI); 718a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov GPRCS2Size += 4; 719a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 720a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->addGPRCalleeSavedArea1Frame(FI); 721a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov GPRCS1Size += 4; 722a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 723a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov break; 724a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov default: 725a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->addDPRCalleeSavedAreaFrame(FI); 726a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DPRCSSize += 8; 727a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 728a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 729a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 730a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) { 731a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ++MBBI; 732a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (MBBI != MBB.end()) 733a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov dl = MBBI->getDebugLoc(); 734a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 735a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 736a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Darwin ABI requires FP to point to the stack slot that contains the 737a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // previous FP. 738a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (STI.isTargetDarwin() || hasFP(MF)) { 739a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineInstrBuilder MIB = 740a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) 741a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addFrameIndex(FramePtrSpillFI).addImm(0); 742a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 743a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 744a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Determine starting offsets of spill areas. 745a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize); 746a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize; 747a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size; 748a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes); 749a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset); 750a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset); 751a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset); 752a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 753a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBytes = DPRCSOffset; 754a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumBytes) { 755a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Insert it after all the callee-save spills. 75655ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, MBBI, TII, dl, *this, -NumBytes); 757a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 758a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 759a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (STI.isTargetELF() && hasFP(MF)) { 760a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() - 761a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->getFramePtrSpillOffset()); 762a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 763a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 764a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setGPRCalleeSavedArea1Size(GPRCS1Size); 765a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setGPRCalleeSavedArea2Size(GPRCS2Size); 766a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->setDPRCalleeSavedAreaSize(DPRCSSize); 767a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 768a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 769a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovstatic bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) { 770a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov for (unsigned i = 0; CSRegs[i]; ++i) 771a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (Reg == CSRegs[i]) 772a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return true; 773a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return false; 774a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 775a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 776a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovstatic bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) { 777a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov return (MI->getOpcode() == ARM::tRestore && 778a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MI->getOperand(1).isFI() && 779a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs)); 780a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 781a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 782b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinvoid Thumb1RegisterInfo::emitEpilogue(MachineFunction &MF, 783b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin MachineBasicBlock &MBB) const { 784a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator MBBI = prior(MBB.end()); 785a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov assert((MBBI->getOpcode() == ARM::tBX_RET || 786a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MBBI->getOpcode() == ARM::tPOP_RET) && 787a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov "Can only insert epilog into returning blocks"); 788a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov DebugLoc dl = MBBI->getDebugLoc(); 789a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineFrameInfo *MFI = MF.getFrameInfo(); 790a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); 791a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize(); 792a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov int NumBytes = (int)MFI->getStackSize(); 793a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 794a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (!AFI->hasStackFrame()) { 795a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumBytes != 0) 79655ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, MBBI, TII, dl, *this, NumBytes); 797a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 798a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Unwind MBBI to point to first LDR / FLDD. 799a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov const unsigned *CSRegs = getCalleeSavedRegs(); 800a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (MBBI != MBB.begin()) { 801a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov do 802a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov --MBBI; 803a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs)); 804a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (!isCSRestore(MBBI, CSRegs)) 805a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov ++MBBI; 806a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 807a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 808a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Move SP to start of FP callee save spill area. 809a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBytes -= (AFI->getGPRCalleeSavedArea1Size() + 810a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->getGPRCalleeSavedArea2Size() + 811a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov AFI->getDPRCalleeSavedAreaSize()); 812a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 813a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (hasFP(MF)) { 814a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov NumBytes = AFI->getFramePtrSpillOffset() - NumBytes; 815a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Reset SP based on frame pointer only if the stack frame extends beyond 816a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // frame pointer stack slot or target is ELF and the function has FP. 817a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (NumBytes) 818a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov emitThumbRegPlusImmediate(MBB, MBBI, ARM::SP, FramePtr, -NumBytes, 819a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov TII, *this, dl); 820a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov else 821d83360694a6d82772cf31a0be8a64570c2e5cb88Evan Cheng BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::SP) 822a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov .addReg(FramePtr); 823a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else { 824a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (MBBI->getOpcode() == ARM::tBX_RET && 825a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov &MBB.front() != MBBI && 826a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov prior(MBBI)->getOpcode() == ARM::tPOP) { 827a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MachineBasicBlock::iterator PMBBI = prior(MBBI); 82855ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, PMBBI, TII, dl, *this, NumBytes); 829a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } else 83055ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, MBBI, TII, dl, *this, NumBytes); 831a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 832a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 833a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 834a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov if (VARegSaveSize) { 835a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // Epilogue for vararg functions: pop LR to R3 and branch off it. 836a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov // FIXME: Verify this is still ok when R3 is no longer being reserved. 837a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)).addReg(ARM::R3); 838a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 83955ad1f22b4554be3a9547fe7a8d84ce05b3d5c72Anton Korobeynikov emitSPUpdate(MBB, MBBI, TII, dl, *this, VARegSaveSize); 840a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov 841a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg)).addReg(ARM::R3); 842a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov MBB.erase(MBBI); 843a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov } 844a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov} 845