131c24bf5b39cc8391d4cfdbf8cf5163975fdb81eJim Grosbach//===- Thumb1RegisterInfo.h - Thumb-1 Register Information Impl -*- C++ -*-===//
2a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//
3a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//                     The LLVM Compiler Infrastructure
4a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//
5a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// This file is distributed under the University of Illinois Open Source
6a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov// License. See LICENSE.TXT for details.
7a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//
8a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//===----------------------------------------------------------------------===//
9a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//
1031c24bf5b39cc8391d4cfdbf8cf5163975fdb81eJim Grosbach// This file contains the Thumb-1 implementation of the TargetRegisterInfo
1131c24bf5b39cc8391d4cfdbf8cf5163975fdb81eJim Grosbach// class.
12a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//
13a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov//===----------------------------------------------------------------------===//
14a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov
15b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin#ifndef THUMB1REGISTERINFO_H
16b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin#define THUMB1REGISTERINFO_H
17a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov
18c1f6f42049696e7357fb4837e1b25dabbaed3fe6Craig Topper#include "ARMBaseRegisterInfo.h"
19a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov#include "llvm/Target/TargetRegisterInfo.h"
20a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov
21a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovnamespace llvm {
22a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov  class ARMSubtarget;
23db5a71a8e01ed9a0d93a19176df6ea0aea510d7bDavid Goodwin  class ARMBaseInstrInfo;
24a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov
25b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwinstruct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
26a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikovpublic:
2757148c166ab232191098492633c924fad9c44ef3Bill Wendling  Thumb1RegisterInfo(const ARMSubtarget &STI);
28a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov
2936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  const TargetRegisterClass *
3036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  getLargestLegalSuperClass(const TargetRegisterClass *RC) const override;
31c9e5015dece0a1a73bec358e11bc87594831279dJakob Stoklund Olesen
3236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  const TargetRegisterClass *
3336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  getPointerRegClass(const MachineFunction &MF,
3436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                     unsigned Kind = 0) const override;
351db952d0c6c93f24619af5de2ea1b0550665479cJakob Stoklund Olesen
36a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov  /// emitLoadConstPool - Emits a load from constpool to materialize the
37a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov  /// specified immediate.
3836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  void
3936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
4036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                    DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val,
4136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                    ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
4236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                    unsigned MIFlags = MachineInstr::NoFlags) const override;
43a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov
4474d7b0af58951dce2f874c600a6a48a2454b4914Jim Grosbach  // rewrite MI to access 'Offset' bytes from the FP. Update Offset to be
4574d7b0af58951dce2f874c600a6a48a2454b4914Jim Grosbach  // however much remains to be handled. Return 'true' if no further
4674d7b0af58951dce2f874c600a6a48a2454b4914Jim Grosbach  // work is required.
4774d7b0af58951dce2f874c600a6a48a2454b4914Jim Grosbach  bool rewriteFrameIndex(MachineBasicBlock::iterator II, unsigned FrameRegIdx,
4874d7b0af58951dce2f874c600a6a48a2454b4914Jim Grosbach                         unsigned FrameReg, int &Offset,
4974d7b0af58951dce2f874c600a6a48a2454b4914Jim Grosbach                         const ARMBaseInstrInfo &TII) const;
5036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
5136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                         int64_t Offset) const override;
52540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach  bool saveScavengerRegister(MachineBasicBlock &MBB,
53540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach                             MachineBasicBlock::iterator I,
54d482f55af135081aee7f7ab972bb8973f189c88fJim Grosbach                             MachineBasicBlock::iterator &UseMI,
55540b05d227a79443b2a7b07d5152a35cb6392abfJim Grosbach                             const TargetRegisterClass *RC,
5636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                             unsigned Reg) const override;
57fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341aJim Grosbach  void eliminateFrameIndex(MachineBasicBlock::iterator II,
58108fb3202af6f500073cdbb7be32c25d7a273a2eChad Rosier                           int SPAdj, unsigned FIOperandNum,
59dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines                           RegScavenger *RS = nullptr) const override;
60a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov};
61a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov}
62a98cbc554ca2cd40426e7c3ff8d1467da32e195dAnton Korobeynikov
63b50ea5c48f8b1ce259e034ca5c16dc14af1a582cDavid Goodwin#endif // THUMB1REGISTERINFO_H
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