HexagonSchedule.td revision fc992996f751e0941951b6d08d8f1e80ebec1385 
1//===- HexagonSchedule.td - Hexagon Scheduling Definitions -*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10// Functional Units
11def LUNIT     : FuncUnit;
12def LSUNIT    : FuncUnit;
13def MUNIT     : FuncUnit;
14def SUNIT     : FuncUnit;
15
16// Itinerary classes
17def ALU32     : InstrItinClass;
18def ALU64     : InstrItinClass;
19def CR        : InstrItinClass;
20def J         : InstrItinClass;
21def JR        : InstrItinClass;
22def LD        : InstrItinClass;
23def M         : InstrItinClass;
24def ST        : InstrItinClass;
25def S         : InstrItinClass;
26def SYS       : InstrItinClass;
27def MARKER    : InstrItinClass;
28def PSEUDO    : InstrItinClass;
29
30def HexagonItineraries :
31      ProcessorItineraries<[LUNIT, LSUNIT, MUNIT, SUNIT], [], [
32        InstrItinData<ALU32  , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>,
33        InstrItinData<ALU64  , [InstrStage<1, [MUNIT, SUNIT]>]>,
34        InstrItinData<CR     , [InstrStage<1, [SUNIT]>]>,
35        InstrItinData<J      , [InstrStage<1, [SUNIT, MUNIT]>]>,
36        InstrItinData<JR     , [InstrStage<1, [MUNIT]>]>,
37        InstrItinData<LD     , [InstrStage<1, [LUNIT, LSUNIT]>]>,
38        InstrItinData<M      , [InstrStage<1, [MUNIT, SUNIT]>]>,
39        InstrItinData<ST     , [InstrStage<1, [LSUNIT]>]>,
40        InstrItinData<S      , [InstrStage<1, [SUNIT, MUNIT]>]>,
41        InstrItinData<SYS    , [InstrStage<1, [LSUNIT]>]>,
42        InstrItinData<MARKER , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>,
43        InstrItinData<PSEUDO , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>
44      ]> {
45  // Max issue per cycle == bundle width.
46  let IssueWidth = 4;
47}
48
49//===----------------------------------------------------------------------===//
50// V4 Machine Info +
51//===----------------------------------------------------------------------===//
52
53include "HexagonScheduleV4.td"
54
55//===----------------------------------------------------------------------===//
56// V4 Machine Info -
57//===----------------------------------------------------------------------===//
58