MSP430ISelLowering.h revision cd76128f182b9a9f3986384523cf90f4c30e4d35
1//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the interfaces that MSP430 uses to lower LLVM code into a 11// selection DAG. 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef LLVM_TARGET_MSP430_ISELLOWERING_H 16#define LLVM_TARGET_MSP430_ISELLOWERING_H 17 18#include "MSP430.h" 19#include "llvm/CodeGen/SelectionDAG.h" 20#include "llvm/Target/TargetLowering.h" 21 22namespace llvm { 23 namespace MSP430ISD { 24 enum { 25 FIRST_NUMBER = ISD::BUILTIN_OP_END, 26 27 /// Return with a flag operand. Operand 0 is the chain operand. 28 RET_FLAG, 29 30 /// Y = R{R,L}A X, rotate right (left) arithmetically 31 RRA, RLA, 32 33 /// Y = RRC X, rotate right via carry 34 RRC, 35 36 /// CALL - These operations represent an abstract call 37 /// instruction, which includes a bunch of information. 38 CALL, 39 40 /// Wrapper - A wrapper node for TargetConstantPool, TargetExternalSymbol, 41 /// and TargetGlobalAddress. 42 Wrapper, 43 44 /// CMP - Compare instruction. 45 CMP, 46 47 /// SetCC. Operand 0 is condition code, and operand 1 is the flag 48 /// operand produced by a CMP instruction. 49 SETCC, 50 51 /// MSP430 conditional branches. Operand 0 is the chain operand, operand 1 52 /// is the block to branch if condition is true, operand 2 is the 53 /// condition code, and operand 3 is the flag operand produced by a CMP 54 /// instruction. 55 BR_CC, 56 57 /// SELECT_CC. Operand 0 and operand 1 are selection variable, operand 3 58 /// is condition code and operand 4 is flag operand. 59 SELECT_CC 60 }; 61 } 62 63 class MSP430Subtarget; 64 class MSP430TargetMachine; 65 66 class MSP430TargetLowering : public TargetLowering { 67 public: 68 explicit MSP430TargetLowering(MSP430TargetMachine &TM); 69 70 /// LowerOperation - Provide custom lowering hooks for some operations. 71 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); 72 73 /// getTargetNodeName - This method returns the name of a target specific 74 /// DAG node. 75 virtual const char *getTargetNodeName(unsigned Opcode) const; 76 77 /// getFunctionAlignment - Return the Log2 alignment of this function. 78 virtual unsigned getFunctionAlignment(const Function *F) const; 79 80 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG); 81 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); 82 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG); 83 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG); 84 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); 85 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG); 86 87 TargetLowering::ConstraintType 88 getConstraintType(const std::string &Constraint) const; 89 std::pair<unsigned, const TargetRegisterClass*> 90 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; 91 92 MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI, 93 MachineBasicBlock *BB) const; 94 95 private: 96 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, 97 unsigned CallConv, bool isVarArg, 98 bool isTailCall, 99 const SmallVectorImpl<ISD::OutputArg> &Outs, 100 const SmallVectorImpl<ISD::InputArg> &Ins, 101 DebugLoc dl, SelectionDAG &DAG, 102 SmallVectorImpl<SDValue> &InVals); 103 104 SDValue LowerCCCArguments(SDValue Chain, 105 unsigned CallConv, 106 bool isVarArg, 107 const SmallVectorImpl<ISD::InputArg> &Ins, 108 DebugLoc dl, 109 SelectionDAG &DAG, 110 SmallVectorImpl<SDValue> &InVals); 111 112 SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 113 unsigned CallConv, bool isVarArg, 114 const SmallVectorImpl<ISD::InputArg> &Ins, 115 DebugLoc dl, SelectionDAG &DAG, 116 SmallVectorImpl<SDValue> &InVals); 117 118 virtual SDValue 119 LowerFormalArguments(SDValue Chain, 120 unsigned CallConv, bool isVarArg, 121 const SmallVectorImpl<ISD::InputArg> &Ins, 122 DebugLoc dl, SelectionDAG &DAG, 123 SmallVectorImpl<SDValue> &InVals); 124 virtual SDValue 125 LowerCall(SDValue Chain, SDValue Callee, 126 unsigned CallConv, bool isVarArg, bool isTailCall, 127 const SmallVectorImpl<ISD::OutputArg> &Outs, 128 const SmallVectorImpl<ISD::InputArg> &Ins, 129 DebugLoc dl, SelectionDAG &DAG, 130 SmallVectorImpl<SDValue> &InVals); 131 132 virtual SDValue 133 LowerReturn(SDValue Chain, 134 unsigned CallConv, bool isVarArg, 135 const SmallVectorImpl<ISD::OutputArg> &Outs, 136 DebugLoc dl, SelectionDAG &DAG); 137 138 const MSP430Subtarget &Subtarget; 139 const MSP430TargetMachine &TM; 140 }; 141} // namespace llvm 142 143#endif // LLVM_TARGET_MSP430_ISELLOWERING_H 144