MipsAsmParser.cpp revision 72e9b6aeb48d9496bac9db8b02c88a618b464588 
1//===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#include "MCTargetDesc/MipsMCTargetDesc.h"
11#include "llvm/MC/MCParser/MCAsmLexer.h"
12#include "llvm/MC/MCTargetAsmParser.h"
13#include "llvm/Support/TargetRegistry.h"
14#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
15#include "llvm/MC/MCTargetAsmParser.h"
16#include "llvm/MC/MCInst.h"
17#include "llvm/MC/MCExpr.h"
18#include "llvm/Support/MathExtras.h"
19
20using namespace llvm;
21
22namespace {
23class MipsAsmParser : public MCTargetAsmParser {
24
25#define GET_ASSEMBLER_HEADER
26#include "MipsGenAsmMatcher.inc"
27
28  bool MatchAndEmitInstruction(SMLoc IDLoc,
29                               SmallVectorImpl<MCParsedAsmOperand*> &Operands,
30                               MCStreamer &Out);
31
32  bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
33
34  bool ParseInstruction(StringRef Name, SMLoc NameLoc,
35                        SmallVectorImpl<MCParsedAsmOperand*> &Operands);
36
37  bool ParseDirective(AsmToken DirectiveID);
38
39  OperandMatchResultTy parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&);
40public:
41  MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
42    : MCTargetAsmParser() {
43  }
44
45};
46}
47
48namespace {
49
50/// MipsOperand - Instances of this class represent a parsed Mips machine
51/// instruction.
52class MipsOperand : public MCParsedAsmOperand {
53  enum KindTy {
54    k_CondCode,
55    k_CoprocNum,
56    k_Immediate,
57    k_Memory,
58    k_PostIndexRegister,
59    k_Register,
60    k_Token
61  } Kind;
62
63  MipsOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
64public:
65  void addRegOperands(MCInst &Inst, unsigned N) const {
66    llvm_unreachable("unimplemented!");
67  }
68  void addExpr(MCInst &Inst, const MCExpr *Expr) const{
69    llvm_unreachable("unimplemented!");
70  }
71  void addImmOperands(MCInst &Inst, unsigned N) const {
72    llvm_unreachable("unimplemented!");
73  }
74  void addMemOperands(MCInst &Inst, unsigned N) const {
75    llvm_unreachable("unimplemented!");
76  }
77
78  bool isReg() const { return Kind == k_Register; }
79  bool isImm() const { return Kind == k_Immediate; }
80  bool isToken() const { return Kind == k_Token; }
81  bool isMem() const { return Kind == k_Memory; }
82
83  StringRef getToken() const {
84    assert(Kind == k_Token && "Invalid access!");
85    return "";
86  }
87
88  unsigned getReg() const {
89    assert((Kind == k_Register) && "Invalid access!");
90    return 0;
91  }
92
93  virtual void print(raw_ostream &OS) const {
94    llvm_unreachable("unimplemented!");
95  }
96};
97}
98
99bool MipsAsmParser::
100MatchAndEmitInstruction(SMLoc IDLoc,
101                        SmallVectorImpl<MCParsedAsmOperand*> &Operands,
102                        MCStreamer &Out) {
103  return true;
104}
105
106bool MipsAsmParser::
107ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) {
108  return true;
109}
110
111bool MipsAsmParser::
112ParseInstruction(StringRef Name, SMLoc NameLoc,
113                 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
114  return true;
115}
116
117bool MipsAsmParser::
118ParseDirective(AsmToken DirectiveID) {
119  return true;
120}
121
122MipsAsmParser::OperandMatchResultTy MipsAsmParser::
123  parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&) {
124  return MatchOperand_ParseFail;
125}
126
127extern "C" void LLVMInitializeMipsAsmParser() {
128  RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
129  RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
130  RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
131  RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);
132}
133