MipsBaseInfo.h revision 26e6ad7b290abd4e5dcae1c6fbd5cae77a4beffe 
1//===-- MipsBaseInfo.h - Top level definitions for MIPS MC ------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains small standalone helper functions and enum definitions for
11// the Mips target useful for the compiler back-end and the MC libraries.
12//
13//===----------------------------------------------------------------------===//
14#ifndef MIPSBASEINFO_H
15#define MIPSBASEINFO_H
16
17#include "MipsFixupKinds.h"
18#include "MipsMCTargetDesc.h"
19#include "llvm/MC/MCExpr.h"
20#include "llvm/Support/DataTypes.h"
21#include "llvm/Support/ErrorHandling.h"
22
23namespace llvm {
24
25/// MipsII - This namespace holds all of the target specific flags that
26/// instruction info tracks.
27///
28namespace MipsII {
29  /// Target Operand Flag enum.
30  enum TOF {
31    //===------------------------------------------------------------------===//
32    // Mips Specific MachineOperand flags.
33
34    MO_NO_FLAG,
35
36    /// MO_GOT16 - Represents the offset into the global offset table at which
37    /// the address the relocation entry symbol resides during execution.
38    MO_GOT16,
39    MO_GOT,
40
41    /// MO_GOT_CALL - Represents the offset into the global offset table at
42    /// which the address of a call site relocation entry symbol resides
43    /// during execution. This is different from the above since this flag
44    /// can only be present in call instructions.
45    MO_GOT_CALL,
46
47    /// MO_GPREL - Represents the offset from the current gp value to be used
48    /// for the relocatable object file being produced.
49    MO_GPREL,
50
51    /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol
52    /// address.
53    MO_ABS_HI,
54    MO_ABS_LO,
55
56    /// MO_TLSGD - Represents the offset into the global offset table at which
57    // the module ID and TSL block offset reside during execution (General
58    // Dynamic TLS).
59    MO_TLSGD,
60
61    /// MO_TLSLDM - Represents the offset into the global offset table at which
62    // the module ID and TSL block offset reside during execution (Local
63    // Dynamic TLS).
64    MO_TLSLDM,
65    MO_DTPREL_HI,
66    MO_DTPREL_LO,
67
68    /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial
69    // Exec TLS).
70    MO_GOTTPREL,
71
72    /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from
73    // the thread pointer (Local Exec TLS).
74    MO_TPREL_HI,
75    MO_TPREL_LO,
76
77    // N32/64 Flags.
78    MO_GPOFF_HI,
79    MO_GPOFF_LO,
80    MO_GOT_DISP,
81    MO_GOT_PAGE,
82    MO_GOT_OFST,
83
84    /// MO_HIGHER/HIGHEST - Represents the highest or higher half word of a
85    /// 64-bit symbol address.
86    MO_HIGHER,
87    MO_HIGHEST,
88
89    /// MO_GOT_HI16/LO16, MO_CALL_HI16/LO16 - Relocations used for large GOTs.
90    MO_GOT_HI16,
91    MO_GOT_LO16,
92    MO_CALL_HI16,
93    MO_CALL_LO16
94  };
95
96  enum {
97    //===------------------------------------------------------------------===//
98    // Instruction encodings.  These are the standard/most common forms for
99    // Mips instructions.
100    //
101
102    // Pseudo - This represents an instruction that is a pseudo instruction
103    // or one that has not been implemented yet.  It is illegal to code generate
104    // it, but tolerated for intermediate implementation stages.
105    Pseudo   = 0,
106
107    /// FrmR - This form is for instructions of the format R.
108    FrmR  = 1,
109    /// FrmI - This form is for instructions of the format I.
110    FrmI  = 2,
111    /// FrmJ - This form is for instructions of the format J.
112    FrmJ  = 3,
113    /// FrmFR - This form is for instructions of the format FR.
114    FrmFR = 4,
115    /// FrmFI - This form is for instructions of the format FI.
116    FrmFI = 5,
117    /// FrmOther - This form is for instructions that have no specific format.
118    FrmOther = 6,
119
120    FormMask = 15
121  };
122}
123
124
125/// getMipsRegisterNumbering - Given the enum value for some register,
126/// return the number that it corresponds to.
127inline static unsigned getMipsRegisterNumbering(unsigned RegEnum)
128{
129  switch (RegEnum) {
130  case Mips::ZERO: case Mips::ZERO_64: case Mips::F0: case Mips::D0_64:
131  case Mips::D0:   case Mips::FCC0:    case Mips::AC0:
132    return 0;
133  case Mips::AT: case Mips::AT_64: case Mips::F1: case Mips::D1_64:
134  case Mips::AC1:
135    return 1;
136  case Mips::V0: case Mips::V0_64: case Mips::F2: case Mips::D2_64:
137  case Mips::D1: case Mips::AC2:
138    return 2;
139  case Mips::V1: case Mips::V1_64: case Mips::F3: case Mips::D3_64:
140  case Mips::AC3:
141    return 3;
142  case Mips::A0: case Mips::A0_64: case Mips::F4: case Mips::D4_64:
143  case Mips::D2:
144    return 4;
145  case Mips::A1: case Mips::A1_64: case Mips::F5: case Mips::D5_64:
146    return 5;
147  case Mips::A2: case Mips::A2_64: case Mips::F6: case Mips::D6_64:
148  case Mips::D3:
149    return 6;
150  case Mips::A3: case Mips::A3_64: case Mips::F7: case Mips::D7_64:
151    return 7;
152  case Mips::T0: case Mips::T0_64: case Mips::F8: case Mips::D8_64:
153  case Mips::D4:
154    return 8;
155  case Mips::T1: case Mips::T1_64: case Mips::F9: case Mips::D9_64:
156    return 9;
157  case Mips::T2: case Mips::T2_64: case Mips::F10: case Mips::D10_64:
158  case Mips::D5:
159    return 10;
160  case Mips::T3: case Mips::T3_64: case Mips::F11: case Mips::D11_64:
161    return 11;
162  case Mips::T4: case Mips::T4_64: case Mips::F12: case Mips::D12_64:
163  case Mips::D6:
164    return 12;
165  case Mips::T5: case Mips::T5_64: case Mips::F13: case Mips::D13_64:
166    return 13;
167  case Mips::T6: case Mips::T6_64: case Mips::F14: case Mips::D14_64:
168  case Mips::D7:
169    return 14;
170  case Mips::T7: case Mips::T7_64: case Mips::F15: case Mips::D15_64:
171    return 15;
172  case Mips::S0: case Mips::S0_64: case Mips::F16: case Mips::D16_64:
173  case Mips::D8:
174    return 16;
175  case Mips::S1: case Mips::S1_64: case Mips::F17: case Mips::D17_64:
176    return 17;
177  case Mips::S2: case Mips::S2_64: case Mips::F18: case Mips::D18_64:
178  case Mips::D9:
179    return 18;
180  case Mips::S3: case Mips::S3_64: case Mips::F19: case Mips::D19_64:
181    return 19;
182  case Mips::S4: case Mips::S4_64: case Mips::F20: case Mips::D20_64:
183  case Mips::D10:
184    return 20;
185  case Mips::S5: case Mips::S5_64: case Mips::F21: case Mips::D21_64:
186    return 21;
187  case Mips::S6: case Mips::S6_64: case Mips::F22: case Mips::D22_64:
188  case Mips::D11:
189    return 22;
190  case Mips::S7: case Mips::S7_64: case Mips::F23: case Mips::D23_64:
191    return 23;
192  case Mips::T8: case Mips::T8_64: case Mips::F24: case Mips::D24_64:
193  case Mips::D12:
194    return 24;
195  case Mips::T9: case Mips::T9_64: case Mips::F25: case Mips::D25_64:
196    return 25;
197  case Mips::K0: case Mips::K0_64: case Mips::F26: case Mips::D26_64:
198  case Mips::D13:
199    return 26;
200  case Mips::K1: case Mips::K1_64: case Mips::F27: case Mips::D27_64:
201    return 27;
202  case Mips::GP: case Mips::GP_64: case Mips::F28: case Mips::D28_64:
203  case Mips::D14:
204    return 28;
205  case Mips::SP: case Mips::SP_64: case Mips::F29: case Mips::D29_64:
206  case Mips::HWR29:
207    return 29;
208  case Mips::FP: case Mips::FP_64: case Mips::F30: case Mips::D30_64:
209  case Mips::D15:
210    return 30;
211  case Mips::RA: case Mips::RA_64: case Mips::F31: case Mips::D31_64:
212    return 31;
213  default: llvm_unreachable("Unknown register number!");
214  }
215}
216
217inline static std::pair<const MCSymbolRefExpr*, int64_t>
218MipsGetSymAndOffset(const MCFixup &Fixup) {
219  MCFixupKind FixupKind = Fixup.getKind();
220
221  if ((FixupKind < FirstTargetFixupKind) ||
222      (FixupKind >= MCFixupKind(Mips::LastTargetFixupKind)))
223    return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);
224
225  const MCExpr *Expr = Fixup.getValue();
226  MCExpr::ExprKind Kind = Expr->getKind();
227
228  if (Kind == MCExpr::Binary) {
229    const MCBinaryExpr *BE = static_cast<const MCBinaryExpr*>(Expr);
230    const MCExpr *LHS = BE->getLHS();
231    const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(BE->getRHS());
232
233    if ((LHS->getKind() != MCExpr::SymbolRef) || !CE)
234      return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);
235
236    return std::make_pair(cast<MCSymbolRefExpr>(LHS), CE->getValue());
237  }
238
239  if (Kind != MCExpr::SymbolRef)
240    return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);
241
242  return std::make_pair(cast<MCSymbolRefExpr>(Expr), 0);
243}
244}
245
246#endif
247