MipsMCCodeEmitter.h revision cd81d94322a39503e4a3e87b6ee03d4fcb3465fb
12a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===//
22a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//
32a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//                     The LLVM Compiler Infrastructure
42a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//
52a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)// This file is distributed under the University of Illinois Open Source
62a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)// License. See LICENSE.TXT for details.
72a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//
82a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//===----------------------------------------------------------------------===//
92a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//
102a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)// This file defines the MipsMCCodeEmitter class.
112a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//
122a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//===----------------------------------------------------------------------===//
132a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)//
142a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
152a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)#ifndef MIPS_MC_CODE_EMITTER_H
162a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)#define MIPS_MC_CODE_EMITTER_H
172a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
182a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)#include "llvm/MC/MCCodeEmitter.h"
192a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)#include "llvm/Support/DataTypes.h"
202a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
212a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)using namespace llvm;
222a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
232a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)namespace llvm {
242a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MCContext;
252a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MCExpr;
262a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MCInst;
272a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MCInstrInfo;
282a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MCFixup;
292a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MCOperand;
302a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MCSubtargetInfo;
312a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class raw_ostream;
322a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
332a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)class MipsMCCodeEmitter : public MCCodeEmitter {
342a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
352a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
362a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  const MCInstrInfo &MCII;
372a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  MCContext &Ctx;
382a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  bool IsLittleEndian;
392a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
402a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  bool isMicroMips(const MCSubtargetInfo &STI) const;
412a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
422a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)public:
432a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
442a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)      : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
452a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
462a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  ~MipsMCCodeEmitter() {}
472a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
482a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  void EmitByte(unsigned char C, raw_ostream &OS) const;
492a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
502a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
512a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)                       raw_ostream &OS) const;
522a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)
532a99a7e74a7f215066514fe81d2bfa6639d9edddTorne (Richard Coles)  void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
54                         SmallVectorImpl<MCFixup> &Fixups,
55                         const MCSubtargetInfo &STI) const override;
56
57  // getBinaryCodeForInstr - TableGen'erated function for getting the
58  // binary encoding for an instruction.
59  uint64_t getBinaryCodeForInstr(const MCInst &MI,
60                                 SmallVectorImpl<MCFixup> &Fixups,
61                                 const MCSubtargetInfo &STI) const;
62
63  // getBranchJumpOpValue - Return binary encoding of the jump
64  // target operand. If the machine operand requires relocation,
65  // record the relocation and return zero.
66  unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
67                                SmallVectorImpl<MCFixup> &Fixups,
68                                const MCSubtargetInfo &STI) const;
69
70  // getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
71  // target operand. If the machine operand requires relocation,
72  // record the relocation and return zero.
73  unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
74                                  SmallVectorImpl<MCFixup> &Fixups,
75                                  const MCSubtargetInfo &STI) const;
76
77  // getBranchTargetOpValue - Return binary encoding of the branch
78  // target operand. If the machine operand requires relocation,
79  // record the relocation and return zero.
80  unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
81                                  SmallVectorImpl<MCFixup> &Fixups,
82                                  const MCSubtargetInfo &STI) const;
83
84  // getBranchTargetOpValue - Return binary encoding of the microMIPS branch
85  // target operand. If the machine operand requires relocation,
86  // record the relocation and return zero.
87  unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
88                                    SmallVectorImpl<MCFixup> &Fixups,
89                                    const MCSubtargetInfo &STI) const;
90
91  // getBranchTarget21OpValue - Return binary encoding of the branch
92  // offset operand. If the machine operand requires relocation,
93  // record the relocation and return zero.
94  unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
95                                   SmallVectorImpl<MCFixup> &Fixups,
96                                   const MCSubtargetInfo &STI) const;
97
98  // getBranchTarget26OpValue - Return binary encoding of the branch
99  // offset operand. If the machine operand requires relocation,
100  // record the relocation and return zero.
101  unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
102                                    SmallVectorImpl<MCFixup> &Fixups,
103                                    const MCSubtargetInfo &STI) const;
104
105  // getJumpOffset16OpValue - Return binary encoding of the jump
106  // offset operand. If the machine operand requires relocation,
107  // record the relocation and return zero.
108  unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
109                                  SmallVectorImpl<MCFixup> &Fixups,
110                                  const MCSubtargetInfo &STI) const;
111
112  // getMachineOpValue - Return binary encoding of operand. If the machin
113  // operand requires relocation, record the relocation and return zero.
114  unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
115                             SmallVectorImpl<MCFixup> &Fixups,
116                             const MCSubtargetInfo &STI) const;
117
118  unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
119                             SmallVectorImpl<MCFixup> &Fixups,
120                             const MCSubtargetInfo &STI) const;
121
122  unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
123                          SmallVectorImpl<MCFixup> &Fixups,
124                          const MCSubtargetInfo &STI) const;
125  unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
126                                 SmallVectorImpl<MCFixup> &Fixups,
127                                 const MCSubtargetInfo &STI) const;
128  unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
129                              SmallVectorImpl<MCFixup> &Fixups,
130                              const MCSubtargetInfo &STI) const;
131  unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
132                              SmallVectorImpl<MCFixup> &Fixups,
133                              const MCSubtargetInfo &STI) const;
134
135  // getLSAImmEncoding - Return binary encoding of LSA immediate.
136  unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
137                             SmallVectorImpl<MCFixup> &Fixups,
138                             const MCSubtargetInfo &STI) const;
139
140  unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo,
141                                 SmallVectorImpl<MCFixup> &Fixups,
142                                 const MCSubtargetInfo &STI) const;
143
144  unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
145                                 SmallVectorImpl<MCFixup> &Fixups,
146                                 const MCSubtargetInfo &STI) const;
147
148  unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
149                          const MCSubtargetInfo &STI) const;
150
151}; // class MipsMCCodeEmitter
152} // namespace llvm.
153
154#endif
155