MicroMipsInstrInfo.td revision dadd1fba3280295936f556acbdc3fbb68b496bad 
1def addrimm12 : ComplexPattern<iPTR, 2, "selectIntAddrMM", [frameindex]>;
2
3def simm12 : Operand<i32> {
4  let DecoderMethod = "DecodeSimm12";
5}
6
7def mem_mm_12 : Operand<i32> {
8  let PrintMethod = "printMemOperand";
9  let MIOperandInfo = (ops GPR32, simm12);
10  let EncoderMethod = "getMemEncodingMMImm12";
11  let ParserMatchClass = MipsMemAsmOperand;
12  let OperandType = "OPERAND_MEMORY";
13}
14
15let canFoldAsLoad = 1 in
16class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
17                      Operand MemOpnd> :
18  InstSE<(outs RO:$rt), (ins MemOpnd:$addr, RO:$src),
19         !strconcat(opstr, "\t$rt, $addr"),
20         [(set RO:$rt, (OpNode addrimm12:$addr, RO:$src))],
21         NoItinerary, FrmI> {
22  let DecoderMethod = "DecodeMemMMImm12";
23  string Constraints = "$src = $rt";
24}
25
26class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
27                       Operand MemOpnd>:
28  InstSE<(outs), (ins RO:$rt, MemOpnd:$addr),
29         !strconcat(opstr, "\t$rt, $addr"),
30         [(OpNode RO:$rt, addrimm12:$addr)], NoItinerary, FrmI> {
31  let DecoderMethod = "DecodeMemMMImm12";
32}
33
34let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
35  /// Arithmetic Instructions (ALU Immediate)
36  def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>,
37                 ADDI_FM_MM<0xc>;
38  def ADDi_MM  : MMRel, ArithLogicI<"addi", simm16, GPR32Opnd>,
39                 ADDI_FM_MM<0x4>;
40  def SLTi_MM  : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>,
41                 SLTI_FM_MM<0x24>;
42  def SLTiu_MM : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, GPR32Opnd>,
43                 SLTI_FM_MM<0x2c>;
44  def ANDi_MM  : MMRel, ArithLogicI<"andi", uimm16, GPR32Opnd>,
45                 ADDI_FM_MM<0x34>;
46  def ORi_MM   : MMRel, ArithLogicI<"ori", uimm16, GPR32Opnd>,
47                 ADDI_FM_MM<0x14>;
48  def XORi_MM  : MMRel, ArithLogicI<"xori", uimm16, GPR32Opnd>,
49                 ADDI_FM_MM<0x1c>;
50  def LUi_MM   : MMRel, LoadUpper<"lui", GPR32Opnd, uimm16>, LUI_FM_MM;
51
52  /// Arithmetic Instructions (3-Operand, R-Type)
53  def ADDu_MM  : MMRel, ArithLogicR<"addu", GPR32Opnd>, ADD_FM_MM<0, 0x150>;
54  def SUBu_MM  : MMRel, ArithLogicR<"subu", GPR32Opnd>, ADD_FM_MM<0, 0x1d0>;
55  def MUL_MM   : MMRel, ArithLogicR<"mul", GPR32Opnd>, ADD_FM_MM<0, 0x210>;
56  def ADD_MM   : MMRel, ArithLogicR<"add", GPR32Opnd>, ADD_FM_MM<0, 0x110>;
57  def SUB_MM   : MMRel, ArithLogicR<"sub", GPR32Opnd>, ADD_FM_MM<0, 0x190>;
58  def SLT_MM   : MMRel, SetCC_R<"slt", setlt, GPR32Opnd>, ADD_FM_MM<0, 0x350>;
59  def SLTu_MM  : MMRel, SetCC_R<"sltu", setult, GPR32Opnd>,
60                 ADD_FM_MM<0, 0x390>;
61  def AND_MM   : MMRel, ArithLogicR<"and", GPR32Opnd, 1, IIAlu, and>,
62                 ADD_FM_MM<0, 0x250>;
63  def OR_MM    : MMRel, ArithLogicR<"or", GPR32Opnd, 1, IIAlu, or>,
64                 ADD_FM_MM<0, 0x290>;
65  def XOR_MM   : MMRel, ArithLogicR<"xor", GPR32Opnd, 1, IIAlu, xor>,
66                 ADD_FM_MM<0, 0x310>;
67  def NOR_MM   : MMRel, LogicNOR<"nor", GPR32Opnd>, ADD_FM_MM<0, 0x2d0>;
68  def MULT_MM  : MMRel, Mult<"mult", IIImul, GPR32Opnd, [HI0, LO0]>,
69                 MULT_FM_MM<0x22c>;
70  def MULTu_MM : MMRel, Mult<"multu", IIImul, GPR32Opnd, [HI0, LO0]>,
71                 MULT_FM_MM<0x26c>;
72
73  /// Shift Instructions
74  def SLL_MM   : MMRel, shift_rotate_imm<"sll", shamt, GPR32Opnd>,
75                 SRA_FM_MM<0, 0>;
76  def SRL_MM   : MMRel, shift_rotate_imm<"srl", shamt, GPR32Opnd>,
77                 SRA_FM_MM<0x40, 0>;
78  def SRA_MM   : MMRel, shift_rotate_imm<"sra", shamt, GPR32Opnd>,
79                 SRA_FM_MM<0x80, 0>;
80  def SLLV_MM  : MMRel, shift_rotate_reg<"sllv", GPR32Opnd>,
81                 SRLV_FM_MM<0x10, 0>;
82  def SRLV_MM  : MMRel, shift_rotate_reg<"srlv", GPR32Opnd>,
83                 SRLV_FM_MM<0x50, 0>;
84  def SRAV_MM  : MMRel, shift_rotate_reg<"srav", GPR32Opnd>,
85                 SRLV_FM_MM<0x90, 0>;
86  def ROTR_MM  : MMRel, shift_rotate_imm<"rotr", shamt, GPR32Opnd>,
87                 SRA_FM_MM<0xc0, 0>;
88  def ROTRV_MM : MMRel, shift_rotate_reg<"rotrv", GPR32Opnd>,
89                 SRLV_FM_MM<0xd0, 0>;
90
91  /// Load and Store Instructions - aligned
92  let DecoderMethod = "DecodeMemMMImm16" in {
93    def LB_MM  : Load<"lb", GPR32Opnd>, MMRel, LW_FM_MM<0x7>;
94    def LBu_MM : Load<"lbu", GPR32Opnd>, MMRel, LW_FM_MM<0x5>;
95    def LH_MM  : Load<"lh", GPR32Opnd>, MMRel, LW_FM_MM<0xf>;
96    def LHu_MM : Load<"lhu", GPR32Opnd>, MMRel, LW_FM_MM<0xd>;
97    def LW_MM  : Load<"lw", GPR32Opnd>, MMRel, LW_FM_MM<0x3f>;
98    def SB_MM  : Store<"sb", GPR32Opnd>, MMRel, LW_FM_MM<0x6>;
99    def SH_MM  : Store<"sh", GPR32Opnd>, MMRel, LW_FM_MM<0xe>;
100    def SW_MM  : Store<"sw", GPR32Opnd>, MMRel, LW_FM_MM<0x3e>;
101  }
102
103  /// Load and Store Instructions - unaligned
104  def LWL_MM : LoadLeftRightMM<"lwl", MipsLWL, GPR32Opnd, mem_mm_12>,
105               LWL_FM_MM<0x0>;
106  def LWR_MM : LoadLeftRightMM<"lwr", MipsLWR, GPR32Opnd, mem_mm_12>,
107               LWL_FM_MM<0x1>;
108  def SWL_MM : StoreLeftRightMM<"swl", MipsSWL, GPR32Opnd, mem_mm_12>,
109               LWL_FM_MM<0x8>;
110  def SWR_MM : StoreLeftRightMM<"swr", MipsSWR, GPR32Opnd, mem_mm_12>,
111               LWL_FM_MM<0x9>;
112
113  /// Move Conditional
114  def MOVZ_I_MM : MMRel, CMov_I_I_FT<"movz", GPR32Opnd, GPR32Opnd,
115                  NoItinerary>, ADD_FM_MM<0, 0x58>;
116  def MOVN_I_MM : MMRel, CMov_I_I_FT<"movn", GPR32Opnd, GPR32Opnd,
117                  NoItinerary>, ADD_FM_MM<0, 0x18>;
118  def MOVT_I_MM : MMRel, CMov_F_I_FT<"movt", GPR32Opnd, IIAlu>,
119                  CMov_F_I_FM_MM<0x25>;
120  def MOVF_I_MM : MMRel, CMov_F_I_FT<"movf", GPR32Opnd, IIAlu>,
121                  CMov_F_I_FM_MM<0x5>;
122
123  /// Move to/from HI/LO
124  def MTHI_MM : MMRel, MoveToLOHI<"mthi", GPR32Opnd, [HI0]>,
125                MTLO_FM_MM<0x0b5>;
126  def MTLO_MM : MMRel, MoveToLOHI<"mtlo", GPR32Opnd, [LO0]>,
127                MTLO_FM_MM<0x0f5>;
128  def MFHI_MM : MMRel, MoveFromLOHI<"mfhi", GPR32Opnd, [HI0]>,
129                MFLO_FM_MM<0x035>;
130  def MFLO_MM : MMRel, MoveFromLOHI<"mflo", GPR32Opnd, [LO0]>,
131                MFLO_FM_MM<0x075>;
132}
133