Mips16FrameLowering.cpp revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- Mips16FrameLowering.cpp - Mips16 Frame Information ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the Mips16 implementation of TargetFrameLowering class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "Mips16FrameLowering.h"
15#include "MCTargetDesc/MipsBaseInfo.h"
16#include "Mips16InstrInfo.h"
17#include "MipsInstrInfo.h"
18#include "MipsRegisterInfo.h"
19#include "llvm/CodeGen/MachineFrameInfo.h"
20#include "llvm/CodeGen/MachineFunction.h"
21#include "llvm/CodeGen/MachineInstrBuilder.h"
22#include "llvm/CodeGen/MachineModuleInfo.h"
23#include "llvm/CodeGen/MachineRegisterInfo.h"
24#include "llvm/IR/DataLayout.h"
25#include "llvm/IR/Function.h"
26#include "llvm/Support/CommandLine.h"
27#include "llvm/Target/TargetOptions.h"
28
29using namespace llvm;
30
31void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
32  MachineBasicBlock &MBB = MF.front();
33  MachineFrameInfo *MFI = MF.getFrameInfo();
34  const Mips16InstrInfo &TII =
35    *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
36  MachineBasicBlock::iterator MBBI = MBB.begin();
37  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
38  uint64_t StackSize = MFI->getStackSize();
39
40  // No need to allocate space on the stack.
41  if (StackSize == 0 && !MFI->adjustsStack()) return;
42
43  MachineModuleInfo &MMI = MF.getMMI();
44  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
45  MachineLocation DstML, SrcML;
46
47  // Adjust stack.
48  TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
49
50  // emit ".cfi_def_cfa_offset StackSize"
51  unsigned CFIIndex = MMI.addFrameInst(
52      MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
53  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
54      .addCFIIndex(CFIIndex);
55
56  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
57
58  if (CSI.size()) {
59    const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
60
61    for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
62         E = CSI.end(); I != E; ++I) {
63      int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
64      unsigned Reg = I->getReg();
65      unsigned DReg = MRI->getDwarfRegNum(Reg, true);
66      unsigned CFIIndex = MMI.addFrameInst(
67          MCCFIInstruction::createOffset(nullptr, DReg, Offset));
68      BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
69          .addCFIIndex(CFIIndex);
70    }
71  }
72  if (hasFP(MF))
73    BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
74      .addReg(Mips::SP);
75
76}
77
78void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
79                                 MachineBasicBlock &MBB) const {
80  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
81  MachineFrameInfo *MFI = MF.getFrameInfo();
82  const Mips16InstrInfo &TII =
83    *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
84  DebugLoc dl = MBBI->getDebugLoc();
85  uint64_t StackSize = MFI->getStackSize();
86
87  if (!StackSize)
88    return;
89
90  if (hasFP(MF))
91    BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
92      .addReg(Mips::S0);
93
94  // Adjust stack.
95  // assumes stacksize multiple of 8
96  TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
97}
98
99bool Mips16FrameLowering::
100spillCalleeSavedRegisters(MachineBasicBlock &MBB,
101                          MachineBasicBlock::iterator MI,
102                          const std::vector<CalleeSavedInfo> &CSI,
103                          const TargetRegisterInfo *TRI) const {
104  MachineFunction *MF = MBB.getParent();
105  MachineBasicBlock *EntryBlock = MF->begin();
106
107  //
108  // Registers RA, S0,S1 are the callee saved registers and they
109  // will be saved with the "save" instruction
110  // during emitPrologue
111  //
112  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
113    // Add the callee-saved register as live-in. Do not add if the register is
114    // RA and return address is taken, because it has already been added in
115    // method MipsTargetLowering::LowerRETURNADDR.
116    // It's killed at the spill, unless the register is RA and return address
117    // is taken.
118    unsigned Reg = CSI[i].getReg();
119    bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
120      && MF->getFrameInfo()->isReturnAddressTaken();
121    if (!IsRAAndRetAddrIsTaken)
122      EntryBlock->addLiveIn(Reg);
123  }
124
125  return true;
126}
127
128bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
129                                          MachineBasicBlock::iterator MI,
130                                       const std::vector<CalleeSavedInfo> &CSI,
131                                       const TargetRegisterInfo *TRI) const {
132  //
133  // Registers RA,S0,S1 are the callee saved registers and they will be restored
134  // with the restore instruction during emitEpilogue.
135  // We need to override this virtual function, otherwise llvm will try and
136  // restore the registers on it's on from the stack.
137  //
138
139  return true;
140}
141
142// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
143void Mips16FrameLowering::
144eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
145                              MachineBasicBlock::iterator I) const {
146  if (!hasReservedCallFrame(MF)) {
147    int64_t Amount = I->getOperand(0).getImm();
148
149    if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
150      Amount = -Amount;
151
152    const Mips16InstrInfo &TII =
153      *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
154
155    TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
156  }
157
158  MBB.erase(I);
159}
160
161bool
162Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
163  const MachineFrameInfo *MFI = MF.getFrameInfo();
164  // Reserve call frame if the size of the maximum call frame fits into 15-bit
165  // immediate field and there are no variable sized objects on the stack.
166  return isInt<15>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects();
167}
168
169void Mips16FrameLowering::
170processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
171                                     RegScavenger *RS) const {
172  const Mips16InstrInfo &TII =
173    *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
174  const MipsRegisterInfo &RI = TII.getRegisterInfo();
175  const BitVector Reserved = RI.getReservedRegs(MF);
176  bool SaveS2 = Reserved[Mips::S2];
177  if (SaveS2)
178    MF.getRegInfo().setPhysRegUsed(Mips::S2);
179  if (hasFP(MF))
180    MF.getRegInfo().setPhysRegUsed(Mips::S0);
181}
182
183const MipsFrameLowering *
184llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
185  return new Mips16FrameLowering(ST);
186}
187