Mips16ISelLowering.h revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338 
1//===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Subclass of MipsTargetLowering specialized for mips16.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef Mips16ISELLOWERING_H
15#define Mips16ISELLOWERING_H
16
17#include "MipsISelLowering.h"
18
19namespace llvm {
20  class Mips16TargetLowering : public MipsTargetLowering  {
21  public:
22    explicit Mips16TargetLowering(MipsTargetMachine &TM);
23
24    virtual bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
25                                               bool *Fast) const;
26
27    virtual MachineBasicBlock *
28    EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
29
30  private:
31    virtual bool
32    isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
33                                      unsigned NextStackOffset,
34                                      const MipsFunctionInfo& FI) const;
35
36    void setMips16HardFloatLibCalls();
37
38    unsigned int
39      getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
40
41    const char *getMips16HelperFunction
42      (Type* RetTy, ArgListTy &Args, bool &needHelper) const;
43
44    virtual void
45    getOpndList(SmallVectorImpl<SDValue> &Ops,
46                std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
47                bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
48                CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const;
49
50    MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI,
51                                 MachineBasicBlock *BB) const;
52
53    MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
54                                   MachineInstr *MI,
55                                   MachineBasicBlock *BB) const;
56
57    MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
58                                  MachineInstr *MI,
59                                  MachineBasicBlock *BB) const;
60
61    MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
62                                           MachineInstr *MI,
63                                           MachineBasicBlock *BB) const;
64
65    MachineBasicBlock *emitFEXT_T8I8I16_ins(
66      unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, bool ImmSigned,
67      MachineInstr *MI,  MachineBasicBlock *BB) const;
68
69    MachineBasicBlock *emitFEXT_CCRX16_ins(
70      unsigned SltOpc,
71      MachineInstr *MI,  MachineBasicBlock *BB) const;
72
73    MachineBasicBlock *emitFEXT_CCRXI16_ins(
74      unsigned SltiOpc, unsigned SltiXOpc,
75      MachineInstr *MI,  MachineBasicBlock *BB )const;
76  };
77}
78
79#endif // Mips16ISELLOWERING_H
80