Mips16InstrInfo.h revision cef95f702a5586781e5f812078a5c57f6f0e962b
10bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka//===-- Mips16InstrInfo.h - Mips16 Instruction Information ------*- C++ -*-===// 20bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// 30bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// The LLVM Compiler Infrastructure 40bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// 50bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// This file is distributed under the University of Illinois Open Source 60bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// License. See LICENSE.TXT for details. 70bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// 80bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka//===----------------------------------------------------------------------===// 90bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// 100bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// This file contains the Mips16 implementation of the TargetInstrInfo class. 110bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka// 120bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka//===----------------------------------------------------------------------===// 130bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 140bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka#ifndef MIPS16INSTRUCTIONINFO_H 150bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka#define MIPS16INSTRUCTIONINFO_H 160bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 178589010e3d1d5a902992a5039cffa9d4116982c5Akira Hatanaka#include "Mips16RegisterInfo.h" 18a1514e24cc24b050f53a12650e047799358833a1Chandler Carruth#include "MipsInstrInfo.h" 190bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 200bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanakanamespace llvm { 210bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 220bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanakaclass Mips16InstrInfo : public MipsInstrInfo { 238589010e3d1d5a902992a5039cffa9d4116982c5Akira Hatanaka const Mips16RegisterInfo RI; 248589010e3d1d5a902992a5039cffa9d4116982c5Akira Hatanaka 250bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanakapublic: 260bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka explicit Mips16InstrInfo(MipsTargetMachine &TM); 270bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 288589010e3d1d5a902992a5039cffa9d4116982c5Akira Hatanaka virtual const MipsRegisterInfo &getRegisterInfo() const; 298589010e3d1d5a902992a5039cffa9d4116982c5Akira Hatanaka 300bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// isLoadFromStackSlot - If the specified machine instruction is a direct 310bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// load from a stack slot, return the virtual or physical register number of 320bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// the destination along with the FrameIndex of the loaded stack slot. If 330bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// not, return 0. This predicate must return 0 if the instruction has 340bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// any side effects other than loading from the stack slot. 350bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 360bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka int &FrameIndex) const; 370bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 380bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// isStoreToStackSlot - If the specified machine instruction is a direct 390bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// store to a stack slot, return the virtual or physical register number of 400bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// the source reg along with the FrameIndex of the loaded stack slot. If 410bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// not, return 0. This predicate must return 0 if the instruction has 420bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka /// any side effects other than storing to the stack slot. 430bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 440bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka int &FrameIndex) const; 450bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 460bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual void copyPhysReg(MachineBasicBlock &MBB, 470bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka MachineBasicBlock::iterator MI, DebugLoc DL, 480bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka unsigned DestReg, unsigned SrcReg, 490bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka bool KillSrc) const; 500bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 510bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 520bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka MachineBasicBlock::iterator MBBI, 530bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka unsigned SrcReg, bool isKill, int FrameIndex, 540bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka const TargetRegisterClass *RC, 550bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka const TargetRegisterInfo *TRI) const; 560bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 570bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 580bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka MachineBasicBlock::iterator MBBI, 590bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka unsigned DestReg, int FrameIndex, 600bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka const TargetRegisterClass *RC, 610bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka const TargetRegisterInfo *TRI) const; 620bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 630bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const; 640bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 650bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual unsigned GetOppositeBranchOpc(unsigned Opc) const; 660bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 67cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler // Adjust SP by FrameSize bytes. Save RA, S0, S1 68cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, 69cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler MachineBasicBlock::iterator I) const; 70cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 71cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler // Adjust SP by FrameSize bytes. Restore RA, S0, S1 72cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, 73cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler MachineBasicBlock::iterator I) const; 74cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 75cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 769441125d636dee246acf9cb6c8f264edda92c335Reed Kotler /// Adjust SP by Amount bytes. 779441125d636dee246acf9cb6c8f264edda92c335Reed Kotler void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, 789441125d636dee246acf9cb6c8f264edda92c335Reed Kotler MachineBasicBlock::iterator I) const; 799441125d636dee246acf9cb6c8f264edda92c335Reed Kotler 80cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler /// Emit a series of instructions to load an immediate. If NewImm is a 81cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler /// non-NULL parameter, the last instruction is not emitted, but instead 82cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler /// its immediate operand is returned in NewImm. 83cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler unsigned loadImmediate(int64_t Imm, MachineBasicBlock &MBB, 84cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler MachineBasicBlock::iterator II, DebugLoc DL, 85cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler unsigned *NewImm) const; 86cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 870bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanakaprivate: 880bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka virtual unsigned GetAnalyzableBrOpc(unsigned Opc) const; 890bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 900bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka void ExpandRetRA16(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 910bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka unsigned Opc) const; 92cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 93cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler // Adjust SP by Amount bytes where bytes can be up to 32bit number. 94cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, 95cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler MachineBasicBlock::iterator I, 96cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler unsigned Reg1, unsigned Reg2) const; 97cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 98cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler // Adjust SP by Amount bytes where bytes can be up to 32bit number. 99cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, 100cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler MachineBasicBlock::iterator I) const; 101cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 102cef95f702a5586781e5f812078a5c57f6f0e962bReed Kotler 1030bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka}; 1040bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 1050bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka} 1060bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka 1070bc1adbbc4fdc6d85a671ed70a1bbd345dba445dAkira Hatanaka#endif 108