Mips16InstrInfo.h revision 8589010e3d1d5a902992a5039cffa9d4116982c5
1//===-- Mips16InstrInfo.h - Mips16 Instruction Information ------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the Mips16 implementation of the TargetInstrInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef MIPS16INSTRUCTIONINFO_H 15#define MIPS16INSTRUCTIONINFO_H 16 17#include "MipsInstrInfo.h" 18#include "Mips16RegisterInfo.h" 19 20namespace llvm { 21 22class Mips16InstrInfo : public MipsInstrInfo { 23 const Mips16RegisterInfo RI; 24 25public: 26 explicit Mips16InstrInfo(MipsTargetMachine &TM); 27 28 virtual const MipsRegisterInfo &getRegisterInfo() const; 29 30 /// isLoadFromStackSlot - If the specified machine instruction is a direct 31 /// load from a stack slot, return the virtual or physical register number of 32 /// the destination along with the FrameIndex of the loaded stack slot. If 33 /// not, return 0. This predicate must return 0 if the instruction has 34 /// any side effects other than loading from the stack slot. 35 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 36 int &FrameIndex) const; 37 38 /// isStoreToStackSlot - If the specified machine instruction is a direct 39 /// store to a stack slot, return the virtual or physical register number of 40 /// the source reg along with the FrameIndex of the loaded stack slot. If 41 /// not, return 0. This predicate must return 0 if the instruction has 42 /// any side effects other than storing to the stack slot. 43 virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 44 int &FrameIndex) const; 45 46 virtual void copyPhysReg(MachineBasicBlock &MBB, 47 MachineBasicBlock::iterator MI, DebugLoc DL, 48 unsigned DestReg, unsigned SrcReg, 49 bool KillSrc) const; 50 51 virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 52 MachineBasicBlock::iterator MBBI, 53 unsigned SrcReg, bool isKill, int FrameIndex, 54 const TargetRegisterClass *RC, 55 const TargetRegisterInfo *TRI) const; 56 57 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 58 MachineBasicBlock::iterator MBBI, 59 unsigned DestReg, int FrameIndex, 60 const TargetRegisterClass *RC, 61 const TargetRegisterInfo *TRI) const; 62 63 virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const; 64 65 virtual unsigned GetOppositeBranchOpc(unsigned Opc) const; 66 67private: 68 virtual unsigned GetAnalyzableBrOpc(unsigned Opc) const; 69 70 void ExpandRetRA16(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 71 unsigned Opc) const; 72}; 73 74} 75 76#endif 77