Mips16InstrInfo.td revision 54c5bc87992ebeaa9e71f2bfb60ac5cf74b77db3
1//===- Mips16InstrInfo.td - Target Description for Mips16 -*- tablegen -*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips16 instructions. 11// 12//===----------------------------------------------------------------------===// 13 14class Mips16Pat<dag pattern, dag result> : Pat<pattern, result> { 15 let Predicates = [InMips16Mode]; 16} 17 18def LI16E : FEXT_RI16<0b01101, (outs CPU16Regs:$rx), 19 (ins uimm16:$amt), 20 !strconcat("li", "\t$rx, $amt"), 21 [(set CPU16Regs:$rx, immZExt16:$amt )],IILoad>; 22 23let isReturn=1, isTerminator=1, hasDelaySlot=1, isCodeGenOnly=1, 24 isBarrier=1, hasCtrlDep=1, rx=0, nd=0, l=0, ra=0 in 25def RET16 : FRR16_JALRC 26 < (outs), (ins CPURAReg:$target), 27 "jr\t$target", [(MipsRet CPURAReg:$target)], IIBranch>; 28 29// As stack alignment is always done with addiu, we need a 16-bit immediate 30let Defs = [SP], Uses = [SP] in { 31def ADJCALLSTACKDOWN16 : MipsPseudo16<(outs), (ins uimm16:$amt), 32 "!ADJCALLSTACKDOWN $amt", 33 [(callseq_start timm:$amt)]>; 34def ADJCALLSTACKUP16 : MipsPseudo16<(outs), (ins uimm16:$amt1, uimm16:$amt2), 35 "!ADJCALLSTACKUP $amt1", 36 [(callseq_end timm:$amt1, timm:$amt2)]>; 37} 38 39 40// Jump and Link (Call) 41let isCall=1, hasDelaySlot=1, nd=0, l=0, ra=0 in 42def JumpLinkReg16: 43 FRR16_JALRC<(outs), (ins CPU16Regs:$rs, variable_ops), 44 "jalr \t$rs", [(MipsJmpLink CPU16Regs:$rs)], IIBranch>; 45 46// Small immediates 47def : Mips16Pat<(i32 immZExt16:$in), (LI16E immZExt16:$in)>; 48