Mips16RegisterInfo.cpp revision 5114226c1896f250be8881adf67d55a7e54b50fc 
1
2//===-- Mips16RegisterInfo.cpp - MIPS16 Register Information -== ----------===//
3//
4//                     The LLVM Compiler Infrastructure
5//
6// This file is distributed under the University of Illinois Open Source
7// License. See LICENSE.TXT for details.
8//
9//===----------------------------------------------------------------------===//
10//
11// This file contains the MIPS16 implementation of the TargetRegisterInfo class.
12//
13//===----------------------------------------------------------------------===//
14
15#include "Mips16RegisterInfo.h"
16#include "Mips16InstrInfo.h"
17#include "Mips.h"
18#include "Mips16InstrInfo.h"
19#include "MipsAnalyzeImmediate.h"
20#include "MipsInstrInfo.h"
21#include "MipsMachineFunction.h"
22#include "MipsSubtarget.h"
23#include "llvm/ADT/BitVector.h"
24#include "llvm/ADT/STLExtras.h"
25#include "llvm/CodeGen/MachineFrameInfo.h"
26#include "llvm/CodeGen/MachineFunction.h"
27#include "llvm/CodeGen/MachineInstrBuilder.h"
28#include "llvm/CodeGen/MachineRegisterInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/DebugInfo.h"
31#include "llvm/IR/Constants.h"
32#include "llvm/IR/Function.h"
33#include "llvm/IR/Type.h"
34#include "llvm/Support/CommandLine.h"
35#include "llvm/Support/Debug.h"
36#include "llvm/Support/ErrorHandling.h"
37#include "llvm/Support/raw_ostream.h"
38#include "llvm/Target/TargetFrameLowering.h"
39#include "llvm/Target/TargetInstrInfo.h"
40#include "llvm/Target/TargetMachine.h"
41#include "llvm/Target/TargetOptions.h"
42
43using namespace llvm;
44
45Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST,
46    const Mips16InstrInfo &I)
47  : MipsRegisterInfo(ST), TII(I) {}
48
49bool Mips16RegisterInfo::requiresRegisterScavenging
50  (const MachineFunction &MF) const {
51  return true;
52}
53bool Mips16RegisterInfo::requiresFrameIndexScavenging
54  (const MachineFunction &MF) const {
55  return true;
56}
57
58bool Mips16RegisterInfo::useFPForScavengingIndex
59  (const MachineFunction &MF) const {
60  return false;
61}
62
63bool Mips16RegisterInfo::saveScavengerRegister
64  (MachineBasicBlock &MBB,
65   MachineBasicBlock::iterator I,
66   MachineBasicBlock::iterator &UseMI,
67   const TargetRegisterClass *RC,
68   unsigned Reg) const {
69  DebugLoc DL;
70  TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
71  TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
72  return true;
73}
74
75const TargetRegisterClass *
76Mips16RegisterInfo::intRegClass(unsigned Size) const {
77  assert(Size == 4);
78  return &Mips::CPU16RegsRegClass;
79}
80
81void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
82                                     unsigned OpNo, int FrameIndex,
83                                     uint64_t StackSize,
84                                     int64_t SPOffset) const {
85  MachineInstr &MI = *II;
86  MachineFunction &MF = *MI.getParent()->getParent();
87  MachineFrameInfo *MFI = MF.getFrameInfo();
88
89  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
90  int MinCSFI = 0;
91  int MaxCSFI = -1;
92
93  if (CSI.size()) {
94    MinCSFI = CSI[0].getFrameIdx();
95    MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
96  }
97
98  // The following stack frame objects are always
99  // referenced relative to $sp:
100  //  1. Outgoing arguments.
101  //  2. Pointer to dynamically allocated stack space.
102  //  3. Locations for callee-saved registers.
103  // Everything else is referenced relative to whatever register
104  // getFrameRegister() returns.
105  unsigned FrameReg;
106
107  if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
108    FrameReg = Mips::SP;
109  else {
110    const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
111    if (TFI->hasFP(MF)) {
112      FrameReg = Mips::S0;
113    }
114    else {
115      if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
116        FrameReg = MI.getOperand(OpNo+2).getReg();
117      else
118        FrameReg = Mips::SP;
119    }
120  }
121  // Calculate final offset.
122  // - There is no need to change the offset if the frame object
123  //   is one of the
124  //   following: an outgoing argument, pointer to a dynamically allocated
125  //   stack space or a $gp restore location,
126  // - If the frame object is any of the following,
127  //   its offset must be adjusted
128  //   by adding the size of the stack:
129  //   incoming argument, callee-saved register location or local variable.
130  int64_t Offset;
131  bool IsKill = false;
132  Offset = SPOffset + (int64_t)StackSize;
133  Offset += MI.getOperand(OpNo + 1).getImm();
134
135
136  DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
137
138  if (!MI.isDebugValue() && ( ((FrameReg != Mips::SP) && !isInt<16>(Offset)) ||
139      ((FrameReg == Mips::SP) && !isInt<15>(Offset)) )) {
140    MachineBasicBlock &MBB = *MI.getParent();
141    DebugLoc DL = II->getDebugLoc();
142    unsigned NewImm;
143    FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
144    Offset = SignExtend64<16>(NewImm);
145    IsKill = true;
146  }
147  MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
148  MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
149
150
151}
152