1//=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes Mips32r6 instruction formats.
11//
12//===----------------------------------------------------------------------===//
13
14class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>,
15                   PredicateControl {
16  let DecoderNamespace = "Mips32r6_64r6";
17  let EncodingPredicates = [HasStdEnc];
18}
19
20//===----------------------------------------------------------------------===//
21//
22// Field Values
23//
24//===----------------------------------------------------------------------===//
25
26class OPGROUP<bits<6> Val> {
27  bits<6> Value = Val;
28}
29def OPGROUP_COP1     : OPGROUP<0b010001>;
30def OPGROUP_COP2     : OPGROUP<0b010010>;
31def OPGROUP_ADDI     : OPGROUP<0b001000>;
32def OPGROUP_AUI      : OPGROUP<0b001111>;
33def OPGROUP_BLEZ     : OPGROUP<0b000110>;
34def OPGROUP_BGTZ     : OPGROUP<0b000111>;
35def OPGROUP_BLEZL    : OPGROUP<0b010110>;
36def OPGROUP_BGTZL    : OPGROUP<0b010111>;
37def OPGROUP_DADDI    : OPGROUP<0b011000>;
38def OPGROUP_DAUI     : OPGROUP<0b011101>;
39def OPGROUP_PCREL    : OPGROUP<0b111011>;
40def OPGROUP_REGIMM   : OPGROUP<0b000001>;
41def OPGROUP_SPECIAL  : OPGROUP<0b000000>;
42// The spec occasionally names this value LL, LLD, SC, or SCD.
43def OPGROUP_SPECIAL3 : OPGROUP<0b011111>;
44// The spec names this constant LWC2, LDC2, SWC2, and SDC2 in different places.
45def OPGROUP_COP2LDST : OPGROUP<0b010010>;
46
47class OPCODE2<bits<2> Val> {
48  bits<2> Value = Val;
49}
50def OPCODE2_ADDIUPC : OPCODE2<0b00>;
51def OPCODE2_LWPC    : OPCODE2<0b01>;
52def OPCODE2_LWUPC   : OPCODE2<0b10>;
53
54class OPCODE3<bits<3> Val> {
55  bits<3> Value = Val;
56}
57def OPCODE3_LDPC : OPCODE3<0b110>;
58
59class OPCODE5<bits<5> Val> {
60  bits<5> Value = Val;
61}
62def OPCODE5_ALUIPC : OPCODE5<0b11111>;
63def OPCODE5_AUIPC  : OPCODE5<0b11110>;
64def OPCODE5_DAHI : OPCODE5<0b00110>;
65def OPCODE5_DATI : OPCODE5<0b11110>;
66def OPCODE5_BC1EQZ : OPCODE5<0b01001>;
67def OPCODE5_BC1NEZ : OPCODE5<0b01101>;
68def OPCODE5_BC2EQZ : OPCODE5<0b01001>;
69def OPCODE5_BC2NEZ : OPCODE5<0b01101>;
70def OPCODE5_BGEZAL : OPCODE5<0b10001>;
71// The next four constants are unnamed in the spec. These names are taken from
72// the OPGROUP names they are used with.
73def OPCODE5_LDC2   : OPCODE5<0b01110>;
74def OPCODE5_LWC2   : OPCODE5<0b01010>;
75def OPCODE5_SDC2   : OPCODE5<0b01111>;
76def OPCODE5_SWC2   : OPCODE5<0b01011>;
77
78class OPCODE6<bits<6> Val> {
79  bits<6> Value = Val;
80}
81def OPCODE6_ALIGN    : OPCODE6<0b100000>;
82def OPCODE6_DALIGN   : OPCODE6<0b100100>;
83def OPCODE6_BITSWAP  : OPCODE6<0b100000>;
84def OPCODE6_DBITSWAP : OPCODE6<0b100100>;
85def OPCODE6_JALR     : OPCODE6<0b001001>;
86def OPCODE6_CACHE    : OPCODE6<0b100101>;
87def OPCODE6_PREF     : OPCODE6<0b110101>;
88// The next four constants are unnamed in the spec. These names are taken from
89// the OPGROUP names they are used with.
90def OPCODE6_LL       : OPCODE6<0b110110>;
91def OPCODE6_LLD      : OPCODE6<0b110111>;
92def OPCODE6_SC       : OPCODE6<0b100110>;
93def OPCODE6_SCD      : OPCODE6<0b100111>;
94def OPCODE6_CLO      : OPCODE6<0b010001>;
95def OPCODE6_CLZ      : OPCODE6<0b010000>;
96def OPCODE6_DCLO     : OPCODE6<0b010011>;
97def OPCODE6_DCLZ     : OPCODE6<0b010010>;
98def OPCODE6_LSA      : OPCODE6<0b000101>;
99def OPCODE6_DLSA     : OPCODE6<0b010101>;
100def OPCODE6_SDBBP    : OPCODE6<0b001110>;
101
102class FIELD_FMT<bits<5> Val> {
103  bits<5> Value = Val;
104}
105def FIELD_FMT_S : FIELD_FMT<0b10000>;
106def FIELD_FMT_D : FIELD_FMT<0b10001>;
107
108class FIELD_CMP_COND<bits<5> Val> {
109  bits<5> Value = Val;
110}
111// Note: The CMP_COND_FMT names differ from the C_COND_FMT names.
112def FIELD_CMP_COND_AF   : FIELD_CMP_COND<0b00000>;
113def FIELD_CMP_COND_UN   : FIELD_CMP_COND<0b00001>;
114def FIELD_CMP_COND_EQ   : FIELD_CMP_COND<0b00010>;
115def FIELD_CMP_COND_UEQ  : FIELD_CMP_COND<0b00011>;
116def FIELD_CMP_COND_LT   : FIELD_CMP_COND<0b00100>;
117def FIELD_CMP_COND_ULT  : FIELD_CMP_COND<0b00101>;
118def FIELD_CMP_COND_LE   : FIELD_CMP_COND<0b00110>;
119def FIELD_CMP_COND_ULE  : FIELD_CMP_COND<0b00111>;
120def FIELD_CMP_COND_SAF  : FIELD_CMP_COND<0b01000>;
121def FIELD_CMP_COND_SUN  : FIELD_CMP_COND<0b01001>;
122def FIELD_CMP_COND_SEQ  : FIELD_CMP_COND<0b01010>;
123def FIELD_CMP_COND_SUEQ : FIELD_CMP_COND<0b01011>;
124def FIELD_CMP_COND_SLT  : FIELD_CMP_COND<0b01100>;
125def FIELD_CMP_COND_SULT : FIELD_CMP_COND<0b01101>;
126def FIELD_CMP_COND_SLE  : FIELD_CMP_COND<0b01110>;
127def FIELD_CMP_COND_SULE : FIELD_CMP_COND<0b01111>;
128
129class FIELD_CMP_FORMAT<bits<5> Val> {
130  bits<5> Value = Val;
131}
132def FIELD_CMP_FORMAT_S : FIELD_CMP_FORMAT<0b10100>;
133def FIELD_CMP_FORMAT_D : FIELD_CMP_FORMAT<0b10101>;
134
135//===----------------------------------------------------------------------===//
136//
137// Disambiguators
138//
139//===----------------------------------------------------------------------===//
140//
141// Some encodings are ambiguous except by comparing field values.
142
143class DecodeDisambiguates<string Name> {
144  string DecoderMethod = !strconcat("Decode", Name);
145}
146
147class DecodeDisambiguatedBy<string Name> : DecodeDisambiguates<Name> {
148  string DecoderNamespace = "Mips32r6_64r6_Ambiguous";
149}
150
151//===----------------------------------------------------------------------===//
152//
153// Encoding Formats
154//
155//===----------------------------------------------------------------------===//
156
157class AUI_FM : MipsR6Inst {
158  bits<5> rs;
159  bits<5> rt;
160  bits<16> imm;
161
162  bits<32> Inst;
163
164  let Inst{31-26} = OPGROUP_AUI.Value;
165  let Inst{25-21} = rs;
166  let Inst{20-16} = rt;
167  let Inst{15-0} = imm;
168}
169
170class DAUI_FM : AUI_FM {
171  let Inst{31-26} = OPGROUP_DAUI.Value;
172}
173
174class BAL_FM : MipsR6Inst {
175  bits<16> offset;
176
177  bits<32> Inst;
178
179  let Inst{31-26} = OPGROUP_REGIMM.Value;
180  let Inst{25-21} = 0b00000;
181  let Inst{20-16} = OPCODE5_BGEZAL.Value;
182  let Inst{15-0} = offset;
183}
184
185class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
186  bits<5> fs;
187  bits<5> fd;
188
189  bits<32> Inst;
190
191  let Inst{31-26} = OPGROUP_COP1.Value;
192  let Inst{25-21} = Format.Value;
193  let Inst{20-16} = 0b00000;
194  let Inst{15-11} = fs;
195  let Inst{10-6}  = fd;
196  let Inst{5-0}   = funct;
197}
198
199class COP1_3R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
200  bits<5> ft;
201  bits<5> fs;
202  bits<5> fd;
203
204  bits<32> Inst;
205
206  let Inst{31-26} = OPGROUP_COP1.Value;
207  let Inst{25-21} = Format.Value;
208  let Inst{20-16} = ft;
209  let Inst{15-11} = fs;
210  let Inst{10-6} = fd;
211  let Inst{5-0} = funct;
212}
213
214class COP1_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
215  bits<5> ft;
216  bits<16> offset;
217
218  bits<32> Inst;
219
220  let Inst{31-26} = OPGROUP_COP1.Value;
221  let Inst{25-21} = Operation.Value;
222  let Inst{20-16} = ft;
223  let Inst{15-0} = offset;
224}
225
226class COP2_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
227  bits<5> ct;
228  bits<16> offset;
229
230  bits<32> Inst;
231
232  let Inst{31-26} = OPGROUP_COP2.Value;
233  let Inst{25-21} = Operation.Value;
234  let Inst{20-16} = ct;
235  let Inst{15-0} = offset;
236}
237
238class PCREL16_FM<OPCODE5 Operation> : MipsR6Inst {
239  bits<5> rs;
240  bits<16> imm;
241
242  bits<32> Inst;
243
244  let Inst{31-26} = OPGROUP_PCREL.Value;
245  let Inst{25-21} = rs;
246  let Inst{20-16} = Operation.Value;
247  let Inst{15-0} = imm;
248}
249
250class PCREL19_FM<OPCODE2 Operation> : MipsR6Inst {
251  bits<5> rs;
252  bits<19> imm;
253
254  bits<32> Inst;
255
256  let Inst{31-26} = OPGROUP_PCREL.Value;
257  let Inst{25-21} = rs;
258  let Inst{20-19} = Operation.Value;
259  let Inst{18-0} = imm;
260}
261
262class PCREL18_FM<OPCODE3 Operation> : MipsR6Inst {
263  bits<5> rs;
264  bits<18> imm;
265
266  bits<32> Inst;
267
268  let Inst{31-26} = OPGROUP_PCREL.Value;
269  let Inst{25-21} = rs;
270  let Inst{20-18} = Operation.Value;
271  let Inst{17-0} = imm;
272}
273
274class SPECIAL3_2R_FM<OPCODE6 Operation> : MipsR6Inst {
275  bits<5> rd;
276  bits<5> rt;
277
278  bits<32> Inst;
279
280  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
281  let Inst{25-21} = 0b00000;
282  let Inst{20-16} = rt;
283  let Inst{15-11} = rd;
284  let Inst{10-6}  = 0b00000;
285  let Inst{5-0}   = Operation.Value;
286}
287
288class SPECIAL3_MEM_FM<OPCODE6 Operation> : MipsR6Inst {
289  bits<21> addr;
290  bits<5> hint;
291  bits<5> base = addr{20-16};
292  bits<9> offset = addr{8-0};
293
294  bits<32> Inst;
295
296  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
297  let Inst{25-21} = base;
298  let Inst{20-16} = hint;
299  let Inst{15-7}  = offset;
300  let Inst{6}     = 0;
301  let Inst{5-0}   = Operation.Value;
302}
303
304class SPECIAL_2R_FM<OPCODE6 Operation> : MipsR6Inst {
305  bits<5> rd;
306  bits<5> rs;
307
308  bits<32> Inst;
309
310  let Inst{31-26} = OPGROUP_SPECIAL.Value;
311  let Inst{25-21} = rs;
312  let Inst{20-16} = 0b00000;
313  let Inst{15-11} = rd;
314  let Inst{10-6}  = 0b00001;
315  let Inst{5-0}   = Operation.Value;
316}
317
318class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst {
319  bits<5> rd;
320  bits<5> rs;
321  bits<5> rt;
322
323  bits<32> Inst;
324
325  let Inst{31-26} = OPGROUP_SPECIAL.Value;
326  let Inst{25-21} = rs;
327  let Inst{20-16} = rt;
328  let Inst{15-11} = rd;
329  let Inst{10-6}  = mulop;
330  let Inst{5-0}   = funct;
331}
332
333class SPECIAL_SDBBP_FM : MipsR6Inst {
334  bits<20> code_;
335
336  bits<32> Inst;
337
338  let Inst{31-26} = OPGROUP_SPECIAL.Value;
339  let Inst{25-6}  = code_;
340  let Inst{5-0}   = OPCODE6_SDBBP.Value;
341}
342
343// This class is ambiguous with other branches:
344//   BEQC/BNEC require that rs > rt
345class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst {
346  bits<5> rs;
347  bits<5> rt;
348  bits<16> offset;
349
350  bits<32> Inst;
351
352  let Inst{31-26} = funct.Value;
353  let Inst{25-21} = rs;
354  let Inst{20-16} = rt;
355  let Inst{15-0} = offset;
356}
357
358// This class is ambiguous with other branches:
359//   BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0
360// The '1R_RT' in the name means 1 register in the rt field.
361class CMP_BRANCH_1R_RT_OFF16_FM<OPGROUP funct> : MipsR6Inst {
362  bits<5> rt;
363  bits<16> offset;
364
365  bits<32> Inst;
366
367  let Inst{31-26} = funct.Value;
368  let Inst{25-21} = 0b00000;
369  let Inst{20-16} = rt;
370  let Inst{15-0} = offset;
371}
372
373// This class is ambiguous with other branches:
374//   BLTZC/BGTZC/BLTZALC/BGEZALC require that rs == rt && rt != 0
375// The '1R_BOTH' in the name means 1 register in both the rs and rt fields.
376class CMP_BRANCH_1R_BOTH_OFF16_FM<OPGROUP funct> : MipsR6Inst {
377  bits<5> rt;
378  bits<16> offset;
379
380  bits<32> Inst;
381
382  let Inst{31-26} = funct.Value;
383  let Inst{25-21} = rt;
384  let Inst{20-16} = rt;
385  let Inst{15-0} = offset;
386}
387
388class CMP_BRANCH_OFF21_FM<bits<6> funct> : MipsR6Inst {
389  bits<5> rs; // rs != 0
390  bits<21> offset;
391
392  bits<32> Inst;
393
394  let Inst{31-26} = funct;
395  let Inst{25-21} = rs;
396  let Inst{20-0} = offset;
397}
398
399class JMP_IDX_COMPACT_FM<bits<6> funct> : MipsR6Inst {
400  bits<5> rt;
401  bits<16> offset;
402
403  bits<32> Inst;
404
405  let Inst{31-26} = funct;
406  let Inst{25-21} = 0b000000;
407  let Inst{20-16} = rt;
408  let Inst{15-0} = offset;
409}
410
411class BRANCH_OFF26_FM<bits<6> funct> : MipsR6Inst {
412  bits<32> Inst;
413  bits<26> offset;
414
415  let Inst{31-26} = funct;
416  let Inst{25-0} = offset;
417}
418
419class SPECIAL3_ALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
420  bits<5> rd;
421  bits<5> rs;
422  bits<5> rt;
423  bits<2> bp;
424
425  bits<32> Inst;
426
427  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
428  let Inst{25-21} = rs;
429  let Inst{20-16} = rt;
430  let Inst{15-11} = rd;
431  let Inst{10-8}  = 0b010;
432  let Inst{7-6}   = bp;
433  let Inst{5-0}   = Operation.Value;
434}
435
436class SPECIAL3_DALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
437  bits<5> rd;
438  bits<5> rs;
439  bits<5> rt;
440  bits<3> bp;
441
442  bits<32> Inst;
443
444  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
445  let Inst{25-21} = rs;
446  let Inst{20-16} = rt;
447  let Inst{15-11} = rd;
448  let Inst{10-9}  = 0b01;
449  let Inst{8-6}   = bp;
450  let Inst{5-0}   = Operation.Value;
451}
452
453class SPECIAL3_LL_SC_FM<OPCODE6 Operation> : MipsR6Inst {
454  bits<5> rt;
455  bits<21> addr;
456  bits<5> base = addr{20-16};
457  bits<9> offset = addr{8-0};
458
459  bits<32> Inst;
460
461  let Inst{31-26} = OPGROUP_SPECIAL3.Value;
462  let Inst{25-21} = base;
463  let Inst{20-16} = rt;
464  let Inst{15-7} = offset;
465  let Inst{5-0} = Operation.Value;
466
467  string DecoderMethod = "DecodeSpecial3LlSc";
468}
469
470class SPECIAL_LSA_FM<OPCODE6 Operation> : MipsR6Inst {
471  bits<5> rd;
472  bits<5> rs;
473  bits<5> rt;
474  bits<2> imm2;
475
476  bits<32> Inst;
477
478  let Inst{31-26} = OPGROUP_SPECIAL.Value;
479  let Inst{25-21} = rs;
480  let Inst{20-16} = rt;
481  let Inst{15-11} = rd;
482  let Inst{10-8}  = 0b000;
483  let Inst{7-6}   = imm2;
484  let Inst{5-0}   = Operation.Value;
485}
486
487class REGIMM_FM<OPCODE5 Operation> : MipsR6Inst {
488  bits<5> rs;
489  bits<16> imm;
490
491  bits<32> Inst;
492
493  let Inst{31-26} = OPGROUP_REGIMM.Value;
494  let Inst{25-21} = rs;
495  let Inst{20-16} = Operation.Value;
496  let Inst{15-0} = imm;
497}
498
499class COP1_CMP_CONDN_FM<FIELD_CMP_FORMAT Format,
500                        FIELD_CMP_COND Cond> : MipsR6Inst {
501  bits<5> fd;
502  bits<5> fs;
503  bits<5> ft;
504
505  bits<32> Inst;
506
507  let Inst{31-26} = OPGROUP_COP1.Value;
508  let Inst{25-21} = Format.Value;
509  let Inst{20-16} = ft;
510  let Inst{15-11} = fs;
511  let Inst{10-6}  = fd;
512  let Inst{5}     = 0;
513  let Inst{4-0}   = Cond.Value;
514}
515
516class JR_HB_R6_FM<OPCODE6 Operation> : MipsR6Inst {
517  bits<5> rs;
518
519  bits<32> Inst;
520
521  let Inst{31-26} = OPGROUP_SPECIAL.Value;
522  let Inst{25-21} = rs;
523  let Inst{20-16} = 0;
524  let Inst{15-11} = 0;
525  let Inst{10} = 1;
526  let Inst{9-6} = 0;
527  let Inst{5-0} = Operation.Value;
528}
529
530class COP2LDST_FM<OPCODE5 Operation> : MipsR6Inst {
531  bits<5> rt;
532  bits<21> addr;
533  bits<5> base = addr{20-16};
534  bits<11> offset = addr{10-0};
535
536  bits<32> Inst;
537
538  let Inst{31-26} = OPGROUP_COP2LDST.Value;
539  let Inst{25-21} = Operation.Value;
540  let Inst{20-16} = rt;
541  let Inst{15-11} = base;
542  let Inst{10-0}  = offset;
543}
544