Mips32r6InstrFormats.td revision dce4a407a24b04eebc6a376f8e62b41aaa7b071f
1//=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips32r6 instruction formats. 11// 12//===----------------------------------------------------------------------===// 13 14class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>, 15 PredicateControl { 16 let DecoderNamespace = "Mips32r6_64r6"; 17 let EncodingPredicates = [HasStdEnc]; 18} 19 20//===----------------------------------------------------------------------===// 21// 22// Field Values 23// 24//===----------------------------------------------------------------------===// 25 26class OPGROUP<bits<6> Val> { 27 bits<6> Value = Val; 28} 29def OPGROUP_COP1 : OPGROUP<0b010001>; 30def OPGROUP_COP2 : OPGROUP<0b010010>; 31def OPGROUP_ADDI : OPGROUP<0b001000>; 32def OPGROUP_AUI : OPGROUP<0b001111>; 33def OPGROUP_BLEZ : OPGROUP<0b000110>; 34def OPGROUP_BGTZ : OPGROUP<0b000111>; 35def OPGROUP_BLEZL : OPGROUP<0b010110>; 36def OPGROUP_BGTZL : OPGROUP<0b010111>; 37def OPGROUP_DADDI : OPGROUP<0b011000>; 38def OPGROUP_DAUI : OPGROUP<0b011101>; 39def OPGROUP_PCREL : OPGROUP<0b111011>; 40def OPGROUP_REGIMM : OPGROUP<0b000001>; 41def OPGROUP_SPECIAL : OPGROUP<0b000000>; 42def OPGROUP_SPECIAL3 : OPGROUP<0b011111>; 43 44class OPCODE2<bits<2> Val> { 45 bits<2> Value = Val; 46} 47def OPCODE2_ADDIUPC : OPCODE2<0b00>; 48def OPCODE2_LWPC : OPCODE2<0b01>; 49def OPCODE2_LWUPC : OPCODE2<0b10>; 50 51class OPCODE5<bits<5> Val> { 52 bits<5> Value = Val; 53} 54def OPCODE5_ALUIPC : OPCODE5<0b11111>; 55def OPCODE5_AUIPC : OPCODE5<0b11110>; 56def OPCODE5_DAHI : OPCODE5<0b00110>; 57def OPCODE5_DATI : OPCODE5<0b11110>; 58def OPCODE5_BC1EQZ : OPCODE5<0b01001>; 59def OPCODE5_BC1NEZ : OPCODE5<0b01101>; 60def OPCODE5_BC2EQZ : OPCODE5<0b01001>; 61def OPCODE5_BC2NEZ : OPCODE5<0b01101>; 62 63class OPCODE6<bits<6> Val> { 64 bits<6> Value = Val; 65} 66def OPCODE6_ALIGN : OPCODE6<0b100000>; 67def OPCODE6_DALIGN : OPCODE6<0b100100>; 68def OPCODE6_BITSWAP : OPCODE6<0b100000>; 69def OPCODE6_DBITSWAP : OPCODE6<0b100100>; 70 71class FIELD_FMT<bits<5> Val> { 72 bits<5> Value = Val; 73} 74def FIELD_FMT_S : FIELD_FMT<0b10000>; 75def FIELD_FMT_D : FIELD_FMT<0b10001>; 76 77class FIELD_CMP_COND<bits<5> Val> { 78 bits<5> Value = Val; 79} 80def FIELD_CMP_COND_F : FIELD_CMP_COND<0b00000>; 81def FIELD_CMP_COND_UN : FIELD_CMP_COND<0b00001>; 82def FIELD_CMP_COND_EQ : FIELD_CMP_COND<0b00010>; 83def FIELD_CMP_COND_UEQ : FIELD_CMP_COND<0b00011>; 84def FIELD_CMP_COND_OLT : FIELD_CMP_COND<0b00100>; 85def FIELD_CMP_COND_ULT : FIELD_CMP_COND<0b00101>; 86def FIELD_CMP_COND_OLE : FIELD_CMP_COND<0b00110>; 87def FIELD_CMP_COND_ULE : FIELD_CMP_COND<0b00111>; 88def FIELD_CMP_COND_SF : FIELD_CMP_COND<0b01000>; 89def FIELD_CMP_COND_NGLE : FIELD_CMP_COND<0b01001>; 90def FIELD_CMP_COND_SEQ : FIELD_CMP_COND<0b01010>; 91def FIELD_CMP_COND_NGL : FIELD_CMP_COND<0b01011>; 92def FIELD_CMP_COND_LT : FIELD_CMP_COND<0b01100>; 93def FIELD_CMP_COND_NGE : FIELD_CMP_COND<0b01101>; 94def FIELD_CMP_COND_LE : FIELD_CMP_COND<0b01110>; 95def FIELD_CMP_COND_NGT : FIELD_CMP_COND<0b01111>; 96 97class FIELD_CMP_FORMAT<bits<5> Val> { 98 bits<5> Value = Val; 99} 100def FIELD_CMP_FORMAT_S : FIELD_CMP_FORMAT<0b10100>; 101def FIELD_CMP_FORMAT_D : FIELD_CMP_FORMAT<0b10101>; 102 103//===----------------------------------------------------------------------===// 104// 105// Disambiguators 106// 107//===----------------------------------------------------------------------===// 108// 109// Some encodings are ambiguous except by comparing field values. 110 111class DecodeDisambiguates<string Name> { 112 string DecoderMethod = !strconcat("Decode", Name); 113} 114 115class DecodeDisambiguatedBy<string Name> : DecodeDisambiguates<Name> { 116 string DecoderNamespace = "Mips32r6_64r6_Ambiguous"; 117} 118 119//===----------------------------------------------------------------------===// 120// 121// Encoding Formats 122// 123//===----------------------------------------------------------------------===// 124 125class AUI_FM : MipsR6Inst { 126 bits<5> rs; 127 bits<5> rt; 128 bits<16> imm; 129 130 bits<32> Inst; 131 132 let Inst{31-26} = OPGROUP_AUI.Value; 133 let Inst{25-21} = rs; 134 let Inst{20-16} = rt; 135 let Inst{15-0} = imm; 136} 137 138class DAUI_FM : AUI_FM { 139 let Inst{31-26} = OPGROUP_DAUI.Value; 140} 141 142class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst { 143 bits<5> fs; 144 bits<5> fd; 145 146 bits<32> Inst; 147 148 let Inst{31-26} = OPGROUP_COP1.Value; 149 let Inst{25-21} = Format.Value; 150 let Inst{20-16} = 0b00000; 151 let Inst{15-11} = fs; 152 let Inst{10-6} = fd; 153 let Inst{5-0} = funct; 154} 155 156class COP1_3R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst { 157 bits<5> ft; 158 bits<5> fs; 159 bits<5> fd; 160 161 bits<32> Inst; 162 163 let Inst{31-26} = OPGROUP_COP1.Value; 164 let Inst{25-21} = Format.Value; 165 let Inst{20-16} = ft; 166 let Inst{15-11} = fs; 167 let Inst{10-6} = fd; 168 let Inst{5-0} = funct; 169} 170 171class COP1_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst { 172 bits<5> ft; 173 bits<16> offset; 174 175 bits<32> Inst; 176 177 let Inst{31-26} = OPGROUP_COP1.Value; 178 let Inst{25-21} = Operation.Value; 179 let Inst{20-16} = ft; 180 let Inst{15-0} = offset; 181} 182 183class COP2_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst { 184 bits<5> ct; 185 bits<16> offset; 186 187 bits<32> Inst; 188 189 let Inst{31-26} = OPGROUP_COP2.Value; 190 let Inst{25-21} = Operation.Value; 191 let Inst{20-16} = ct; 192 let Inst{15-0} = offset; 193} 194 195class PCREL16_FM<OPCODE5 Operation> : MipsR6Inst { 196 bits<5> rs; 197 bits<16> imm; 198 199 bits<32> Inst; 200 201 let Inst{31-26} = OPGROUP_PCREL.Value; 202 let Inst{25-21} = rs; 203 let Inst{20-16} = Operation.Value; 204 let Inst{15-0} = imm; 205} 206 207class PCREL19_FM<OPCODE2 Operation> : MipsR6Inst { 208 bits<5> rs; 209 bits<19> imm; 210 211 bits<32> Inst; 212 213 let Inst{31-26} = OPGROUP_PCREL.Value; 214 let Inst{25-21} = rs; 215 let Inst{20-19} = Operation.Value; 216 let Inst{18-0} = imm; 217} 218 219class SPECIAL3_2R_FM<OPCODE6 Operation> : MipsR6Inst { 220 bits<5> rd; 221 bits<5> rt; 222 223 bits<32> Inst; 224 225 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 226 let Inst{25-21} = 0b00000; 227 let Inst{20-16} = rt; 228 let Inst{15-11} = rd; 229 let Inst{10-6} = 0b00000; 230 let Inst{5-0} = Operation.Value; 231} 232 233class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst { 234 bits<5> rd; 235 bits<5> rs; 236 bits<5> rt; 237 238 bits<32> Inst; 239 240 let Inst{31-26} = OPGROUP_SPECIAL.Value; 241 let Inst{25-21} = rs; 242 let Inst{20-16} = rt; 243 let Inst{15-11} = rd; 244 let Inst{10-6} = mulop; 245 let Inst{5-0} = funct; 246} 247 248// This class is ambiguous with other branches: 249// BEQC/BNEC require that rs > rt 250class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst { 251 bits<5> rs; 252 bits<5> rt; 253 bits<16> offset; 254 255 bits<32> Inst; 256 257 let Inst{31-26} = funct.Value; 258 let Inst{25-21} = rs; 259 let Inst{20-16} = rt; 260 let Inst{15-0} = offset; 261} 262 263// This class is ambiguous with other branches: 264// BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0 265// The '1R_RT' in the name means 1 register in the rt field. 266class CMP_BRANCH_1R_RT_OFF16_FM<OPGROUP funct> : MipsR6Inst { 267 bits<5> rt; 268 bits<16> offset; 269 270 bits<32> Inst; 271 272 let Inst{31-26} = funct.Value; 273 let Inst{25-21} = 0b00000; 274 let Inst{20-16} = rt; 275 let Inst{15-0} = offset; 276} 277 278// This class is ambiguous with other branches: 279// BLTZC/BGTZC/BLTZALC/BGEZALC require that rs == rt && rt != 0 280// The '1R_BOTH' in the name means 1 register in both the rs and rt fields. 281class CMP_BRANCH_1R_BOTH_OFF16_FM<OPGROUP funct> : MipsR6Inst { 282 bits<5> rt; 283 bits<16> offset; 284 285 bits<32> Inst; 286 287 let Inst{31-26} = funct.Value; 288 let Inst{25-21} = rt; 289 let Inst{20-16} = rt; 290 let Inst{15-0} = offset; 291} 292 293class CMP_BRANCH_OFF21_FM<bits<6> funct> : MipsR6Inst { 294 bits<5> rs; // rs != 0 295 bits<21> offset; 296 297 bits<32> Inst; 298 299 let Inst{31-26} = funct; 300 let Inst{25-21} = rs; 301 let Inst{20-0} = offset; 302} 303 304class JMP_IDX_COMPACT_FM<bits<6> funct> : MipsR6Inst { 305 bits<5> rt; 306 bits<16> offset; 307 308 bits<32> Inst; 309 310 let Inst{31-26} = funct; 311 let Inst{25-21} = 0b000000; 312 let Inst{20-16} = rt; 313 let Inst{15-0} = offset; 314} 315 316class BRANCH_OFF26_FM<bits<6> funct> : MipsR6Inst { 317 bits<32> Inst; 318 bits<26> offset; 319 320 let Inst{31-26} = funct; 321 let Inst{25-0} = offset; 322} 323 324class SPECIAL3_ALIGN_FM<OPCODE6 Operation> : MipsR6Inst { 325 bits<5> rd; 326 bits<5> rs; 327 bits<5> rt; 328 bits<2> bp; 329 330 bits<32> Inst; 331 332 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 333 let Inst{25-21} = rs; 334 let Inst{20-16} = rt; 335 let Inst{15-11} = rd; 336 let Inst{10-8} = 0b010; 337 let Inst{7-6} = bp; 338 let Inst{5-0} = Operation.Value; 339} 340 341class SPECIAL3_DALIGN_FM<OPCODE6 Operation> : MipsR6Inst { 342 bits<5> rd; 343 bits<5> rs; 344 bits<5> rt; 345 bits<3> bp; 346 347 bits<32> Inst; 348 349 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 350 let Inst{25-21} = rs; 351 let Inst{20-16} = rt; 352 let Inst{15-11} = rd; 353 let Inst{10-9} = 0b01; 354 let Inst{8-6} = bp; 355 let Inst{5-0} = Operation.Value; 356} 357 358class REGIMM_FM<OPCODE5 Operation> : MipsR6Inst { 359 bits<5> rs; 360 bits<16> imm; 361 362 bits<32> Inst; 363 364 let Inst{31-26} = OPGROUP_REGIMM.Value; 365 let Inst{25-21} = rs; 366 let Inst{20-16} = Operation.Value; 367 let Inst{15-0} = imm; 368} 369 370class COP1_CMP_CONDN_FM<FIELD_CMP_FORMAT Format, 371 FIELD_CMP_COND Cond> : MipsR6Inst { 372 bits<5> fd; 373 bits<5> fs; 374 bits<5> ft; 375 376 bits<32> Inst; 377 378 let Inst{31-26} = OPGROUP_COP1.Value; 379 let Inst{25-21} = Format.Value; 380 let Inst{20-16} = ft; 381 let Inst{15-11} = fs; 382 let Inst{10-6} = fd; 383 let Inst{5} = 0; 384 let Inst{4-0} = Cond.Value; 385} 386 387