MipsCodeEmitter.cpp revision dce4a407a24b04eebc6a376f8e62b41aaa7b071f
1//===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===---------------------------------------------------------------------===// 9// 10// This file contains the pass that transforms the Mips machine instructions 11// into relocatable machine code. 12// 13//===---------------------------------------------------------------------===// 14 15#include "Mips.h" 16#include "MCTargetDesc/MipsBaseInfo.h" 17#include "MipsInstrInfo.h" 18#include "MipsRelocations.h" 19#include "MipsSubtarget.h" 20#include "MipsTargetMachine.h" 21#include "llvm/ADT/Statistic.h" 22#include "llvm/CodeGen/JITCodeEmitter.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFunctionPass.h" 25#include "llvm/CodeGen/MachineInstr.h" 26#include "llvm/CodeGen/MachineInstrBuilder.h" 27#include "llvm/CodeGen/MachineJumpTableInfo.h" 28#include "llvm/CodeGen/MachineModuleInfo.h" 29#include "llvm/CodeGen/MachineOperand.h" 30#include "llvm/CodeGen/Passes.h" 31#include "llvm/IR/Constants.h" 32#include "llvm/IR/DerivedTypes.h" 33#include "llvm/PassManager.h" 34#include "llvm/Support/Debug.h" 35#include "llvm/Support/ErrorHandling.h" 36#include "llvm/Support/raw_ostream.h" 37#ifndef NDEBUG 38#include <iomanip> 39#endif 40 41using namespace llvm; 42 43#define DEBUG_TYPE "jit" 44 45STATISTIC(NumEmitted, "Number of machine instructions emitted"); 46 47namespace { 48 49class MipsCodeEmitter : public MachineFunctionPass { 50 MipsJITInfo *JTI; 51 const MipsInstrInfo *II; 52 const DataLayout *TD; 53 const MipsSubtarget *Subtarget; 54 TargetMachine &TM; 55 JITCodeEmitter &MCE; 56 const std::vector<MachineConstantPoolEntry> *MCPEs; 57 const std::vector<MachineJumpTableEntry> *MJTEs; 58 bool IsPIC; 59 60 void getAnalysisUsage(AnalysisUsage &AU) const override { 61 AU.addRequired<MachineModuleInfo> (); 62 MachineFunctionPass::getAnalysisUsage(AU); 63 } 64 65 static char ID; 66 67public: 68 MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce) 69 : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr), 70 TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr), 71 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} 72 73 bool runOnMachineFunction(MachineFunction &MF) override; 74 75 const char *getPassName() const override { 76 return "Mips Machine Code Emitter"; 77 } 78 79 /// getBinaryCodeForInstr - This function, generated by the 80 /// CodeEmitterGenerator using TableGen, produces the binary encoding for 81 /// machine instructions. 82 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; 83 84 void emitInstruction(MachineBasicBlock::instr_iterator MI, 85 MachineBasicBlock &MBB); 86 87private: 88 89 void emitWord(unsigned Word); 90 91 /// Routines that handle operands which add machine relocations which are 92 /// fixed up by the relocation stage. 93 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc, 94 bool MayNeedFarStub) const; 95 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const; 96 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const; 97 void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const; 98 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const; 99 100 /// getMachineOpValue - Return binary encoding of operand. If the machine 101 /// operand requires relocation, record the relocation and return zero. 102 unsigned getMachineOpValue(const MachineInstr &MI, 103 const MachineOperand &MO) const; 104 105 unsigned getRelocation(const MachineInstr &MI, 106 const MachineOperand &MO) const; 107 108 unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; 109 unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const; 110 unsigned getBranchTargetOpValueMM(const MachineInstr &MI, 111 unsigned OpNo) const; 112 113 unsigned getBranchTarget21OpValue(const MachineInstr &MI, 114 unsigned OpNo) const; 115 unsigned getBranchTarget26OpValue(const MachineInstr &MI, 116 unsigned OpNo) const; 117 unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const; 118 119 unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; 120 unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const; 121 unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const; 122 unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const; 123 unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const; 124 unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const; 125 unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const; 126 unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const; 127 128 /// Expand pseudo instructions with accumulator register operands. 129 void expandACCInstr(MachineBasicBlock::instr_iterator MI, 130 MachineBasicBlock &MBB, unsigned Opc) const; 131 132 /// \brief Expand pseudo instruction. Return true if MI was expanded. 133 bool expandPseudos(MachineBasicBlock::instr_iterator &MI, 134 MachineBasicBlock &MBB) const; 135}; 136} 137 138char MipsCodeEmitter::ID = 0; 139 140bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) { 141 MipsTargetMachine &Target = static_cast<MipsTargetMachine &>( 142 const_cast<TargetMachine &>(MF.getTarget())); 143 144 JTI = Target.getJITInfo(); 145 II = Target.getInstrInfo(); 146 TD = Target.getDataLayout(); 147 Subtarget = &TM.getSubtarget<MipsSubtarget> (); 148 MCPEs = &MF.getConstantPool()->getConstants(); 149 MJTEs = nullptr; 150 if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables(); 151 JTI->Initialize(MF, IsPIC, Subtarget->isLittle()); 152 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ()); 153 154 do { 155 DEBUG(errs() << "JITTing function '" 156 << MF.getName() << "'\n"); 157 MCE.startFunction(MF); 158 159 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 160 MBB != E; ++MBB){ 161 MCE.StartMachineBasicBlock(MBB); 162 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(), 163 E = MBB->instr_end(); I != E;) 164 emitInstruction(*I++, *MBB); 165 } 166 } while (MCE.finishFunction(MF)); 167 168 return false; 169} 170 171unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI, 172 const MachineOperand &MO) const { 173 // NOTE: This relocations are for static. 174 uint64_t TSFlags = MI.getDesc().TSFlags; 175 uint64_t Form = TSFlags & MipsII::FormMask; 176 if (Form == MipsII::FrmJ) 177 return Mips::reloc_mips_26; 178 if ((Form == MipsII::FrmI || Form == MipsII::FrmFI) 179 && MI.isBranch()) 180 return Mips::reloc_mips_pc16; 181 if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi) 182 return Mips::reloc_mips_hi; 183 return Mips::reloc_mips_lo; 184} 185 186unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI, 187 unsigned OpNo) const { 188 MachineOperand MO = MI.getOperand(OpNo); 189 if (MO.isGlobal()) 190 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true); 191 else if (MO.isSymbol()) 192 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO)); 193 else if (MO.isMBB()) 194 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); 195 else 196 llvm_unreachable("Unexpected jump target operand kind."); 197 return 0; 198} 199 200unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI, 201 unsigned OpNo) const { 202 llvm_unreachable("Unimplemented function."); 203 return 0; 204} 205 206unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI, 207 unsigned OpNo) const { 208 llvm_unreachable("Unimplemented function."); 209 return 0; 210} 211 212unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI, 213 unsigned OpNo) const { 214 llvm_unreachable("Unimplemented function."); 215 return 0; 216} 217 218unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI, 219 unsigned OpNo) const { 220 llvm_unreachable("Unimplemented function."); 221 return 0; 222} 223 224unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI, 225 unsigned OpNo) const { 226 llvm_unreachable("Unimplemented function."); 227 return 0; 228} 229 230unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI, 231 unsigned OpNo) const { 232 MachineOperand MO = MI.getOperand(OpNo); 233 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); 234 return 0; 235} 236 237unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI, 238 unsigned OpNo) const { 239 // Base register is encoded in bits 20-16, offset is encoded in bits 15-0. 240 assert(MI.getOperand(OpNo).isReg()); 241 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16; 242 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits; 243} 244 245unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI, 246 unsigned OpNo) const { 247 llvm_unreachable("Unimplemented function."); 248 return 0; 249} 250 251unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI, 252 unsigned OpNo) const { 253 llvm_unreachable("Unimplemented function."); 254 return 0; 255} 256 257unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI, 258 unsigned OpNo) const { 259 // size is encoded as size-1. 260 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; 261} 262 263unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI, 264 unsigned OpNo) const { 265 // size is encoded as pos+size-1. 266 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) + 267 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; 268} 269 270unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI, 271 unsigned OpNo) const { 272 llvm_unreachable("Unimplemented function."); 273 return 0; 274} 275 276unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI, 277 unsigned OpNo) const { 278 llvm_unreachable("Unimplemented function."); 279 return 0; 280} 281 282/// getMachineOpValue - Return binary encoding of operand. If the machine 283/// operand requires relocation, record the relocation and return zero. 284unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI, 285 const MachineOperand &MO) const { 286 if (MO.isReg()) 287 return TM.getRegisterInfo()->getEncodingValue(MO.getReg()); 288 else if (MO.isImm()) 289 return static_cast<unsigned>(MO.getImm()); 290 else if (MO.isGlobal()) 291 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true); 292 else if (MO.isSymbol()) 293 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO)); 294 else if (MO.isCPI()) 295 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO)); 296 else if (MO.isJTI()) 297 emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO)); 298 else if (MO.isMBB()) 299 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); 300 else 301 llvm_unreachable("Unable to encode MachineOperand!"); 302 return 0; 303} 304 305void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc, 306 bool MayNeedFarStub) const { 307 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc, 308 const_cast<GlobalValue *>(GV), 0, 309 MayNeedFarStub)); 310} 311 312void MipsCodeEmitter:: 313emitExternalSymbolAddress(const char *ES, unsigned Reloc) const { 314 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), 315 Reloc, ES, 0, 0)); 316} 317 318void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const { 319 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), 320 Reloc, CPI, 0, false)); 321} 322 323void MipsCodeEmitter:: 324emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const { 325 MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), 326 Reloc, JTIndex, 0, false)); 327} 328 329void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB, 330 unsigned Reloc) const { 331 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), 332 Reloc, BB)); 333} 334 335void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI, 336 MachineBasicBlock &MBB) { 337 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI); 338 339 // Expand pseudo instruction. Skip if MI was not expanded. 340 if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) && 341 !expandPseudos(MI, MBB)) 342 return; 343 344 MCE.processDebugLoc(MI->getDebugLoc(), true); 345 346 emitWord(getBinaryCodeForInstr(*MI)); 347 ++NumEmitted; // Keep track of the # of mi's emitted 348 349 MCE.processDebugLoc(MI->getDebugLoc(), false); 350} 351 352void MipsCodeEmitter::emitWord(unsigned Word) { 353 DEBUG(errs() << " 0x"; 354 errs().write_hex(Word) << "\n"); 355 if (Subtarget->isLittle()) 356 MCE.emitWordLE(Word); 357 else 358 MCE.emitWordBE(Word); 359} 360 361void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI, 362 MachineBasicBlock &MBB, 363 unsigned Opc) const { 364 // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1". 365 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc)) 366 .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg()); 367} 368 369bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI, 370 MachineBasicBlock &MBB) const { 371 switch (MI->getOpcode()) { 372 case Mips::NOP: 373 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO) 374 .addReg(Mips::ZERO).addImm(0); 375 break; 376 case Mips::B: 377 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO) 378 .addReg(Mips::ZERO).addOperand(MI->getOperand(0)); 379 break; 380 case Mips::TRAP: 381 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0) 382 .addImm(0); 383 break; 384 case Mips::JALRPseudo: 385 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA) 386 .addReg(MI->getOperand(0).getReg()); 387 break; 388 case Mips::PseudoMULT: 389 expandACCInstr(MI, MBB, Mips::MULT); 390 break; 391 case Mips::PseudoMULTu: 392 expandACCInstr(MI, MBB, Mips::MULTu); 393 break; 394 case Mips::PseudoSDIV: 395 expandACCInstr(MI, MBB, Mips::SDIV); 396 break; 397 case Mips::PseudoUDIV: 398 expandACCInstr(MI, MBB, Mips::UDIV); 399 break; 400 case Mips::PseudoMADD: 401 expandACCInstr(MI, MBB, Mips::MADD); 402 break; 403 case Mips::PseudoMADDU: 404 expandACCInstr(MI, MBB, Mips::MADDU); 405 break; 406 case Mips::PseudoMSUB: 407 expandACCInstr(MI, MBB, Mips::MSUB); 408 break; 409 case Mips::PseudoMSUBU: 410 expandACCInstr(MI, MBB, Mips::MSUBU); 411 break; 412 default: 413 return false; 414 } 415 416 (MI--)->eraseFromBundle(); 417 return true; 418} 419 420/// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips 421/// code to the specified MCE object. 422FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM, 423 JITCodeEmitter &JCE) { 424 return new MipsCodeEmitter(TM, JCE); 425} 426 427#include "MipsGenCodeEmitter.inc" 428