MipsDSPInstrInfo.td revision 7e105bcc3ab0e0e8ddc7617b37a9fe9cd1d0b1bf 
1//===- MipsDSPInstrInfo.td - DSP ASE instructions -*- tablegen ------------*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file describes Mips DSP ASE instructions.
11//
12//===----------------------------------------------------------------------===//
13
14// ImmLeaf
15def immZExt2 : ImmLeaf<i32, [{return isUInt<2>(Imm);}]>;
16def immZExt3 : ImmLeaf<i32, [{return isUInt<3>(Imm);}]>;
17def immZExt4 : ImmLeaf<i32, [{return isUInt<4>(Imm);}]>;
18def immZExt8 : ImmLeaf<i32, [{return isUInt<8>(Imm);}]>;
19def immZExt10 : ImmLeaf<i32, [{return isUInt<10>(Imm);}]>;
20def immSExt6 : ImmLeaf<i32, [{return isInt<6>(Imm);}]>;
21
22// Patterns.
23class DSPPat<dag pattern, dag result, Predicate pred = HasDSP> :
24  Pat<pattern, result>, Requires<[pred]>;
25
26class BitconvertPat<ValueType DstVT, ValueType SrcVT, RegisterClass DstRC,
27                    RegisterClass SrcRC> :
28   DSPPat<(DstVT (bitconvert (SrcVT SrcRC:$src))),
29          (COPY_TO_REGCLASS SrcRC:$src, DstRC)>;
30
31def : BitconvertPat<i32, v2i16, CPURegs, DSPRegs>;
32def : BitconvertPat<i32, v4i8, CPURegs, DSPRegs>;
33def : BitconvertPat<v2i16, i32, DSPRegs, CPURegs>;
34def : BitconvertPat<v4i8, i32, DSPRegs, CPURegs>;
35
36def : DSPPat<(v2i16 (load addr:$a)),
37             (v2i16 (COPY_TO_REGCLASS (LW addr:$a), DSPRegs))>;
38def : DSPPat<(v4i8 (load addr:$a)),
39             (v4i8 (COPY_TO_REGCLASS (LW addr:$a), DSPRegs))>;
40def : DSPPat<(store (v2i16 DSPRegs:$val), addr:$a),
41             (SW (COPY_TO_REGCLASS DSPRegs:$val, CPURegs), addr:$a)>;
42def : DSPPat<(store (v4i8 DSPRegs:$val), addr:$a),
43             (SW (COPY_TO_REGCLASS DSPRegs:$val, CPURegs), addr:$a)>;
44