MipsISelLowering.h revision 07cec75913b74d04df40ff7fecf51f87175076c1
1//===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interfaces that Mips uses to lower LLVM code into a
11// selection DAG.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef MipsISELLOWERING_H
16#define MipsISELLOWERING_H
17
18#include "llvm/CodeGen/SelectionDAG.h"
19#include "llvm/Target/TargetLowering.h"
20#include "Mips.h"
21#include "MipsSubtarget.h"
22
23namespace llvm {
24  namespace MipsISD {
25    enum NodeType {
26      // Start the numbering from where ISD NodeType finishes.
27      FIRST_NUMBER = ISD::BUILTIN_OP_END+Mips::INSTRUCTION_LIST_END,
28
29      // Jump and link (call)
30      JmpLink,
31
32      // Get the Higher 16 bits from a 32-bit immediate
33      // No relation with Mips Hi register
34      Hi,
35
36      // Get the Lower 16 bits from a 32-bit immediate
37      // No relation with Mips Lo register
38      Lo,
39
40      // Select CC Pseudo Instruction
41      SelectCC,
42
43      // Return
44      Ret
45    };
46  }
47
48  //===--------------------------------------------------------------------===//
49  // TargetLowering Implementation
50  //===--------------------------------------------------------------------===//
51  class MipsTargetLowering : public TargetLowering
52  {
53    // FrameIndex for return slot.
54    int ReturnAddrIndex;
55
56    // const MipsSubtarget &MipsSubTarget;
57  public:
58
59    explicit MipsTargetLowering(MipsTargetMachine &TM);
60
61    /// LowerOperation - Provide custom lowering hooks for some operations.
62    virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
63
64    /// getTargetNodeName - This method returns the name of a target specific
65    //  DAG node.
66    virtual const char *getTargetNodeName(unsigned Opcode) const;
67
68    /// getSetCCResultType - get the ISD::SETCC result ValueType
69    MVT::ValueType getSetCCResultType(const SDOperand &) const;
70
71  private:
72    // Lower Operand helpers
73    SDOperand LowerCCCArguments(SDOperand Op, SelectionDAG &DAG);
74    SDOperand LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC);
75    SDNode *LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode*TheCall,
76                            unsigned CallingConv, SelectionDAG &DAG);
77    SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG);
78
79    // Lower Operand specifics
80    SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG);
81    SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG);
82    SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG);
83    SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG);
84    SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG);
85    SDOperand LowerJumpTable(SDOperand Op, SelectionDAG &DAG);
86    SDOperand LowerSELECT_CC(SDOperand Op, SelectionDAG &DAG);
87
88    virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
89                                                        MachineBasicBlock *MBB);
90
91    // Inline asm support
92    ConstraintType getConstraintType(const std::string &Constraint) const;
93
94    std::pair<unsigned, const TargetRegisterClass*>
95              getRegForInlineAsmConstraint(const std::string &Constraint,
96              MVT::ValueType VT) const;
97
98    std::vector<unsigned>
99    getRegClassForInlineAsmConstraint(const std::string &Constraint,
100              MVT::ValueType VT) const;
101  };
102}
103
104#endif // MipsISELLOWERING_H
105