MipsInstrInfo.h revision 8589010e3d1d5a902992a5039cffa9d4116982c5
1//===-- MipsInstrInfo.h - Mips Instruction Information ----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the Mips implementation of the TargetInstrInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef MIPSINSTRUCTIONINFO_H 15#define MIPSINSTRUCTIONINFO_H 16 17#include "Mips.h" 18#include "MipsAnalyzeImmediate.h" 19#include "MipsRegisterInfo.h" 20#include "llvm/Support/ErrorHandling.h" 21#include "llvm/Target/TargetInstrInfo.h" 22 23#define GET_INSTRINFO_HEADER 24#include "MipsGenInstrInfo.inc" 25 26namespace llvm { 27 28class MipsInstrInfo : public MipsGenInstrInfo { 29protected: 30 MipsTargetMachine &TM; 31 unsigned UncondBrOpc; 32 33public: 34 explicit MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc); 35 36 /// Branch Analysis 37 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 38 MachineBasicBlock *&FBB, 39 SmallVectorImpl<MachineOperand> &Cond, 40 bool AllowModify) const; 41 42 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; 43 44 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 45 MachineBasicBlock *FBB, 46 const SmallVectorImpl<MachineOperand> &Cond, 47 DebugLoc DL) const; 48 49 virtual 50 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 51 52 virtual MachineInstr* emitFrameIndexDebugValue(MachineFunction &MF, 53 int FrameIx, uint64_t Offset, 54 const MDNode *MDPtr, 55 DebugLoc DL) const; 56 57 /// Insert nop instruction when hazard condition is found 58 virtual void insertNoop(MachineBasicBlock &MBB, 59 MachineBasicBlock::iterator MI) const; 60 61 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 62 /// such, whenever a client has an instance of instruction info, it should 63 /// always be able to get register info as well (through this method). 64 /// 65 virtual const MipsRegisterInfo &getRegisterInfo() const = 0; 66 67 virtual unsigned GetOppositeBranchOpc(unsigned Opc) const = 0; 68 69 /// Return the number of bytes of code the specified instruction may be. 70 unsigned GetInstSizeInBytes(const MachineInstr *MI) const; 71 72protected: 73 bool isZeroImm(const MachineOperand &op) const; 74 75 MachineMemOperand *GetMemOperand(MachineBasicBlock &MBB, int FI, 76 unsigned Flag) const; 77 78private: 79 virtual unsigned GetAnalyzableBrOpc(unsigned Opc) const = 0; 80 81 void AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc, 82 MachineBasicBlock *&BB, 83 SmallVectorImpl<MachineOperand> &Cond) const; 84 85 void BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL, 86 const SmallVectorImpl<MachineOperand>& Cond) const; 87}; 88 89namespace Mips { 90 /// Emit a series of instructions to load an immediate. All instructions 91 /// except for the last one are emitted. The function returns the number of 92 /// MachineInstrs generated. The opcode-immediate pair of the last 93 /// instruction is returned in LastInst, if it is not 0. 94 unsigned 95 loadImmediate(int64_t Imm, bool IsN64, const TargetInstrInfo &TII, 96 MachineBasicBlock& MBB, MachineBasicBlock::iterator II, 97 DebugLoc DL, bool LastInstrIsADDiu, 98 MipsAnalyzeImmediate::Inst *LastInst); 99} 100 101} 102 103#endif 104