1//===-- MipsJITInfo.cpp - Implement the Mips JIT Interface ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the JIT interfaces for the Mips target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "MipsJITInfo.h"
15#include "MipsInstrInfo.h"
16#include "MipsRelocations.h"
17#include "MipsSubtarget.h"
18#include "llvm/CodeGen/JITCodeEmitter.h"
19#include "llvm/IR/Function.h"
20#include "llvm/Support/Debug.h"
21#include "llvm/Support/ErrorHandling.h"
22#include "llvm/Support/Memory.h"
23#include "llvm/Support/raw_ostream.h"
24#include <cstdlib>
25using namespace llvm;
26
27#define DEBUG_TYPE "jit"
28
29
30void MipsJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
31  unsigned NewAddr = (intptr_t)New;
32  unsigned OldAddr = (intptr_t)Old;
33  const unsigned NopInstr = 0x0;
34
35  // If the functions are in the same memory segment, insert PC-region branch.
36  if ((NewAddr & 0xF0000000) == ((OldAddr + 4) & 0xF0000000)) {
37    unsigned *OldInstruction = (unsigned *)Old;
38    *OldInstruction = 0x08000000;
39    unsigned JTargetAddr = NewAddr & 0x0FFFFFFC;
40
41    JTargetAddr >>= 2;
42    *OldInstruction |= JTargetAddr;
43
44    // Insert a NOP.
45    OldInstruction++;
46    *OldInstruction = NopInstr;
47
48    sys::Memory::InvalidateInstructionCache(Old, 2 * 4);
49  } else {
50    // We need to clear hint bits from the instruction, in case it is 'jr ra'.
51    const unsigned HintMask = 0xFFFFF83F, ReturnSequence = 0x03e00008;
52    unsigned* CurrentInstr = (unsigned*)Old;
53    unsigned CurrInstrHintClear = (*CurrentInstr) & HintMask;
54    unsigned* NextInstr = CurrentInstr + 1;
55    unsigned NextInstrHintClear = (*NextInstr) & HintMask;
56
57    // Do absolute jump if there are 2 or more instructions before return from
58    // the old function.
59    if ((CurrInstrHintClear != ReturnSequence) &&
60        (NextInstrHintClear != ReturnSequence)) {
61      const unsigned LuiT0Instr = 0x3c080000, AddiuT0Instr = 0x25080000;
62      const unsigned JrT0Instr = 0x01000008;
63      // lui  t0,  high 16 bit of the NewAddr
64      (*(CurrentInstr++)) = LuiT0Instr | ((NewAddr & 0xffff0000) >> 16);
65      // addiu  t0, t0, low 16 bit of the NewAddr
66      (*(CurrentInstr++)) = AddiuT0Instr | (NewAddr & 0x0000ffff);
67      // jr t0
68      (*(CurrentInstr++)) = JrT0Instr;
69      (*CurrentInstr) = NopInstr;
70
71      sys::Memory::InvalidateInstructionCache(Old, 4 * 4);
72    } else {
73      // Unsupported case
74      report_fatal_error("MipsJITInfo::replaceMachineCodeForFunction");
75    }
76  }
77}
78
79/// JITCompilerFunction - This contains the address of the JIT function used to
80/// compile a function lazily.
81static TargetJITInfo::JITCompilerFn JITCompilerFunction;
82
83// Get the ASMPREFIX for the current host.  This is often '_'.
84#ifndef __USER_LABEL_PREFIX__
85#define __USER_LABEL_PREFIX__
86#endif
87#define GETASMPREFIX2(X) #X
88#define GETASMPREFIX(X) GETASMPREFIX2(X)
89#define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
90
91// CompilationCallback stub - We can't use a C function with inline assembly in
92// it, because the prolog/epilog inserted by GCC won't work for us. Instead,
93// write our own wrapper, which does things our way, so we have complete control
94// over register saving and restoring. This code saves registers, calls
95// MipsCompilationCallbackC and restores registers.
96extern "C" {
97#if defined (__mips__)
98void MipsCompilationCallback();
99
100  asm(
101    ".text\n"
102    ".align 2\n"
103    ".globl " ASMPREFIX "MipsCompilationCallback\n"
104    ASMPREFIX "MipsCompilationCallback:\n"
105    ".ent " ASMPREFIX "MipsCompilationCallback\n"
106    ".frame  $sp, 32, $ra\n"
107    ".set  noreorder\n"
108    ".cpload $t9\n"
109
110    "addiu $sp, $sp, -64\n"
111    ".cprestore 16\n"
112
113    // Save argument registers a0, a1, a2, a3, f12, f14 since they may contain
114    // stuff for the real target function right now. We have to act as if this
115    // whole compilation callback doesn't exist as far as the caller is
116    // concerned. We also need to save the ra register since it contains the
117    // original return address, and t8 register since it contains the address
118    // of the end of function stub.
119    "sw $a0, 20($sp)\n"
120    "sw $a1, 24($sp)\n"
121    "sw $a2, 28($sp)\n"
122    "sw $a3, 32($sp)\n"
123    "sw $ra, 36($sp)\n"
124    "sw $t8, 40($sp)\n"
125    "sdc1 $f12, 48($sp)\n"
126    "sdc1 $f14, 56($sp)\n"
127
128    // t8 points at the end of function stub. Pass the beginning of the stub
129    // to the MipsCompilationCallbackC.
130    "addiu $a0, $t8, -16\n"
131    "jal " ASMPREFIX "MipsCompilationCallbackC\n"
132    "nop\n"
133
134    // Restore registers.
135    "lw $a0, 20($sp)\n"
136    "lw $a1, 24($sp)\n"
137    "lw $a2, 28($sp)\n"
138    "lw $a3, 32($sp)\n"
139    "lw $ra, 36($sp)\n"
140    "lw $t8, 40($sp)\n"
141    "ldc1 $f12, 48($sp)\n"
142    "ldc1 $f14, 56($sp)\n"
143    "addiu $sp, $sp, 64\n"
144
145    // Jump to the (newly modified) stub to invoke the real function.
146    "addiu $t8, $t8, -16\n"
147    "jr $t8\n"
148    "nop\n"
149
150    ".set  reorder\n"
151    ".end " ASMPREFIX "MipsCompilationCallback\n"
152      );
153#else  // host != Mips
154  void MipsCompilationCallback() {
155    llvm_unreachable(
156      "Cannot call MipsCompilationCallback() on a non-Mips arch!");
157  }
158#endif
159}
160
161/// MipsCompilationCallbackC - This is the target-specific function invoked
162/// by the function stub when we did not know the real target of a call.
163/// This function must locate the start of the stub or call site and pass
164/// it into the JIT compiler function.
165extern "C" void MipsCompilationCallbackC(intptr_t StubAddr) {
166  // Get the address of the compiled code for this function.
167  intptr_t NewVal = (intptr_t) JITCompilerFunction((void*) StubAddr);
168
169  // Rewrite the function stub so that we don't end up here every time we
170  // execute the call. We're replacing the first four instructions of the
171  // stub with code that jumps to the compiled function:
172  //   lui $t9, %hi(NewVal)
173  //   addiu $t9, $t9, %lo(NewVal)
174  //   jr $t9
175  //   nop
176
177  int Hi = ((unsigned)NewVal & 0xffff0000) >> 16;
178  if ((NewVal & 0x8000) != 0)
179    Hi++;
180  int Lo = (int)(NewVal & 0xffff);
181
182  *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi;
183  *(intptr_t *)(StubAddr + 4) = 9 << 26 | 25 << 21 | 25 << 16 | Lo;
184  *(intptr_t *)(StubAddr + 8) = 25 << 21 | 8;
185  *(intptr_t *)(StubAddr + 12) = 0;
186
187  sys::Memory::InvalidateInstructionCache((void*) StubAddr, 16);
188}
189
190TargetJITInfo::LazyResolverFn MipsJITInfo::getLazyResolverFunction(
191    JITCompilerFn F) {
192  JITCompilerFunction = F;
193  return MipsCompilationCallback;
194}
195
196TargetJITInfo::StubLayout MipsJITInfo::getStubLayout() {
197  // The stub contains 4 4-byte instructions, aligned at 4 bytes. See
198  // emitFunctionStub for details.
199  StubLayout Result = { 4*4, 4 };
200  return Result;
201}
202
203void *MipsJITInfo::emitFunctionStub(const Function *F, void *Fn,
204                                    JITCodeEmitter &JCE) {
205  JCE.emitAlignment(4);
206  void *Addr = (void*) (JCE.getCurrentPCValue());
207  if (!sys::Memory::setRangeWritable(Addr, 16))
208    llvm_unreachable("ERROR: Unable to mark stub writable.");
209
210  intptr_t EmittedAddr;
211  if (Fn != (void*)(intptr_t)MipsCompilationCallback)
212    EmittedAddr = (intptr_t)Fn;
213  else
214    EmittedAddr = (intptr_t)MipsCompilationCallback;
215
216
217  int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16;
218  if ((EmittedAddr & 0x8000) != 0)
219    Hi++;
220  int Lo = (int)(EmittedAddr & 0xffff);
221
222  // lui $t9, %hi(EmittedAddr)
223  // addiu $t9, $t9, %lo(EmittedAddr)
224  // jalr $t8, $t9
225  // nop
226  if (IsLittleEndian) {
227    JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
228    JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
229    JCE.emitWordLE(25 << 21 | 24 << 11 | 9);
230    JCE.emitWordLE(0);
231  } else {
232    JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi);
233    JCE.emitWordBE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
234    JCE.emitWordBE(25 << 21 | 24 << 11 | 9);
235    JCE.emitWordBE(0);
236  }
237
238  sys::Memory::InvalidateInstructionCache(Addr, 16);
239  if (!sys::Memory::setRangeExecutable(Addr, 16))
240    llvm_unreachable("ERROR: Unable to mark stub executable.");
241
242  return Addr;
243}
244
245/// relocate - Before the JIT can run a block of code that has been emitted,
246/// it must rewrite the code to contain the actual addresses of any
247/// referenced global symbols.
248void MipsJITInfo::relocate(void *Function, MachineRelocation *MR,
249                           unsigned NumRelocs, unsigned char *GOTBase) {
250  for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
251
252    void *RelocPos = (char*) Function + MR->getMachineCodeOffset();
253    intptr_t ResultPtr = (intptr_t) MR->getResultPointer();
254
255    switch ((Mips::RelocationType) MR->getRelocationType()) {
256    case Mips::reloc_mips_pc16:
257      ResultPtr = (((ResultPtr - (intptr_t) RelocPos) - 4) >> 2) & 0xffff;
258      *((unsigned*) RelocPos) |= (unsigned) ResultPtr;
259      break;
260
261    case Mips::reloc_mips_26:
262      ResultPtr = (ResultPtr & 0x0fffffff) >> 2;
263      *((unsigned*) RelocPos) |= (unsigned) ResultPtr;
264      break;
265
266    case Mips::reloc_mips_hi:
267      ResultPtr = ResultPtr >> 16;
268      if ((((intptr_t) (MR->getResultPointer()) & 0xffff) >> 15) == 1) {
269        ResultPtr += 1;
270      }
271      *((unsigned*) RelocPos) |= (unsigned) ResultPtr;
272      break;
273
274    case Mips::reloc_mips_lo: {
275      // Addend is needed for unaligned load/store instructions, where offset
276      // for the second load/store in the expanded instruction sequence must
277      // be modified by +1 or +3. Otherwise, Addend is 0.
278      int Addend = *((unsigned*) RelocPos) & 0xffff;
279      ResultPtr = (ResultPtr + Addend) & 0xffff;
280      *((unsigned*) RelocPos) &= 0xffff0000;
281      *((unsigned*) RelocPos) |= (unsigned) ResultPtr;
282      break;
283    }
284    }
285  }
286}
287