MipsMCInstLower.cpp revision e035f65b16956cdb7ba29e741b7e3c04a8ce4d24 
1//===-- MipsMCInstLower.cpp - Convert Mips MachineInstr to MCInst ---------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains code to lower Mips MachineInstrs to their corresponding
11// MCInst records.
12//
13//===----------------------------------------------------------------------===//
14
15#include "MipsMCInstLower.h"
16#include "MipsAsmPrinter.h"
17#include "MipsInstrInfo.h"
18#include "MCTargetDesc/MipsBaseInfo.h"
19#include "llvm/CodeGen/MachineFunction.h"
20#include "llvm/CodeGen/MachineInstr.h"
21#include "llvm/CodeGen/MachineOperand.h"
22#include "llvm/MC/MCContext.h"
23#include "llvm/MC/MCExpr.h"
24#include "llvm/MC/MCInst.h"
25#include "llvm/Target/Mangler.h"
26
27using namespace llvm;
28
29MipsMCInstLower::MipsMCInstLower(MipsAsmPrinter &asmprinter)
30  : AsmPrinter(asmprinter) {}
31
32void MipsMCInstLower::Initialize(Mangler *M, MCContext *C) {
33  Mang = M;
34  Ctx = C;
35}
36
37MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
38                                              MachineOperandType MOTy,
39                                              unsigned Offset) const {
40  MCSymbolRefExpr::VariantKind Kind;
41  const MCSymbol *Symbol;
42
43  switch(MO.getTargetFlags()) {
44  default:                   llvm_unreachable("Invalid target flag!");
45  case MipsII::MO_NO_FLAG:   Kind = MCSymbolRefExpr::VK_None; break;
46  case MipsII::MO_GPREL:     Kind = MCSymbolRefExpr::VK_Mips_GPREL; break;
47  case MipsII::MO_GOT_CALL:  Kind = MCSymbolRefExpr::VK_Mips_GOT_CALL; break;
48  case MipsII::MO_GOT16:     Kind = MCSymbolRefExpr::VK_Mips_GOT16; break;
49  case MipsII::MO_GOT:       Kind = MCSymbolRefExpr::VK_Mips_GOT; break;
50  case MipsII::MO_ABS_HI:    Kind = MCSymbolRefExpr::VK_Mips_ABS_HI; break;
51  case MipsII::MO_ABS_LO:    Kind = MCSymbolRefExpr::VK_Mips_ABS_LO; break;
52  case MipsII::MO_TLSGD:     Kind = MCSymbolRefExpr::VK_Mips_TLSGD; break;
53  case MipsII::MO_TLSLDM:    Kind = MCSymbolRefExpr::VK_Mips_TLSLDM; break;
54  case MipsII::MO_DTPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_HI; break;
55  case MipsII::MO_DTPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_LO; break;
56  case MipsII::MO_GOTTPREL:  Kind = MCSymbolRefExpr::VK_Mips_GOTTPREL; break;
57  case MipsII::MO_TPREL_HI:  Kind = MCSymbolRefExpr::VK_Mips_TPREL_HI; break;
58  case MipsII::MO_TPREL_LO:  Kind = MCSymbolRefExpr::VK_Mips_TPREL_LO; break;
59  case MipsII::MO_GPOFF_HI:  Kind = MCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
60  case MipsII::MO_GPOFF_LO:  Kind = MCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
61  case MipsII::MO_GOT_DISP:  Kind = MCSymbolRefExpr::VK_Mips_GOT_DISP; break;
62  case MipsII::MO_GOT_PAGE:  Kind = MCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
63  case MipsII::MO_GOT_OFST:  Kind = MCSymbolRefExpr::VK_Mips_GOT_OFST; break;
64  }
65
66  switch (MOTy) {
67  case MachineOperand::MO_MachineBasicBlock:
68    Symbol = MO.getMBB()->getSymbol();
69    break;
70
71  case MachineOperand::MO_GlobalAddress:
72    Symbol = Mang->getSymbol(MO.getGlobal());
73    Offset += MO.getOffset();
74    break;
75
76  case MachineOperand::MO_BlockAddress:
77    Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
78    Offset += MO.getOffset();
79    break;
80
81  case MachineOperand::MO_ExternalSymbol:
82    Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
83    Offset += MO.getOffset();
84    break;
85
86  case MachineOperand::MO_JumpTableIndex:
87    Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
88    break;
89
90  case MachineOperand::MO_ConstantPoolIndex:
91    Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
92    Offset += MO.getOffset();
93    break;
94
95  default:
96    llvm_unreachable("<unknown operand type>");
97  }
98
99  const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol, Kind, *Ctx);
100
101  if (!Offset)
102    return MCOperand::CreateExpr(MCSym);
103
104  // Assume offset is never negative.
105  assert(Offset > 0);
106
107  const MCConstantExpr *OffsetExpr =  MCConstantExpr::Create(Offset, *Ctx);
108  const MCBinaryExpr *Add = MCBinaryExpr::CreateAdd(MCSym, OffsetExpr, *Ctx);
109  return MCOperand::CreateExpr(Add);
110}
111
112/*
113static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand &Opnd0,
114                         const MCOperand &Opnd1,
115                         const MCOperand &Opnd2 = MCOperand()) {
116  Inst.setOpcode(Opc);
117  Inst.addOperand(Opnd0);
118  Inst.addOperand(Opnd1);
119  if (Opnd2.isValid())
120    Inst.addOperand(Opnd2);
121}
122*/
123
124MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
125                                        unsigned offset) const {
126  MachineOperandType MOTy = MO.getType();
127
128  switch (MOTy) {
129  default: llvm_unreachable("unknown operand type");
130  case MachineOperand::MO_Register:
131    // Ignore all implicit register operands.
132    if (MO.isImplicit()) break;
133    return MCOperand::CreateReg(MO.getReg());
134  case MachineOperand::MO_Immediate:
135    return MCOperand::CreateImm(MO.getImm() + offset);
136  case MachineOperand::MO_MachineBasicBlock:
137  case MachineOperand::MO_GlobalAddress:
138  case MachineOperand::MO_ExternalSymbol:
139  case MachineOperand::MO_JumpTableIndex:
140  case MachineOperand::MO_ConstantPoolIndex:
141  case MachineOperand::MO_BlockAddress:
142    return LowerSymbolOperand(MO, MOTy, offset);
143  case MachineOperand::MO_RegisterMask:
144    break;
145 }
146
147  return MCOperand();
148}
149
150void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
151  OutMI.setOpcode(MI->getOpcode());
152
153  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
154    const MachineOperand &MO = MI->getOperand(i);
155    MCOperand MCOp = LowerOperand(MO);
156
157    if (MCOp.isValid())
158      OutMI.addOperand(MCOp);
159  }
160}
161
162// If the D<shift> instruction has a shift amount that is greater
163// than 31 (checked in calling routine), lower it to a D<shift>32 instruction
164void MipsMCInstLower::LowerLargeShift(const MachineInstr *MI,
165                                      MCInst& Inst,
166                                      int64_t Shift) {
167  // rt
168  Inst.addOperand(LowerOperand(MI->getOperand(0)));
169  // rd
170  Inst.addOperand(LowerOperand(MI->getOperand(1)));
171  // saminus32
172  Inst.addOperand(MCOperand::CreateImm(Shift));
173
174  switch (MI->getOpcode()) {
175  default:
176    // Calling function is not synchronized
177    llvm_unreachable("Unexpected shift instruction");
178    break;
179  case Mips::DSLL:
180    Inst.setOpcode(Mips::DSLL32);
181    break;
182  case Mips::DSRL:
183    Inst.setOpcode(Mips::DSRL32);
184    break;
185  case Mips::DSRA:
186    Inst.setOpcode(Mips::DSRA32);
187    break;
188  }
189}
190