MipsMSAInstrFormats.td revision b14ad465492c472033e9ded65ab40e4a9c2c451a
1//===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10def HasMSA : Predicate<"Subtarget.hasMSA()">, 11 AssemblerPredicate<"FeatureMSA">; 12 13class MSAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> { 14 let Predicates = [HasMSA]; 15 let Inst{31-26} = 0b011110; 16} 17 18class PseudoMSA<dag outs, dag ins, list<dag> pattern, 19 InstrItinClass itin = IIPseudo>: 20 MipsPseudo<outs, ins, pattern, itin> { 21 let Predicates = [HasMSA]; 22} 23 24class MSA_BIT_B_FMT<bits<3> major, bits<6> minor>: MSAInst { 25 bits<5> ws; 26 bits<5> wd; 27 bits<3> m; 28 29 let Inst{25-23} = major; 30 let Inst{22-19} = 0b1110; 31 let Inst{18-16} = m; 32 let Inst{15-11} = ws; 33 let Inst{10-6} = wd; 34 let Inst{5-0} = minor; 35} 36 37class MSA_BIT_H_FMT<bits<3> major, bits<6> minor>: MSAInst { 38 bits<5> ws; 39 bits<5> wd; 40 bits<4> m; 41 42 let Inst{25-23} = major; 43 let Inst{22-20} = 0b110; 44 let Inst{19-16} = m; 45 let Inst{15-11} = ws; 46 let Inst{10-6} = wd; 47 let Inst{5-0} = minor; 48} 49 50class MSA_BIT_W_FMT<bits<3> major, bits<6> minor>: MSAInst { 51 bits<5> ws; 52 bits<5> wd; 53 bits<5> m; 54 55 let Inst{25-23} = major; 56 let Inst{22-21} = 0b10; 57 let Inst{20-16} = m; 58 let Inst{15-11} = ws; 59 let Inst{10-6} = wd; 60 let Inst{5-0} = minor; 61} 62 63class MSA_BIT_D_FMT<bits<3> major, bits<6> minor>: MSAInst { 64 bits<5> ws; 65 bits<5> wd; 66 bits<6> m; 67 68 let Inst{25-23} = major; 69 let Inst{22} = 0b0; 70 let Inst{21-16} = m; 71 let Inst{15-11} = ws; 72 let Inst{10-6} = wd; 73 let Inst{5-0} = minor; 74} 75 76class MSA_2R_FILL_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst { 77 bits<5> rs; 78 bits<5> wd; 79 80 let Inst{25-18} = major; 81 let Inst{17-16} = df; 82 let Inst{15-11} = rs; 83 let Inst{10-6} = wd; 84 let Inst{5-0} = minor; 85} 86 87class MSA_2R_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst { 88 bits<5> ws; 89 bits<5> wd; 90 91 let Inst{25-18} = major; 92 let Inst{17-16} = df; 93 let Inst{15-11} = ws; 94 let Inst{10-6} = wd; 95 let Inst{5-0} = minor; 96} 97 98class MSA_2RF_FMT<bits<9> major, bits<1> df, bits<6> minor>: MSAInst { 99 bits<5> ws; 100 bits<5> wd; 101 102 let Inst{25-17} = major; 103 let Inst{16} = df; 104 let Inst{15-11} = ws; 105 let Inst{10-6} = wd; 106 let Inst{5-0} = minor; 107} 108 109class MSA_3R_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 110 bits<5> wt; 111 bits<5> ws; 112 bits<5> wd; 113 114 let Inst{25-23} = major; 115 let Inst{22-21} = df; 116 let Inst{20-16} = wt; 117 let Inst{15-11} = ws; 118 let Inst{10-6} = wd; 119 let Inst{5-0} = minor; 120} 121 122class MSA_3RF_FMT<bits<4> major, bits<1> df, bits<6> minor>: MSAInst { 123 bits<5> wt; 124 bits<5> ws; 125 bits<5> wd; 126 127 let Inst{25-22} = major; 128 let Inst{21} = df; 129 let Inst{20-16} = wt; 130 let Inst{15-11} = ws; 131 let Inst{10-6} = wd; 132 let Inst{5-0} = minor; 133} 134 135class MSA_3R_INDEX_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 136 bits<5> rt; 137 bits<5> ws; 138 bits<5> wd; 139 140 let Inst{25-23} = major; 141 let Inst{22-21} = df; 142 let Inst{20-16} = rt; 143 let Inst{15-11} = ws; 144 let Inst{10-6} = wd; 145 let Inst{5-0} = minor; 146} 147 148class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst { 149 bits<5> ws; 150 bits<5> wd; 151 152 let Inst{25-16} = major; 153 let Inst{15-11} = ws; 154 let Inst{10-6} = wd; 155 let Inst{5-0} = minor; 156} 157 158class MSA_ELM_CFCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst { 159 bits<5> rd; 160 bits<5> cs; 161 162 let Inst{25-16} = major; 163 let Inst{15-11} = cs; 164 let Inst{10-6} = rd; 165 let Inst{5-0} = minor; 166} 167 168class MSA_ELM_CTCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst { 169 bits<5> rs; 170 bits<5> cd; 171 172 let Inst{25-16} = major; 173 let Inst{15-11} = rs; 174 let Inst{10-6} = cd; 175 let Inst{5-0} = minor; 176} 177 178class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst { 179 bits<4> n; 180 bits<5> ws; 181 bits<5> wd; 182 183 let Inst{25-22} = major; 184 let Inst{21-20} = 0b00; 185 let Inst{19-16} = n{3-0}; 186 let Inst{15-11} = ws; 187 let Inst{10-6} = wd; 188 let Inst{5-0} = minor; 189} 190 191class MSA_ELM_H_FMT<bits<4> major, bits<6> minor>: MSAInst { 192 bits<4> n; 193 bits<5> ws; 194 bits<5> wd; 195 196 let Inst{25-22} = major; 197 let Inst{21-19} = 0b100; 198 let Inst{18-16} = n{2-0}; 199 let Inst{15-11} = ws; 200 let Inst{10-6} = wd; 201 let Inst{5-0} = minor; 202} 203 204class MSA_ELM_W_FMT<bits<4> major, bits<6> minor>: MSAInst { 205 bits<4> n; 206 bits<5> ws; 207 bits<5> wd; 208 209 let Inst{25-22} = major; 210 let Inst{21-18} = 0b1100; 211 let Inst{17-16} = n{1-0}; 212 let Inst{15-11} = ws; 213 let Inst{10-6} = wd; 214 let Inst{5-0} = minor; 215} 216 217class MSA_ELM_D_FMT<bits<4> major, bits<6> minor>: MSAInst { 218 bits<4> n; 219 bits<5> ws; 220 bits<5> wd; 221 222 let Inst{25-22} = major; 223 let Inst{21-17} = 0b11100; 224 let Inst{16} = n{0}; 225 let Inst{15-11} = ws; 226 let Inst{10-6} = wd; 227 let Inst{5-0} = minor; 228} 229 230class MSA_ELM_COPY_B_FMT<bits<4> major, bits<6> minor>: MSAInst { 231 bits<4> n; 232 bits<5> ws; 233 bits<5> rd; 234 235 let Inst{25-22} = major; 236 let Inst{21-20} = 0b00; 237 let Inst{19-16} = n{3-0}; 238 let Inst{15-11} = ws; 239 let Inst{10-6} = rd; 240 let Inst{5-0} = minor; 241} 242 243class MSA_ELM_COPY_H_FMT<bits<4> major, bits<6> minor>: MSAInst { 244 bits<4> n; 245 bits<5> ws; 246 bits<5> rd; 247 248 let Inst{25-22} = major; 249 let Inst{21-19} = 0b100; 250 let Inst{18-16} = n{2-0}; 251 let Inst{15-11} = ws; 252 let Inst{10-6} = rd; 253 let Inst{5-0} = minor; 254} 255 256class MSA_ELM_COPY_W_FMT<bits<4> major, bits<6> minor>: MSAInst { 257 bits<4> n; 258 bits<5> ws; 259 bits<5> rd; 260 261 let Inst{25-22} = major; 262 let Inst{21-18} = 0b1100; 263 let Inst{17-16} = n{1-0}; 264 let Inst{15-11} = ws; 265 let Inst{10-6} = rd; 266 let Inst{5-0} = minor; 267} 268 269class MSA_ELM_INSERT_B_FMT<bits<4> major, bits<6> minor>: MSAInst { 270 bits<6> n; 271 bits<5> rs; 272 bits<5> wd; 273 274 let Inst{25-22} = major; 275 let Inst{21-20} = 0b00; 276 let Inst{19-16} = n{3-0}; 277 let Inst{15-11} = rs; 278 let Inst{10-6} = wd; 279 let Inst{5-0} = minor; 280} 281 282class MSA_ELM_INSERT_H_FMT<bits<4> major, bits<6> minor>: MSAInst { 283 bits<6> n; 284 bits<5> rs; 285 bits<5> wd; 286 287 let Inst{25-22} = major; 288 let Inst{21-19} = 0b100; 289 let Inst{18-16} = n{2-0}; 290 let Inst{15-11} = rs; 291 let Inst{10-6} = wd; 292 let Inst{5-0} = minor; 293} 294 295class MSA_ELM_INSERT_W_FMT<bits<4> major, bits<6> minor>: MSAInst { 296 bits<6> n; 297 bits<5> rs; 298 bits<5> wd; 299 300 let Inst{25-22} = major; 301 let Inst{21-18} = 0b1100; 302 let Inst{17-16} = n{1-0}; 303 let Inst{15-11} = rs; 304 let Inst{10-6} = wd; 305 let Inst{5-0} = minor; 306} 307 308class MSA_I5_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 309 bits<5> imm; 310 bits<5> ws; 311 bits<5> wd; 312 313 let Inst{25-23} = major; 314 let Inst{22-21} = df; 315 let Inst{20-16} = imm; 316 let Inst{15-11} = ws; 317 let Inst{10-6} = wd; 318 let Inst{5-0} = minor; 319} 320 321class MSA_I8_FMT<bits<2> major, bits<6> minor>: MSAInst { 322 bits<8> u8; 323 bits<5> ws; 324 bits<5> wd; 325 326 let Inst{25-24} = major; 327 let Inst{23-16} = u8; 328 let Inst{15-11} = ws; 329 let Inst{10-6} = wd; 330 let Inst{5-0} = minor; 331} 332 333class MSA_I10_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst { 334 bits<10> s10; 335 bits<5> wd; 336 337 let Inst{25-23} = major; 338 let Inst{22-21} = df; 339 let Inst{20-11} = s10; 340 let Inst{10-6} = wd; 341 let Inst{5-0} = minor; 342} 343 344class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst { 345 bits<5> wt; 346 bits<5> ws; 347 bits<5> wd; 348 349 let Inst{25-21} = major; 350 let Inst{20-16} = wt; 351 let Inst{15-11} = ws; 352 let Inst{10-6} = wd; 353 let Inst{5-0} = minor; 354} 355 356class MSA_VECS10_FMT<bits<5> major, bits<6> minor>: MSAInst { 357 let Inst{25-21} = major; 358 let Inst{5-0} = minor; 359} 360 361class SPECIAL_LSA_FMT: MSAInst { 362 let Inst{25-21} = 0b000000; 363 let Inst{10-8} = 0b000; 364 let Inst{5-0} = 0b000101; 365} 366