MipsMSAInstrInfo.td revision 3706eda52c4565016959902a3f5aaf7271516286
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm3 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm"; 82} 83 84def vsplat_uimm4 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm"; 86} 87 88def vsplat_uimm5 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm6 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm8 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_simm5 : Operand<vAny>; 101 102def vsplat_simm10 : Operand<vAny>; 103 104// Pattern fragments 105def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 106 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 107def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 108 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 109def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 110 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 111 112def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 113 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 114def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 115 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 116def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 117 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 118 119def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 120 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 121def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 122 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 123def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 124 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 125 126class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 127 PatFrag<(ops node:$lhs, node:$rhs), 128 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 129 130// ISD::SETFALSE cannot occur 131def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 132def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 133def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 134def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 135def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 136def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 137def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 138def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 139def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 140def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 141def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 142def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 143def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 144def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 145def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 146def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 147def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 148def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 149def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 150def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 151def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 152def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 153def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 154def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 155def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 156def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 157def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 158def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 159// ISD::SETTRUE cannot occur 160// ISD::SETFALSE2 cannot occur 161// ISD::SETTRUE2 cannot occur 162 163class vsetcc_type<ValueType ResTy, CondCode CC> : 164 PatFrag<(ops node:$lhs, node:$rhs), 165 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 166 167def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 168def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 169def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 170def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 171def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 172def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 173def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 174def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 175def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 176def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 177def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 178def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 179def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 180def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 181def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 182def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 183def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 184def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 185def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 186def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 187 188def vsplati8 : PatFrag<(ops node:$e0), 189 (v16i8 (build_vector node:$e0, node:$e0, 190 node:$e0, node:$e0, 191 node:$e0, node:$e0, 192 node:$e0, node:$e0, 193 node:$e0, node:$e0, 194 node:$e0, node:$e0, 195 node:$e0, node:$e0, 196 node:$e0, node:$e0))>; 197def vsplati16 : PatFrag<(ops node:$e0), 198 (v8i16 (build_vector node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0))>; 202def vsplati32 : PatFrag<(ops node:$e0), 203 (v4i32 (build_vector node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati64 : PatFrag<(ops node:$e0), 206 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 207 208class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 209 SDNodeXForm xform = NOOP_SDNodeXForm> 210 : PatLeaf<frag, pred, xform> { 211 Operand OpClass = opclass; 212} 213 214class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 215 list<SDNode> roots = [], 216 list<SDNodeProperty> props = []> : 217 ComplexPattern<ty, numops, fn, roots, props> { 218 Operand OpClass = opclass; 219} 220 221def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 222 "selectVSplatUimm3", 223 [build_vector, bitconvert]>; 224 225def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 226 "selectVSplatUimm5", 227 [build_vector, bitconvert]>; 228 229def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 230 "selectVSplatUimm8", 231 [build_vector, bitconvert]>; 232 233def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 234 "selectVSplatSimm5", 235 [build_vector, bitconvert]>; 236 237def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 238 "selectVSplatUimm4", 239 [build_vector, bitconvert]>; 240 241def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 242 "selectVSplatUimm5", 243 [build_vector, bitconvert]>; 244 245def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 246 "selectVSplatSimm5", 247 [build_vector, bitconvert]>; 248 249def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 250 "selectVSplatUimm5", 251 [build_vector, bitconvert]>; 252 253def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 254 "selectVSplatSimm5", 255 [build_vector, bitconvert]>; 256 257def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 262 "selectVSplatUimm6", 263 [build_vector, bitconvert]>; 264 265def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 266 "selectVSplatSimm5", 267 [build_vector, bitconvert]>; 268 269// Any build_vector that is a constant splat with a value that is an exact 270// power of 2 271def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 272 [build_vector, bitconvert]>; 273 274// Immediates 275def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 276def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 277 278// Instruction encoding. 279class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 280class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 281class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 282class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 283 284class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 285class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 286class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 287class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 288 289class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 290class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 291class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 292class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 293 294class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 295class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 296class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 297class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 298 299class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 300class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 301class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 302class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 303 304class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 305class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 306class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 307class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 308 309class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 310 311class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 312 313class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 314class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 315class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 316class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 317 318class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 319class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 320class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 321class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 322 323class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 324class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 325class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 326class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 327 328class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 329class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 330class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 331class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 332 333class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 334class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 335class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 336class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 337 338class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 339class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 340class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 341class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 342 343class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 344class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 345class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 346class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 347 348class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 349class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 350class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 351class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 352 353class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 354class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 355class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 356class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 357 358class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 359class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 360class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 361class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 362 363class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 364class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 365class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 366class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 367 368class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 369class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 370class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 371class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 372 373class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 374 375class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 376 377class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 378 379class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 380 381class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 382class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 383class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 384class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 385 386class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 387class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 388class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 389class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 390 391class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 392class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 393class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 394class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 395 396class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 397 398class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 399 400class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 401 402class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 403class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 404class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 405class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 406 407class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 408class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 409class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 410class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 411 412class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 413class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 414class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 415class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 416 417class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 418 419class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 420class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 421class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 422class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 423 424class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 425class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 426class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 427class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 428 429class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 430 431class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 432class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 433class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 434class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 435 436class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 437class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 438class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 439class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 440 441class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 442class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 443class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 444class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 445 446class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 447class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 448class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 449class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 450 451class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 452class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 453class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 454class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 455 456class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 457class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 458class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 459class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 460 461class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 462class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 463class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 464class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 465 466class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 467class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 468class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 469class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 470 471class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 472class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 473class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 474 475class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 476class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 477class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 478 479class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 480 481class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 482class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 483class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 484class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 485 486class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 487class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 488class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 489class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 490 491class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 492class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 493class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 494 495class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 496class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 497class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 498 499class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 500class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 501class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 502 503class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 504class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 505class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 506 507class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 508class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 509class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 510 511class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 512class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 513class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 514 515class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 516class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 517 518class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 519class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 520 521class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 522class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 523 524class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 525class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 526 527class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 528class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 529 530class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 531class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 532 533class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 534class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 535 536class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 537class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 538 539class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 540class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 541 542class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 543class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 544 545class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 546class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 547 548class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 549class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 550 551class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 552class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 553 554class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 555class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 556 557class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 558class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 559 560class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 561class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 562 563class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 564class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 565 566class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 567class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 568 569class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 570class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 571 572class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 573class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 574 575class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 576class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 577 578class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 579class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 580 581class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 582class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 583class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 584 585class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 586class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 587 588class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 589class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 590 591class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 592class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 593 594class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 595class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 596 597class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 598class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 599 600class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 601class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 602 603class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 604class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 605 606class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 607class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 608 609class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 610class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 611 612class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 613class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 614 615class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 616class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 617 618class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 619class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 620 621class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 622class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 623 624class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 625class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 626 627class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 628class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 629 630class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 631class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 632 633class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 634class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 635 636class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 637class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 638 639class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 640class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 641 642class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 643class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 644 645class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 646class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 647 648class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 649class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 650 651class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 652class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 653 654class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 655class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 656 657class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 658class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 659 660class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 661class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 662 663class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 664class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 665 666class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 667class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 668 669class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 670class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 671 672class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 673class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 674class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 675 676class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 677class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 678class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 679 680class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 681class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 682class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 683 684class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 685class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 686class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 687 688class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 689class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 690class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 691class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 692 693class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 694class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 695class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 696class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 697 698class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 699class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 700class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 701class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 702 703class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 704class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 705class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 706class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 707 708class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 709class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 710class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 711 712class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 713class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 714class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 715class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 716 717class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 718class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 719class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 720class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 721 722class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 723class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 724class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 725class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 726 727class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 728class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 729class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 730class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 731 732class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 733class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 734 735class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 736class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 737 738class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 739class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 740class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 741class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 742 743class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 744class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 745class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 746class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 747 748class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 749class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 750class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 751class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 752 753class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 754class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 755class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 756class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 757 758class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 759class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 760class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 761class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 762 763class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 764class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 765class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 766class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 767 768class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 769class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 770class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 771class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 772 773class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 774class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 775class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 776class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 777 778class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 779class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 780class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 781class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 782 783class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 784class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 785class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 786class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 787 788class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 789class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 790class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 791class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 792 793class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 794class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 795class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 796class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 797 798class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 799class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 800class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 801class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 802 803class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 804 805class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 806class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 807 808class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 809class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 810 811class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 812class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 813class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 814class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 815 816class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 817class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 818 819class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 820class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 821 822class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 823class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 824class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 825class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 826 827class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 828class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 829class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 830class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 831 832class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 833class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 834class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 835class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 836 837class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 838 839class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 840 841class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 842 843class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 844 845class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 846class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 847class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 848class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 849 850class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 851class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 852class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 853class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 854 855class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 856class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 857class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 858class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 859 860class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 861class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 862class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 863class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 864 865class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 866class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 867class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 868class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 869 870class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 871class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 872class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 873 874class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 875class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 876class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 877class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 878 879class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 880class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 881class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 882class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 883 884class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 885class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 886class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 887class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 888 889class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 890class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 891class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 892class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 893 894class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 895class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 896class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 897class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 898 899class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 900class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 901class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 902class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 903 904class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 905class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 906class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 907class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 908 909class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 910class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 911class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 912class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 913 914class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 915class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 916class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 917class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 918 919class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 920class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 921class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 922class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 923 924class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 925class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 926class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 927class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 928 929class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 930class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 931class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 932class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 933 934class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 935class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 936class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 937class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 938 939class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 940class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 941class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 942class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 943 944class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 945class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 946class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 947class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 948 949class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 950class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 951class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 952class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 953 954class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 955class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 956class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 957class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 958 959class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 960class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 961class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 962class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 963 964class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 965class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 966class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 967class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 968 969class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 970class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 971class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 972class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 973 974class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 975class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 976class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 977class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 978 979class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 980class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 981class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 982class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 983 984class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 985class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 986class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 987class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 988 989class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 990 991class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 992 993// Instruction desc. 994class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 995 RegisterClass RCWD, RegisterClass RCWS = RCWD, 996 InstrItinClass itin = NoItinerary> { 997 dag OutOperandList = (outs RCWD:$wd); 998 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 999 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 1000 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 1001 InstrItinClass Itinerary = itin; 1002} 1003 1004class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1005 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1006 InstrItinClass itin = NoItinerary> { 1007 dag OutOperandList = (outs RCWD:$wd); 1008 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 1009 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 1010 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 1011 InstrItinClass Itinerary = itin; 1012} 1013 1014class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1015 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1016 InstrItinClass itin = NoItinerary> { 1017 dag OutOperandList = (outs RCWD:$wd); 1018 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 1019 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 1020 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 1021 InstrItinClass Itinerary = itin; 1022} 1023 1024class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1025 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1026 InstrItinClass itin = NoItinerary> { 1027 dag OutOperandList = (outs RCWD:$wd); 1028 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 1029 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 1030 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 1031 InstrItinClass Itinerary = itin; 1032} 1033 1034class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1035 SplatComplexPattern SplatImm, RegisterClass RCWD, 1036 RegisterClass RCWS = RCWD, 1037 InstrItinClass itin = NoItinerary> { 1038 dag OutOperandList = (outs RCWD:$wd); 1039 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u); 1040 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u"); 1041 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))]; 1042 InstrItinClass Itinerary = itin; 1043} 1044 1045class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1046 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 1047 InstrItinClass itin = NoItinerary> { 1048 dag OutOperandList = (outs RCD:$rd); 1049 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 1050 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1051 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 1052 InstrItinClass Itinerary = itin; 1053} 1054 1055class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1056 SplatComplexPattern SplatImm, RegisterClass RCWD, 1057 RegisterClass RCWS = RCWD, 1058 InstrItinClass itin = NoItinerary> { 1059 dag OutOperandList = (outs RCWD:$wd); 1060 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm); 1061 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1062 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))]; 1063 InstrItinClass Itinerary = itin; 1064} 1065 1066class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1067 SplatComplexPattern SplatImm, RegisterClass RCWD, 1068 RegisterClass RCWS = RCWD, 1069 InstrItinClass itin = NoItinerary> { 1070 dag OutOperandList = (outs RCWD:$wd); 1071 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8); 1072 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1073 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))]; 1074 InstrItinClass Itinerary = itin; 1075} 1076 1077// This class is deprecated and will be removed in the next few patches 1078class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1079 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1080 InstrItinClass itin = NoItinerary> { 1081 dag OutOperandList = (outs RCWD:$wd); 1082 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1083 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1084 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1085 InstrItinClass Itinerary = itin; 1086} 1087 1088class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterClass RCWD, 1089 RegisterClass RCWS = RCWD, 1090 InstrItinClass itin = NoItinerary> { 1091 dag OutOperandList = (outs RCWD:$wd); 1092 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1093 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1094 list<dag> Pattern = [(set RCWD:$wd, (MipsSHF immZExt8:$u8, RCWS:$ws))]; 1095 InstrItinClass Itinerary = itin; 1096} 1097 1098class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1099 InstrItinClass itin = NoItinerary> { 1100 dag OutOperandList = (outs RCWD:$wd); 1101 dag InOperandList = (ins vsplat_simm10:$i10); 1102 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1103 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1104 list<dag> Pattern = []; 1105 bit hasSideEffects = 0; 1106 InstrItinClass Itinerary = itin; 1107} 1108 1109class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1110 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1111 InstrItinClass itin = NoItinerary> { 1112 dag OutOperandList = (outs RCWD:$wd); 1113 dag InOperandList = (ins RCWS:$ws); 1114 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1115 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1116 InstrItinClass Itinerary = itin; 1117} 1118 1119class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1120 SDPatternOperator OpNode, RegisterClass RCWD, 1121 RegisterClass RCWS = RCWD, 1122 InstrItinClass itin = NoItinerary> { 1123 dag OutOperandList = (outs RCWD:$wd); 1124 dag InOperandList = (ins RCWS:$ws); 1125 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1126 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))]; 1127 InstrItinClass Itinerary = itin; 1128} 1129 1130class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1131 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1132 InstrItinClass itin = NoItinerary> : 1133 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 1134 1135 1136class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1137 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1138 RegisterClass RCWT = RCWD, 1139 InstrItinClass itin = NoItinerary> { 1140 dag OutOperandList = (outs RCWD:$wd); 1141 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1142 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1143 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1144 InstrItinClass Itinerary = itin; 1145} 1146 1147class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterClass RCWD, 1148 RegisterClass RCWS = RCWD, 1149 RegisterClass RCWT = RCWD, 1150 InstrItinClass itin = NoItinerary> { 1151 dag OutOperandList = (outs RCWD:$wd); 1152 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1153 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1154 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF RCWD:$wd_in, RCWS:$ws, 1155 RCWT:$wt))]; 1156 string Constraints = "$wd = $wd_in"; 1157 InstrItinClass Itinerary = itin; 1158} 1159 1160class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1161 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1162 RegisterClass RCWT = RCWD, 1163 InstrItinClass itin = NoItinerary> { 1164 dag OutOperandList = (outs RCWD:$wd); 1165 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1166 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1167 list<dag> Pattern = [(set RCWD:$wd, 1168 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 1169 InstrItinClass Itinerary = itin; 1170 string Constraints = "$wd = $wd_in"; 1171} 1172 1173class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1174 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1175 RegisterClass RCWT = RCWD, 1176 InstrItinClass itin = NoItinerary> : 1177 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1178 1179class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1180 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1181 RegisterClass RCWT = RCWD, 1182 InstrItinClass itin = NoItinerary> : 1183 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1184 1185class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1186 dag OutOperandList = (outs); 1187 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1188 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1189 list<dag> Pattern = []; 1190 InstrItinClass Itinerary = IIBranch; 1191 bit isBranch = 1; 1192 bit isTerminator = 1; 1193 bit hasDelaySlot = 1; 1194 list<Register> Defs = [AT]; 1195} 1196 1197class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1198 RegisterClass RCD, RegisterClass RCWS, 1199 InstrItinClass itin = NoItinerary> { 1200 dag OutOperandList = (outs RCD:$wd); 1201 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1202 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1203 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1204 RCWS:$rs, 1205 immZExt6:$n))]; 1206 InstrItinClass Itinerary = itin; 1207 string Constraints = "$wd = $wd_in"; 1208} 1209 1210class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1211 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1212 InstrItinClass itin = NoItinerary> { 1213 dag OutOperandList = (outs RCWD:$wd); 1214 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1215 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1216 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1217 immZExt6:$n, 1218 RCWS:$ws))]; 1219 InstrItinClass Itinerary = itin; 1220 string Constraints = "$wd = $wd_in"; 1221} 1222 1223class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1224 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1225 RegisterClass RCWT = RCWD, 1226 InstrItinClass itin = NoItinerary> { 1227 dag OutOperandList = (outs RCWD:$wd); 1228 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1229 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1230 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1231 InstrItinClass Itinerary = itin; 1232} 1233 1234class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1235 RegisterClass RCWS = RCWD, 1236 RegisterClass RCWT = RCWD> : 1237 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1238 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1239 1240class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 1241 IsCommutable; 1242class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 1243 IsCommutable; 1244class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 1245 IsCommutable; 1246class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 1247 IsCommutable; 1248 1249class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 1250 IsCommutable; 1251class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 1252 IsCommutable; 1253class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 1254 IsCommutable; 1255class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 1256 IsCommutable; 1257 1258class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 1259 IsCommutable; 1260class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 1261 IsCommutable; 1262class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 1263 IsCommutable; 1264class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 1265 IsCommutable; 1266 1267class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 1268 IsCommutable; 1269class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 1270 IsCommutable; 1271class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 1272 IsCommutable; 1273class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 1274 IsCommutable; 1275 1276class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 1277class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1278class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1279class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1280 1281class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>; 1282class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>; 1283class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>; 1284class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>; 1285 1286class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1287class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1288class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1289class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1290 1291class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>; 1292 1293class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1294class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1295class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1296class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1297 1298class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1299class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1300class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1301class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1302 1303class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1304 IsCommutable; 1305class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1306 IsCommutable; 1307class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1308 IsCommutable; 1309class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1310 IsCommutable; 1311 1312class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1313 IsCommutable; 1314class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1315 IsCommutable; 1316class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1317 IsCommutable; 1318class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1319 IsCommutable; 1320 1321class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1322 IsCommutable; 1323class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1324 IsCommutable; 1325class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1326 IsCommutable; 1327class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1328 IsCommutable; 1329 1330class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1331 IsCommutable; 1332class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1333 IsCommutable; 1334class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1335 IsCommutable; 1336class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1337 IsCommutable; 1338 1339class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1340class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1341class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1342class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1343 1344class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1345class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1346class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1347class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1348 1349class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1350class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1351class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1352class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1353 1354class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1355 MSA128B>; 1356class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1357 MSA128H>; 1358class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1359 MSA128W>; 1360class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1361 MSA128D>; 1362 1363class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1364class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1365class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1366class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1367 1368class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1369 MSA128B>; 1370class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1371 MSA128H>; 1372class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1373 MSA128W>; 1374class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1375 MSA128D>; 1376 1377class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1378 1379class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1380 1381class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1382 1383class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1384 1385class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1386class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1387class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1388class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1389 1390class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1391class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1392class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1393class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1394 1395class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1396class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1397class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1398class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1399 1400class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1401 1402class BSEL_V_DESC { 1403 dag OutOperandList = (outs MSA128B:$wd); 1404 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1405 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1406 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1407 MSA128B:$wt))]; 1408 InstrItinClass Itinerary = NoItinerary; 1409 string Constraints = "$wd = $wd_in"; 1410} 1411 1412class BSELI_B_DESC { 1413 dag OutOperandList = (outs MSA128B:$wd); 1414 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8); 1415 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1416 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, 1417 MSA128B:$ws, 1418 vsplati8_uimm8:$u8))]; 1419 InstrItinClass Itinerary = NoItinerary; 1420 string Constraints = "$wd = $wd_in"; 1421} 1422 1423class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1424class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1425class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1426class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1427 1428class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1429class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1430class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1431class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1432 1433class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1434class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1435class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1436class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1437 1438class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1439 1440class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>, 1441 IsCommutable; 1442class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>, 1443 IsCommutable; 1444class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>, 1445 IsCommutable; 1446class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>, 1447 IsCommutable; 1448 1449class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1450 MSA128B>; 1451class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1452 MSA128H>; 1453class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1454 MSA128W>; 1455class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1456 MSA128D>; 1457 1458class CFCMSA_DESC { 1459 dag OutOperandList = (outs GPR32:$rd); 1460 dag InOperandList = (ins MSACtrl:$cs); 1461 string AsmString = "cfcmsa\t$rd, $cs"; 1462 InstrItinClass Itinerary = NoItinerary; 1463 bit hasSideEffects = 1; 1464} 1465 1466class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>; 1467class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>; 1468class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>; 1469class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>; 1470 1471class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>; 1472class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>; 1473class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>; 1474class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>; 1475 1476class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1477 vsplati8_simm5, MSA128B>; 1478class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1479 vsplati16_simm5, MSA128H>; 1480class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1481 vsplati32_simm5, MSA128W>; 1482class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1483 vsplati64_simm5, MSA128D>; 1484 1485class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1486 vsplati8_uimm5, MSA128B>; 1487class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1488 vsplati16_uimm5, MSA128H>; 1489class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1490 vsplati32_uimm5, MSA128W>; 1491class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1492 vsplati64_uimm5, MSA128D>; 1493 1494class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>; 1495class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>; 1496class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>; 1497class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>; 1498 1499class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>; 1500class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>; 1501class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>; 1502class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>; 1503 1504class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1505 vsplati8_simm5, MSA128B>; 1506class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1507 vsplati16_simm5, MSA128H>; 1508class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1509 vsplati32_simm5, MSA128W>; 1510class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1511 vsplati64_simm5, MSA128D>; 1512 1513class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1514 vsplati8_uimm5, MSA128B>; 1515class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1516 vsplati16_uimm5, MSA128H>; 1517class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1518 vsplati32_uimm5, MSA128W>; 1519class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1520 vsplati64_uimm5, MSA128D>; 1521 1522class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1523 GPR32, MSA128B>; 1524class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1525 GPR32, MSA128H>; 1526class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1527 GPR32, MSA128W>; 1528 1529class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1530 GPR32, MSA128B>; 1531class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1532 GPR32, MSA128H>; 1533class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1534 GPR32, MSA128W>; 1535 1536class CTCMSA_DESC { 1537 dag OutOperandList = (outs); 1538 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1539 string AsmString = "ctcmsa\t$cd, $rs"; 1540 InstrItinClass Itinerary = NoItinerary; 1541 bit hasSideEffects = 1; 1542} 1543 1544class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1545class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1546class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1547class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1548 1549class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1550class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1551class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1552class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1553 1554class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1555 MSA128B, MSA128B>, IsCommutable; 1556class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1557 MSA128H, MSA128H>, IsCommutable; 1558class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1559 MSA128W, MSA128W>, IsCommutable; 1560 1561class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1562 MSA128B, MSA128B>, IsCommutable; 1563class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1564 MSA128H, MSA128H>, IsCommutable; 1565class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1566 MSA128W, MSA128W>, IsCommutable; 1567 1568class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1569 MSA128H, MSA128B, MSA128B>, 1570 IsCommutable; 1571class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1572 MSA128W, MSA128H, MSA128H>, 1573 IsCommutable; 1574class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1575 MSA128D, MSA128W, MSA128W>, 1576 IsCommutable; 1577 1578class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1579 MSA128H, MSA128B, MSA128B>, 1580 IsCommutable; 1581class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1582 MSA128W, MSA128H, MSA128H>, 1583 IsCommutable; 1584class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1585 MSA128D, MSA128W, MSA128W>, 1586 IsCommutable; 1587 1588class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1589 MSA128H, MSA128B, MSA128B>; 1590class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1591 MSA128W, MSA128H, MSA128H>; 1592class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1593 MSA128D, MSA128W, MSA128W>; 1594 1595class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1596 MSA128H, MSA128B, MSA128B>; 1597class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1598 MSA128W, MSA128H, MSA128H>; 1599class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1600 MSA128D, MSA128W, MSA128W>; 1601 1602class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1603class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1604 1605class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1606 IsCommutable; 1607class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1608 IsCommutable; 1609 1610class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>, 1611 IsCommutable; 1612class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>, 1613 IsCommutable; 1614 1615class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1616 MSA128W>; 1617class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1618 MSA128D>; 1619 1620class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>; 1621class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>; 1622 1623class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>; 1624class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>; 1625 1626class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>, 1627 IsCommutable; 1628class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>, 1629 IsCommutable; 1630 1631class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>, 1632 IsCommutable; 1633class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>, 1634 IsCommutable; 1635 1636class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>, 1637 IsCommutable; 1638class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>, 1639 IsCommutable; 1640 1641class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>, 1642 IsCommutable; 1643class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>, 1644 IsCommutable; 1645 1646class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>, 1647 IsCommutable; 1648class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>, 1649 IsCommutable; 1650 1651class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>, 1652 IsCommutable; 1653class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>, 1654 IsCommutable; 1655 1656class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>, 1657 IsCommutable; 1658class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>, 1659 IsCommutable; 1660 1661class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1662class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1663 1664class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1665 MSA128H, MSA128W, MSA128W>; 1666class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1667 MSA128W, MSA128D, MSA128D>; 1668 1669class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1670class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1671 1672class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1673 MSA128W, MSA128H>; 1674class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1675 MSA128D, MSA128W>; 1676 1677class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1678 MSA128W, MSA128H>; 1679class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1680 MSA128D, MSA128W>; 1681 1682class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1683 MSA128W>; 1684class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1685 MSA128D>; 1686 1687class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1688 MSA128W>; 1689class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1690 MSA128D>; 1691 1692class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1693 MSA128W, MSA128H>; 1694class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1695 MSA128D, MSA128W>; 1696 1697class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1698 MSA128W, MSA128H>; 1699class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1700 MSA128D, MSA128W>; 1701 1702class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B, 1703 GPR32>; 1704class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H, 1705 GPR32>; 1706class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W, 1707 GPR32>; 1708 1709class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1710class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1711 1712class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1713 MSA128W>; 1714class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1715 MSA128D>; 1716 1717class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1718class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1719 1720class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1721 MSA128W>; 1722class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1723 MSA128D>; 1724 1725class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1726class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1727 1728class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1729 MSA128W>; 1730class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1731 MSA128D>; 1732 1733class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1734 MSA128W>; 1735class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1736 MSA128D>; 1737 1738class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1739class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1740 1741class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1742class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1743 1744class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1745class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1746 1747class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1748 MSA128W>; 1749class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1750 MSA128D>; 1751 1752class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1753class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1754 1755class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1756class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1757 1758class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1759class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1760 1761class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1762class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1763 1764class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1765class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1766 1767class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1768class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1769 1770class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1771class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1772 1773class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1774class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1775 1776class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1777class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1778 1779class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1780class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1781 1782class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1783class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1784 1785class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1786class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1787 1788class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1789class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1790 1791class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1792 MSA128W>; 1793class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1794 MSA128D>; 1795 1796class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1797 MSA128W>; 1798class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1799 MSA128D>; 1800 1801class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1802 MSA128W>; 1803class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1804 MSA128D>; 1805 1806class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1807 MSA128W>; 1808class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1809 MSA128D>; 1810 1811class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1812 MSA128H, MSA128W, MSA128W>; 1813class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1814 MSA128W, MSA128D, MSA128D>; 1815 1816class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1817 MSA128B, MSA128B>; 1818class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1819 MSA128H, MSA128H>; 1820class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1821 MSA128W, MSA128W>; 1822 1823class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1824 MSA128B, MSA128B>; 1825class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1826 MSA128H, MSA128H>; 1827class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1828 MSA128W, MSA128W>; 1829 1830class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1831 MSA128B, MSA128B>; 1832class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1833 MSA128H, MSA128H>; 1834class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1835 MSA128W, MSA128W>; 1836 1837class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1838 MSA128B, MSA128B>; 1839class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1840 MSA128H, MSA128H>; 1841class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1842 MSA128W, MSA128W>; 1843 1844class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128B>; 1845class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128H>; 1846class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128W>; 1847class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128D>; 1848 1849class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128B>; 1850class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128H>; 1851class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128W>; 1852class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128D>; 1853 1854class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128B>; 1855class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128H>; 1856class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128W>; 1857class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128D>; 1858 1859class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128B>; 1860class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128H>; 1861class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128W>; 1862class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128D>; 1863 1864class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1865 GPR32>; 1866class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1867 GPR32>; 1868class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1869 GPR32>; 1870 1871class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1872class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1873class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1874class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1875 1876class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1877 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1878 ComplexPattern Addr = addrRegImm, 1879 InstrItinClass itin = NoItinerary> { 1880 dag OutOperandList = (outs RCWD:$wd); 1881 dag InOperandList = (ins MemOpnd:$addr); 1882 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1883 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1884 InstrItinClass Itinerary = itin; 1885} 1886 1887class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1888class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1889class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1890class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1891 1892class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 1893class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 1894class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 1895class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 1896 1897class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1898 ValueType TyNode, RegisterClass RCWD, 1899 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1900 InstrItinClass itin = NoItinerary> { 1901 dag OutOperandList = (outs RCWD:$wd); 1902 dag InOperandList = (ins MemOpnd:$addr); 1903 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1904 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1905 InstrItinClass Itinerary = itin; 1906} 1907 1908class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1909class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1910class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1911class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1912 1913class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1914 MSA128H>; 1915class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1916 MSA128W>; 1917 1918class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1919 MSA128H>; 1920class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1921 MSA128W>; 1922 1923class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1924class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1925class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1926class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1927 1928class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1929class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1930class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1931class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1932 1933class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>; 1934class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>; 1935class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>; 1936class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>; 1937 1938class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>; 1939class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>; 1940class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>; 1941class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>; 1942 1943class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 1944 MSA128B>; 1945class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 1946 MSA128H>; 1947class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 1948 MSA128W>; 1949class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 1950 MSA128D>; 1951 1952class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 1953 MSA128B>; 1954class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 1955 MSA128H>; 1956class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 1957 MSA128W>; 1958class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 1959 MSA128D>; 1960 1961class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1962class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1963class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1964class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1965 1966class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>; 1967class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>; 1968class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>; 1969class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>; 1970 1971class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>; 1972class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>; 1973class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>; 1974class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>; 1975 1976class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 1977 MSA128B>; 1978class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 1979 MSA128H>; 1980class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 1981 MSA128W>; 1982class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 1983 MSA128D>; 1984 1985class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 1986 MSA128B>; 1987class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 1988 MSA128H>; 1989class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 1990 MSA128W>; 1991class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 1992 MSA128D>; 1993 1994class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1995class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1996class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1997class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1998 1999class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 2000class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 2001class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 2002class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 2003 2004class MOVE_V_DESC { 2005 dag OutOperandList = (outs MSA128B:$wd); 2006 dag InOperandList = (ins MSA128B:$ws); 2007 string AsmString = "move.v\t$wd, $ws"; 2008 list<dag> Pattern = []; 2009 InstrItinClass Itinerary = NoItinerary; 2010} 2011 2012class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2013 MSA128H>; 2014class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2015 MSA128W>; 2016 2017class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2018 MSA128H>; 2019class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2020 MSA128W>; 2021 2022class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 2023class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 2024class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 2025class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 2026 2027class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 2028class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 2029 2030class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2031 MSA128H>; 2032class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2033 MSA128W>; 2034 2035class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 2036class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 2037class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 2038class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 2039 2040class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 2041class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 2042class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 2043class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 2044 2045class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 2046class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 2047class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 2048class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 2049 2050class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 2051class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 2052class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 2053class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 2054 2055class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2056 MSA128B>; 2057 2058class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 2059class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 2060class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 2061class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 2062 2063class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>; 2064 2065class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128B>; 2066class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128H>; 2067class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128W>; 2068class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128D>; 2069 2070class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128B>; 2071class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128H>; 2072class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128W>; 2073class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128D>; 2074 2075class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 2076class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 2077class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 2078class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 2079 2080class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 2081class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 2082class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 2083class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 2084 2085class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 2086class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 2087class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 2088class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 2089 2090class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128B>; 2091class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128H>; 2092class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128W>; 2093 2094class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 2095class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 2096class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 2097class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 2098 2099class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 2100class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 2101class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 2102class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 2103 2104class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 2105class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 2106class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 2107class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 2108 2109class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2110 MSA128B>; 2111class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2112 MSA128H>; 2113class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2114 MSA128W>; 2115class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2116 MSA128D>; 2117 2118class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 2119 MSA128B, GPR32>; 2120class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 2121 MSA128H, GPR32>; 2122class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 2123 MSA128W, GPR32>; 2124class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 2125 MSA128D, GPR32>; 2126 2127class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 2128 MSA128B>; 2129class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 2130 MSA128H>; 2131class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 2132 MSA128W>; 2133class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 2134 MSA128D>; 2135 2136class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 2137class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 2138class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 2139class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 2140 2141class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2142 MSA128B>; 2143class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2144 MSA128H>; 2145class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2146 MSA128W>; 2147class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2148 MSA128D>; 2149 2150class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 2151class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 2152class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 2153class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 2154 2155class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2156class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2157class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2158class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2159 2160class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 2161class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 2162class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 2163class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 2164 2165class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2166 MSA128B>; 2167class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2168 MSA128H>; 2169class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2170 MSA128W>; 2171class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2172 MSA128D>; 2173 2174class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 2175class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 2176class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 2177class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 2178 2179class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2180class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2181class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2182class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2183 2184class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2185 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2186 ComplexPattern Addr = addrRegImm, 2187 InstrItinClass itin = NoItinerary> { 2188 dag OutOperandList = (outs); 2189 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2190 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2191 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2192 InstrItinClass Itinerary = itin; 2193} 2194 2195class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2196class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2197class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2198class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2199 2200class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2201 ValueType TyNode, RegisterClass RCWD, 2202 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2203 InstrItinClass itin = NoItinerary> { 2204 dag OutOperandList = (outs); 2205 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2206 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2207 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2208 InstrItinClass Itinerary = itin; 2209} 2210 2211class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2212class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2213class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2214class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2215 2216class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 2217class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 2218class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 2219class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 2220 2221class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 2222class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 2223class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 2224class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 2225 2226class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2227 MSA128B>; 2228class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2229 MSA128H>; 2230class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2231 MSA128W>; 2232class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2233 MSA128D>; 2234 2235class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2236 MSA128B>; 2237class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2238 MSA128H>; 2239class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2240 MSA128W>; 2241class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2242 MSA128D>; 2243 2244class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 2245class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 2246class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 2247class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 2248 2249class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>; 2250class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>; 2251class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>; 2252class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>; 2253 2254class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128B>; 2255class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128H>; 2256class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128W>; 2257class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128D>; 2258 2259class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2260class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2261class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2262class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2263 2264class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>; 2265 2266// Instruction defs. 2267def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2268def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2269def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2270def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2271 2272def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2273def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2274def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2275def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2276 2277def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2278def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2279def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2280def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2281 2282def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2283def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2284def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2285def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2286 2287def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2288def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2289def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2290def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2291 2292def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2293def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2294def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2295def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2296 2297def AND_V : AND_V_ENC, AND_V_DESC; 2298def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2299 PseudoInstExpansion<(AND_V MSA128B:$wd, 2300 MSA128B:$ws, MSA128B:$wt)>; 2301def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2302 PseudoInstExpansion<(AND_V MSA128B:$wd, 2303 MSA128B:$ws, MSA128B:$wt)>; 2304def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2305 PseudoInstExpansion<(AND_V MSA128B:$wd, 2306 MSA128B:$ws, MSA128B:$wt)>; 2307 2308def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2309 2310def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2311def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2312def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2313def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2314 2315def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2316def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2317def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2318def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2319 2320def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2321def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2322def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2323def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2324 2325def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2326def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2327def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2328def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2329 2330def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2331def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2332def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2333def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2334 2335def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2336def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2337def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2338def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2339 2340def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2341def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2342def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2343def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2344 2345def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2346def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2347def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2348def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2349 2350def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2351def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2352def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2353def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2354 2355def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2356def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2357def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2358def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2359 2360def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2361def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2362def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2363def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2364 2365def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2366def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2367def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2368def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2369 2370def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2371 2372def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2373 2374def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2375 2376def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2377 2378def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2379def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2380def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2381def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2382 2383def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2384def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2385def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2386def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2387 2388def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2389def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2390def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2391def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2392 2393def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2394 2395def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2396 2397class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2398 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2399 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2400 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2401 MSA128B:$wt)> { 2402 let Constraints = "$wd_in = $wd"; 2403} 2404 2405def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2406def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2407def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2408def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2409def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2410 2411def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2412 2413def BSET_B : BSET_B_ENC, BSET_B_DESC; 2414def BSET_H : BSET_H_ENC, BSET_H_DESC; 2415def BSET_W : BSET_W_ENC, BSET_W_DESC; 2416def BSET_D : BSET_D_ENC, BSET_D_DESC; 2417 2418def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2419def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2420def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2421def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2422 2423def BZ_B : BZ_B_ENC, BZ_B_DESC; 2424def BZ_H : BZ_H_ENC, BZ_H_DESC; 2425def BZ_W : BZ_W_ENC, BZ_W_DESC; 2426def BZ_D : BZ_D_ENC, BZ_D_DESC; 2427 2428def BZ_V : BZ_V_ENC, BZ_V_DESC; 2429 2430def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2431def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2432def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2433def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2434 2435def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2436def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2437def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2438def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2439 2440def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2441 2442def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2443def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2444def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2445def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2446 2447def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2448def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2449def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2450def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2451 2452def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2453def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2454def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2455def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2456 2457def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2458def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2459def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2460def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2461 2462def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2463def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2464def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2465def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2466 2467def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2468def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2469def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2470def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2471 2472def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2473def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2474def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2475def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2476 2477def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2478def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2479def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2480def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2481 2482def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2483def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2484def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2485 2486def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2487def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2488def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2489 2490def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2491 2492def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2493def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2494def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2495def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2496 2497def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2498def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2499def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2500def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2501 2502def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2503def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2504def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2505 2506def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2507def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2508def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2509 2510def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2511def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2512def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2513 2514def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2515def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2516def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2517 2518def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2519def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2520def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2521 2522def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2523def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2524def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2525 2526def FADD_W : FADD_W_ENC, FADD_W_DESC; 2527def FADD_D : FADD_D_ENC, FADD_D_DESC; 2528 2529def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2530def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2531 2532def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2533def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2534 2535def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2536def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2537 2538def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2539def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2540 2541def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2542def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2543 2544def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2545def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2546 2547def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2548def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2549 2550def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2551def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2552 2553def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2554def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2555 2556def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2557def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2558 2559def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2560def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2561 2562def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2563def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2564 2565def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2566def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2567 2568def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2569def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2570 2571def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2572def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2573 2574def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2575def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2576 2577def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2578def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2579 2580def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2581def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2582 2583def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2584def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2585 2586def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2587def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2588 2589def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2590def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2591 2592def FILL_B : FILL_B_ENC, FILL_B_DESC; 2593def FILL_H : FILL_H_ENC, FILL_H_DESC; 2594def FILL_W : FILL_W_ENC, FILL_W_DESC; 2595 2596def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2597def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2598 2599def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2600def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2601 2602def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2603def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2604 2605def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2606def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2607 2608def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2609def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2610 2611def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2612def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2613 2614def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2615def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2616 2617def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2618def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2619 2620def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2621def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2622 2623def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2624def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2625 2626def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2627def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2628 2629def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2630def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2631 2632def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2633def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2634 2635def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2636def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2637 2638def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2639def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2640 2641def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2642def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2643 2644def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2645def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2646 2647def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2648def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2649 2650def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2651def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2652 2653def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2654def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2655 2656def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2657def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2658 2659def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2660def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2661 2662def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2663def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2664 2665def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2666def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2667 2668def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2669def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2670 2671def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2672def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2673 2674def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2675def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2676 2677def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2678def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2679 2680def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2681def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2682 2683def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2684def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2685def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2686 2687def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2688def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2689def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2690 2691def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2692def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2693def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2694 2695def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2696def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2697def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2698 2699def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2700def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2701def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2702def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2703 2704def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2705def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2706def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2707def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2708 2709def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2710def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2711def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2712def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2713 2714def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2715def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2716def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2717def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2718 2719def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2720def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2721def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2722 2723def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2724def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2725def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2726def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2727 2728def LD_B: LD_B_ENC, LD_B_DESC; 2729def LD_H: LD_H_ENC, LD_H_DESC; 2730def LD_W: LD_W_ENC, LD_W_DESC; 2731def LD_D: LD_D_ENC, LD_D_DESC; 2732 2733def LDI_B : LDI_B_ENC, LDI_B_DESC; 2734def LDI_H : LDI_H_ENC, LDI_H_DESC; 2735def LDI_W : LDI_W_ENC, LDI_W_DESC; 2736def LDI_D : LDI_D_ENC, LDI_D_DESC; 2737 2738def LDX_B: LDX_B_ENC, LDX_B_DESC; 2739def LDX_H: LDX_H_ENC, LDX_H_DESC; 2740def LDX_W: LDX_W_ENC, LDX_W_DESC; 2741def LDX_D: LDX_D_ENC, LDX_D_DESC; 2742 2743def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2744def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2745 2746def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2747def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2748 2749def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2750def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2751def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2752def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2753 2754def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2755def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2756def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2757def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2758 2759def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2760def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2761def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2762def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2763 2764def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2765def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2766def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2767def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2768 2769def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2770def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2771def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2772def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2773 2774def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2775def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2776def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2777def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2778 2779def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2780def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2781def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2782def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2783 2784def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2785def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2786def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2787def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2788 2789def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2790def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2791def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2792def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2793 2794def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2795def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2796def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2797def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2798 2799def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2800def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2801def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2802def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2803 2804def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2805def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2806def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2807def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2808 2809def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2810def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2811def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2812def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2813 2814def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2815 2816def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2817def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2818 2819def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2820def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2821 2822def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2823def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2824def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2825def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2826 2827def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2828def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2829 2830def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2831def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2832 2833def MULV_B : MULV_B_ENC, MULV_B_DESC; 2834def MULV_H : MULV_H_ENC, MULV_H_DESC; 2835def MULV_W : MULV_W_ENC, MULV_W_DESC; 2836def MULV_D : MULV_D_ENC, MULV_D_DESC; 2837 2838def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2839def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2840def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2841def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2842 2843def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2844def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2845def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2846def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2847 2848def NOR_V : NOR_V_ENC, NOR_V_DESC; 2849def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2850 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2851 MSA128B:$ws, MSA128B:$wt)>; 2852def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2853 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2854 MSA128B:$ws, MSA128B:$wt)>; 2855def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2856 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2857 MSA128B:$ws, MSA128B:$wt)>; 2858 2859def NORI_B : NORI_B_ENC, NORI_B_DESC; 2860 2861def OR_V : OR_V_ENC, OR_V_DESC; 2862def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2863 PseudoInstExpansion<(OR_V MSA128B:$wd, 2864 MSA128B:$ws, MSA128B:$wt)>; 2865def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2866 PseudoInstExpansion<(OR_V MSA128B:$wd, 2867 MSA128B:$ws, MSA128B:$wt)>; 2868def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2869 PseudoInstExpansion<(OR_V MSA128B:$wd, 2870 MSA128B:$ws, MSA128B:$wt)>; 2871 2872def ORI_B : ORI_B_ENC, ORI_B_DESC; 2873 2874def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2875def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2876def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2877def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2878 2879def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2880def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2881def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2882def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2883 2884def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2885def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2886def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2887def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2888 2889def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2890def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2891def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2892def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2893 2894def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2895def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2896def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2897def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2898 2899def SHF_B : SHF_B_ENC, SHF_B_DESC; 2900def SHF_H : SHF_H_ENC, SHF_H_DESC; 2901def SHF_W : SHF_W_ENC, SHF_W_DESC; 2902 2903def SLD_B : SLD_B_ENC, SLD_B_DESC; 2904def SLD_H : SLD_H_ENC, SLD_H_DESC; 2905def SLD_W : SLD_W_ENC, SLD_W_DESC; 2906def SLD_D : SLD_D_ENC, SLD_D_DESC; 2907 2908def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2909def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2910def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2911def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2912 2913def SLL_B : SLL_B_ENC, SLL_B_DESC; 2914def SLL_H : SLL_H_ENC, SLL_H_DESC; 2915def SLL_W : SLL_W_ENC, SLL_W_DESC; 2916def SLL_D : SLL_D_ENC, SLL_D_DESC; 2917 2918def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2919def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2920def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2921def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2922 2923def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2924def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2925def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2926def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2927 2928def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2929def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2930def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2931def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2932 2933def SRA_B : SRA_B_ENC, SRA_B_DESC; 2934def SRA_H : SRA_H_ENC, SRA_H_DESC; 2935def SRA_W : SRA_W_ENC, SRA_W_DESC; 2936def SRA_D : SRA_D_ENC, SRA_D_DESC; 2937 2938def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2939def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2940def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2941def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2942 2943def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2944def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2945def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2946def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2947 2948def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2949def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2950def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2951def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2952 2953def SRL_B : SRL_B_ENC, SRL_B_DESC; 2954def SRL_H : SRL_H_ENC, SRL_H_DESC; 2955def SRL_W : SRL_W_ENC, SRL_W_DESC; 2956def SRL_D : SRL_D_ENC, SRL_D_DESC; 2957 2958def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2959def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2960def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2961def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2962 2963def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2964def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2965def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2966def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2967 2968def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2969def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2970def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2971def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2972 2973def ST_B: ST_B_ENC, ST_B_DESC; 2974def ST_H: ST_H_ENC, ST_H_DESC; 2975def ST_W: ST_W_ENC, ST_W_DESC; 2976def ST_D: ST_D_ENC, ST_D_DESC; 2977 2978def STX_B: STX_B_ENC, STX_B_DESC; 2979def STX_H: STX_H_ENC, STX_H_DESC; 2980def STX_W: STX_W_ENC, STX_W_DESC; 2981def STX_D: STX_D_ENC, STX_D_DESC; 2982 2983def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2984def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2985def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2986def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2987 2988def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2989def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2990def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2991def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2992 2993def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2994def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2995def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2996def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2997 2998def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2999def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3000def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3001def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3002 3003def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3004def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3005def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3006def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3007 3008def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3009def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3010def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3011def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3012 3013def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3014def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3015def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3016def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3017 3018def XOR_V : XOR_V_ENC, XOR_V_DESC; 3019def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3020 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3021 MSA128B:$ws, MSA128B:$wt)>; 3022def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3023 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3024 MSA128B:$ws, MSA128B:$wt)>; 3025def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3026 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3027 MSA128B:$ws, MSA128B:$wt)>; 3028 3029def XORI_B : XORI_B_ENC, XORI_B_DESC; 3030 3031// Patterns. 3032class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3033 Pat<pattern, result>, Requires<pred>; 3034 3035def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3036 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3037 3038def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3039def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3040def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3041def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3042def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3043def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3044def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3045 3046def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3047def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3048def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3049 3050def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3051 (ST_B MSA128B:$ws, addr:$addr)>; 3052def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3053 (ST_H MSA128H:$ws, addr:$addr)>; 3054def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3055 (ST_W MSA128W:$ws, addr:$addr)>; 3056def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3057 (ST_D MSA128D:$ws, addr:$addr)>; 3058def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3059 (ST_H MSA128H:$ws, addr:$addr)>; 3060def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3061 (ST_W MSA128W:$ws, addr:$addr)>; 3062def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3063 (ST_D MSA128D:$ws, addr:$addr)>; 3064 3065def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3066 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3067def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3068 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3069def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3070 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3071 3072class MSA_FABS_PSEUDO_DESC_BASE<RegisterClass RCWD, RegisterClass RCWS = RCWD, 3073 InstrItinClass itin = NoItinerary> : 3074 MipsPseudo<(outs RCWD:$wd), 3075 (ins RCWS:$ws), 3076 [(set RCWD:$wd, (fabs RCWS:$ws))]> { 3077 InstrItinClass Itinerary = itin; 3078} 3079def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128W>, 3080 PseudoInstExpansion<(FMAX_A_W MSA128W:$wd, MSA128W:$ws, 3081 MSA128W:$ws)>; 3082def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128D>, 3083 PseudoInstExpansion<(FMAX_A_D MSA128D:$wd, MSA128D:$ws, 3084 MSA128D:$ws)>; 3085 3086class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3087 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3088 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3089 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3090 3091// These are endian-independant because the element size doesnt change 3092def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3093def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3094def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3095def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3096def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3097def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3098 3099// Little endian bitcasts are always no-ops 3100def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3101def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3102def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3103def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3104def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3105def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3106 3107def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3108def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3109def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3110def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3111def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3112 3113def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3114def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3115def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3116def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3117def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3118 3119def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3120def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3121def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3122def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3123def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3124 3125def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3126def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3127def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3128def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3129def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3130 3131def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3132def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3133def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3134def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3135def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3136 3137// Big endian bitcasts expand to shuffle instructions. 3138// This is because bitcast is defined to be a store/load sequence and the 3139// vector store/load instructions are mixed-endian with respect to the vector 3140// as a whole (little endian with respect to element order, but big endian 3141// elements). 3142 3143class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3144 RegisterClass DstRC, MSAInst Insn, 3145 RegisterClass ViaRC> : 3146 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3147 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3148 DstRC), 3149 [HasMSA, IsBE]>; 3150 3151class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3152 RegisterClass DstRC, MSAInst Insn, 3153 RegisterClass ViaRC> : 3154 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3155 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3156 DstRC), 3157 [HasMSA, IsBE]>; 3158 3159class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3160 RegisterClass DstRC> : 3161 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3162 3163class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3164 RegisterClass DstRC> : 3165 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3166 3167class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3168 RegisterClass DstRC> : 3169 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3170 (COPY_TO_REGCLASS 3171 (SHF_W 3172 (COPY_TO_REGCLASS 3173 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3174 MSA128W), 177), 3175 DstRC), 3176 [HasMSA, IsBE]>; 3177 3178class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3179 RegisterClass DstRC> : 3180 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3181 3182class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3183 RegisterClass DstRC> : 3184 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3185 3186class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3187 RegisterClass DstRC> : 3188 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3189 3190def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3191def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3192def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3193def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3194def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3195def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3196 3197def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3198def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3199def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3200def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3201def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3202 3203def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3204def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3205def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3206def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3207def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3208 3209def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3210def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3211def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3212def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3213def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3214 3215def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3216def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3217def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3218def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3219def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3220 3221def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3222def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3223def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3224def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3225def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3226 3227def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3228def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3229def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3230def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3231def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3232 3233// Pseudos used to implement BNZ.df, and BZ.df 3234 3235class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3236 RegisterClass RCWS, 3237 InstrItinClass itin = NoItinerary> : 3238 MipsPseudo<(outs GPR32:$dst), 3239 (ins RCWS:$ws), 3240 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3241 bit usesCustomInserter = 1; 3242} 3243 3244def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3245 MSA128B, NoItinerary>; 3246def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3247 MSA128H, NoItinerary>; 3248def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3249 MSA128W, NoItinerary>; 3250def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3251 MSA128D, NoItinerary>; 3252def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3253 MSA128B, NoItinerary>; 3254 3255def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3256 MSA128B, NoItinerary>; 3257def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3258 MSA128H, NoItinerary>; 3259def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3260 MSA128W, NoItinerary>; 3261def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3262 MSA128D, NoItinerary>; 3263def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3264 MSA128B, NoItinerary>; 3265