MipsMSAInstrInfo.td revision 45ecbfc8e58923131068dced0cf89348ac61208f
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm1 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm8"; 82} 83 84def vsplat_uimm2 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm3 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm4 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm5 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm6 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm8 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_simm5 : Operand<vAny>; 109 110def vsplat_simm10 : Operand<vAny>; 111 112// Pattern fragments 113def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 114 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 115def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 116 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 117def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 118 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 119 120def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 121 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 122def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 123 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 124def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 125 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 126 127def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 129def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 131def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 133 134class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 135 PatFrag<(ops node:$lhs, node:$rhs), 136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 137 138// ISD::SETFALSE cannot occur 139def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 140def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 141def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 142def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 143def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 144def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 145def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 146def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 147def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 148def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 149def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 150def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 151def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 152def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 153def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 154def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 155def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 156def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 157def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 158def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 159def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 160def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 161def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 162def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 163def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 164def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 165def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 166def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 167// ISD::SETTRUE cannot occur 168// ISD::SETFALSE2 cannot occur 169// ISD::SETTRUE2 cannot occur 170 171class vsetcc_type<ValueType ResTy, CondCode CC> : 172 PatFrag<(ops node:$lhs, node:$rhs), 173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 174 175def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 176def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 177def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 178def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 179def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 180def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 181def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 182def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 183def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 184def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 185def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 186def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 187def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 188def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 189def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 190def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 191def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 192def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 193def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 194def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 195 196def vsplati8 : PatFrag<(ops node:$e0), 197 (v16i8 (build_vector node:$e0, node:$e0, 198 node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0, 202 node:$e0, node:$e0, 203 node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati16 : PatFrag<(ops node:$e0), 206 (v8i16 (build_vector node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0))>; 210def vsplati32 : PatFrag<(ops node:$e0), 211 (v4i32 (build_vector node:$e0, node:$e0, 212 node:$e0, node:$e0))>; 213def vsplati64 : PatFrag<(ops node:$e0), 214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 215 216class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 217 SDNodeXForm xform = NOOP_SDNodeXForm> 218 : PatLeaf<frag, pred, xform> { 219 Operand OpClass = opclass; 220} 221 222class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 223 list<SDNode> roots = [], 224 list<SDNodeProperty> props = []> : 225 ComplexPattern<ty, numops, fn, roots, props> { 226 Operand OpClass = opclass; 227} 228 229def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 230 "selectVSplatUimm3", 231 [build_vector, bitconvert]>; 232 233def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 234 "selectVSplatUimm4", 235 [build_vector, bitconvert]>; 236 237def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 238 "selectVSplatUimm5", 239 [build_vector, bitconvert]>; 240 241def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 242 "selectVSplatUimm8", 243 [build_vector, bitconvert]>; 244 245def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 246 "selectVSplatSimm5", 247 [build_vector, bitconvert]>; 248 249def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 250 "selectVSplatUimm3", 251 [build_vector, bitconvert]>; 252 253def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 254 "selectVSplatUimm4", 255 [build_vector, bitconvert]>; 256 257def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 262 "selectVSplatSimm5", 263 [build_vector, bitconvert]>; 264 265def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 266 "selectVSplatUimm2", 267 [build_vector, bitconvert]>; 268 269def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 270 "selectVSplatUimm5", 271 [build_vector, bitconvert]>; 272 273def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 274 "selectVSplatSimm5", 275 [build_vector, bitconvert]>; 276 277def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 278 "selectVSplatUimm1", 279 [build_vector, bitconvert]>; 280 281def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 282 "selectVSplatUimm5", 283 [build_vector, bitconvert]>; 284 285def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 286 "selectVSplatUimm6", 287 [build_vector, bitconvert]>; 288 289def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 290 "selectVSplatSimm5", 291 [build_vector, bitconvert]>; 292 293// Any build_vector that is a constant splat with a value that is an exact 294// power of 2 295def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 296 [build_vector, bitconvert]>; 297 298def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 299 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 300 301def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 302 (add node:$wd, (mul node:$ws, node:$wt))>; 303 304def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 305 (sub node:$wd, (mul node:$ws, node:$wt))>; 306 307// Immediates 308def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 309def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 310 311// Instruction encoding. 312class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 313class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 314class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 315class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 316 317class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 318class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 319class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 320class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 321 322class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 323class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 324class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 325class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 326 327class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 328class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 329class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 330class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 331 332class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 333class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 334class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 335class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 336 337class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 338class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 339class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 340class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 341 342class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 343 344class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 345 346class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 347class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 348class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 349class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 350 351class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 352class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 353class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 354class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 355 356class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 357class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 358class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 359class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 360 361class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 362class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 363class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 364class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 365 366class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 367class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 368class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 369class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 370 371class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 372class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 373class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 374class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 375 376class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 377class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 378class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 379class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 380 381class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 382class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 383class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 384class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 385 386class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 387class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 388class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 389class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 390 391class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 392class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 393class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 394class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 395 396class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 397class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 398class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 399class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 400 401class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 402class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 403class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 404class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 405 406class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 407 408class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 409 410class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 411 412class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 413 414class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 415class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 416class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 417class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 418 419class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 420class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 421class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 422class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 423 424class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 425class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 426class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 427class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 428 429class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 430 431class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 432 433class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 434 435class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 436class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 437class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 438class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 439 440class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 441class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 442class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 443class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 444 445class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 446class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 447class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 448class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 449 450class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 451 452class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 453class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 454class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 455class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 456 457class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 458class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 459class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 460class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 461 462class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 463 464class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 465class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 466class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 467class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 468 469class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 470class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 471class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 472class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 473 474class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 475class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 476class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 477class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 478 479class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 480class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 481class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 482class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 483 484class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 485class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 486class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 487class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 488 489class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 490class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 491class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 492class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 493 494class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 495class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 496class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 497class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 498 499class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 500class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 501class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 502class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 503 504class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 505class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 506class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 507 508class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 509class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 510class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 511 512class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 513 514class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 515class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 516class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 517class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 518 519class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 520class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 521class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 522class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 523 524class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 525class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 526class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 527 528class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 529class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 530class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 531 532class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 533class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 534class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 535 536class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 537class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 538class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 539 540class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 541class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 542class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 543 544class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 545class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 546class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 547 548class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 549class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 550 551class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 552class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 553 554class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 555class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 556 557class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 558class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 559 560class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 561class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 562 563class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 564class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 565 566class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 567class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 568 569class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 570class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 571 572class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 573class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 574 575class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 576class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 577 578class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 579class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 580 581class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 582class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 583 584class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 585class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 586 587class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 588class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 589 590class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 591class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 592 593class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 594class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 595 596class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 597class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 598 599class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 600class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 601 602class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 603class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 604 605class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 606class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 607 608class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 609class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 610 611class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 612class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 613 614class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 615class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 616class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 617 618class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 619class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 620 621class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 622class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 623 624class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 625class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 626 627class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 628class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 629 630class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 631class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 632 633class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 634class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 635 636class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 637class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 638 639class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 640class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 641 642class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 643class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 644 645class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 646class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 647 648class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 649class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 650 651class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 652class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 653 654class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 655class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 656 657class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 658class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 659 660class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 661class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 662 663class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 664class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 665 666class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 667class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 668 669class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 670class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 671 672class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 673class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 674 675class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 676class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 677 678class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 679class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 680 681class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 682class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 683 684class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 685class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 686 687class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 688class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 689 690class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 691class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 692 693class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 694class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 695 696class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 697class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 698 699class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 700class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 701 702class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 703class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 704 705class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 706class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 707class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 708 709class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 710class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 711class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 712 713class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 714class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 715class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 716 717class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 718class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 719class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 720 721class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 722class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 723class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 724class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 725 726class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 727class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 728class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 729class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 730 731class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 732class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 733class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 734class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 735 736class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 737class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 738class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 739class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 740 741class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 742class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 743class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 744 745class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 746class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 747class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 748class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 749 750class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 751class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 752class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 753class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 754 755class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 756class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 757class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 758class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 759 760class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 761class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 762class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 763class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 764 765class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 766class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 767 768class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 769class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 770 771class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 772class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 773class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 774class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 775 776class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 777class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 778class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 779class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 780 781class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 782class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 783class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 784class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 785 786class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 787class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 788class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 789class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 790 791class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 792class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 793class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 794class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 795 796class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 797class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 798class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 799class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 800 801class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 802class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 803class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 804class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 805 806class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 807class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 808class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 809class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 810 811class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 812class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 813class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 814class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 815 816class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 817class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 818class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 819class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 820 821class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 822class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 823class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 824class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 825 826class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 827class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 828class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 829class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 830 831class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 832class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 833class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 834class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 835 836class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 837 838class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 839class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 840 841class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 842class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 843 844class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 845class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 846class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 847class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 848 849class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 850class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 851 852class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 853class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 854 855class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 856class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 857class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 858class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 859 860class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 861class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 862class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 863class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 864 865class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 866class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 867class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 868class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 869 870class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 871 872class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 873 874class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 875 876class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 877 878class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 879class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 880class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 881class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 882 883class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 884class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 885class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 886class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 887 888class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 889class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 890class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 891class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 892 893class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 894class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 895class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 896class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 897 898class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 899class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 900class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 901class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 902 903class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 904class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 905class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 906 907class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 908class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 909class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 910class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 911 912class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 913class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 914class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 915class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 916 917class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 918class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 919class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 920class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 921 922class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 923class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 924class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 925class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 926 927class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 928class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 929class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 930class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 931 932class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 933class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 934class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 935class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 936 937class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 938class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 939class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 940class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 941 942class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 943class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 944class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 945class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 946 947class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 948class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 949class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 950class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 951 952class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 953class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 954class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 955class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 956 957class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 958class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 959class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 960class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 961 962class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 963class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 964class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 965class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 966 967class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 968class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 969class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 970class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 971 972class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 973class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 974class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 975class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 976 977class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 978class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 979class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 980class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 981 982class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 983class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 984class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 985class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 986 987class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 988class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 989class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 990class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 991 992class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 993class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 994class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 995class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 996 997class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 998class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 999class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1000class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1001 1002class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1003class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1004class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1005class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1006 1007class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1008class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1009class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1010class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1011 1012class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1013class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1014class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1015class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1016 1017class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1018class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1019class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1020class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1021 1022class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1023 1024class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1025 1026// Instruction desc. 1027class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1028 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1029 InstrItinClass itin = NoItinerary> { 1030 dag OutOperandList = (outs RCWD:$wd); 1031 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 1032 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 1033 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 1034 InstrItinClass Itinerary = itin; 1035} 1036 1037class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1038 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1039 InstrItinClass itin = NoItinerary> { 1040 dag OutOperandList = (outs RCWD:$wd); 1041 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 1042 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 1043 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 1044 InstrItinClass Itinerary = itin; 1045} 1046 1047class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1048 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1049 InstrItinClass itin = NoItinerary> { 1050 dag OutOperandList = (outs RCWD:$wd); 1051 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 1052 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 1053 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 1054 InstrItinClass Itinerary = itin; 1055} 1056 1057class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1058 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1059 InstrItinClass itin = NoItinerary> { 1060 dag OutOperandList = (outs RCWD:$wd); 1061 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 1062 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 1063 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 1064 InstrItinClass Itinerary = itin; 1065} 1066 1067class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1068 SplatComplexPattern SplatImm, RegisterClass RCWD, 1069 RegisterClass RCWS = RCWD, 1070 InstrItinClass itin = NoItinerary> { 1071 dag OutOperandList = (outs RCWD:$wd); 1072 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u); 1073 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u"); 1074 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))]; 1075 InstrItinClass Itinerary = itin; 1076} 1077 1078class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1079 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 1080 InstrItinClass itin = NoItinerary> { 1081 dag OutOperandList = (outs RCD:$rd); 1082 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 1083 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1084 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 1085 InstrItinClass Itinerary = itin; 1086} 1087 1088class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1089 RegisterClass RCD, RegisterClass RCWS> : 1090 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1091 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1092 bit usesCustomInserter = 1; 1093} 1094 1095class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1096 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1097 RegisterOperand ROWS = ROWD, 1098 InstrItinClass itin = NoItinerary> { 1099 dag OutOperandList = (outs ROWD:$wd); 1100 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1101 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1102 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1103 InstrItinClass Itinerary = itin; 1104} 1105 1106class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1107 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1108 RegisterOperand ROWS = ROWD, 1109 InstrItinClass itin = NoItinerary> { 1110 dag OutOperandList = (outs ROWD:$wd); 1111 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1112 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1113 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1114 InstrItinClass Itinerary = itin; 1115} 1116 1117// This class is deprecated and will be removed in the next few patches 1118class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1119 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1120 InstrItinClass itin = NoItinerary> { 1121 dag OutOperandList = (outs ROWD:$wd); 1122 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1123 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1124 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1125 InstrItinClass Itinerary = itin; 1126} 1127 1128class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1129 RegisterOperand ROWS = ROWD, 1130 InstrItinClass itin = NoItinerary> { 1131 dag OutOperandList = (outs ROWD:$wd); 1132 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1133 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1134 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1135 InstrItinClass Itinerary = itin; 1136} 1137 1138class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1139 InstrItinClass itin = NoItinerary> { 1140 dag OutOperandList = (outs RCWD:$wd); 1141 dag InOperandList = (ins vsplat_simm10:$i10); 1142 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1143 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1144 list<dag> Pattern = []; 1145 bit hasSideEffects = 0; 1146 InstrItinClass Itinerary = itin; 1147} 1148 1149class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1150 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1151 InstrItinClass itin = NoItinerary> { 1152 dag OutOperandList = (outs ROWD:$wd); 1153 dag InOperandList = (ins ROWS:$ws); 1154 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1155 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1156 InstrItinClass Itinerary = itin; 1157} 1158 1159class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1160 SDPatternOperator OpNode, RegisterOperand ROWD, 1161 RegisterOperand ROWS = ROWD, 1162 InstrItinClass itin = NoItinerary> { 1163 dag OutOperandList = (outs ROWD:$wd); 1164 dag InOperandList = (ins ROWS:$rs); 1165 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1166 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROWS:$rs)))]; 1167 InstrItinClass Itinerary = itin; 1168} 1169 1170class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1171 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1172 InstrItinClass itin = NoItinerary> { 1173 dag OutOperandList = (outs ROWD:$wd); 1174 dag InOperandList = (ins ROWS:$ws); 1175 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1176 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1177 InstrItinClass Itinerary = itin; 1178} 1179 1180class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1181 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1182 RegisterOperand ROWT = ROWD, 1183 InstrItinClass itin = NoItinerary> { 1184 dag OutOperandList = (outs ROWD:$wd); 1185 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1186 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1187 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1188 InstrItinClass Itinerary = itin; 1189} 1190 1191class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1192 RegisterOperand ROWS = ROWD, 1193 RegisterOperand ROWT = ROWD, 1194 InstrItinClass itin = NoItinerary> { 1195 dag OutOperandList = (outs ROWD:$wd); 1196 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1197 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1198 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1199 ROWT:$wt))]; 1200 string Constraints = "$wd = $wd_in"; 1201 InstrItinClass Itinerary = itin; 1202} 1203 1204class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1205 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1206 RegisterOperand ROWT = ROWD, 1207 InstrItinClass itin = NoItinerary> { 1208 dag OutOperandList = (outs ROWD:$wd); 1209 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1210 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1211 list<dag> Pattern = [(set ROWD:$wd, 1212 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1213 InstrItinClass Itinerary = itin; 1214 string Constraints = "$wd = $wd_in"; 1215} 1216 1217class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1218 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1219 RegisterOperand ROWT = ROWD, 1220 InstrItinClass itin = NoItinerary> : 1221 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1222 1223class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1224 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1225 RegisterOperand ROWT = ROWD, 1226 InstrItinClass itin = NoItinerary> : 1227 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1228 1229class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1230 dag OutOperandList = (outs); 1231 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1232 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1233 list<dag> Pattern = []; 1234 InstrItinClass Itinerary = IIBranch; 1235 bit isBranch = 1; 1236 bit isTerminator = 1; 1237 bit hasDelaySlot = 1; 1238 list<Register> Defs = [AT]; 1239} 1240 1241class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1242 RegisterOperand ROWD, RegisterOperand ROS, 1243 InstrItinClass itin = NoItinerary> { 1244 dag OutOperandList = (outs ROWD:$wd); 1245 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1246 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1247 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1248 ROS:$rs, 1249 immZExt6:$n))]; 1250 InstrItinClass Itinerary = itin; 1251 string Constraints = "$wd = $wd_in"; 1252} 1253 1254class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1255 RegisterClass RCWD, RegisterClass RCFS> : 1256 MipsPseudo<(outs RCWD:$wd), (ins RCWD:$wd_in, uimm6:$n, RCFS:$fs), 1257 [(set RCWD:$wd, (OpNode (Ty RCWD:$wd_in), RCFS:$fs, 1258 immZExt6:$n))]> { 1259 bit usesCustomInserter = 1; 1260 string Constraints = "$wd = $wd_in"; 1261} 1262 1263class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1264 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1265 InstrItinClass itin = NoItinerary> { 1266 dag OutOperandList = (outs RCWD:$wd); 1267 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1268 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1269 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1270 immZExt6:$n, 1271 RCWS:$ws))]; 1272 InstrItinClass Itinerary = itin; 1273 string Constraints = "$wd = $wd_in"; 1274} 1275 1276class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1277 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1278 RegisterClass RCWT = RCWD, 1279 InstrItinClass itin = NoItinerary> { 1280 dag OutOperandList = (outs RCWD:$wd); 1281 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1282 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1283 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1284 InstrItinClass Itinerary = itin; 1285} 1286 1287class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1288 RegisterClass RCWD, 1289 RegisterClass RCWS = RCWD, 1290 InstrItinClass itin = NoItinerary> { 1291 dag OutOperandList = (outs RCWD:$wd); 1292 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u3); 1293 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$u3]"); 1294 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF SplatImm:$u3, RCWS:$ws, 1295 RCWS:$ws))]; 1296 InstrItinClass Itinerary = itin; 1297} 1298 1299class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1300 RegisterClass RCWS = RCWD, 1301 RegisterClass RCWT = RCWD> : 1302 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1303 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1304 1305class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1306 IsCommutable; 1307class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1308 IsCommutable; 1309class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1310 IsCommutable; 1311class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1312 IsCommutable; 1313 1314class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1315 MSA128BOpnd>, IsCommutable; 1316class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1317 MSA128HOpnd>, IsCommutable; 1318class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1319 MSA128WOpnd>, IsCommutable; 1320class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1321 MSA128DOpnd>, IsCommutable; 1322 1323class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1324 MSA128BOpnd>, IsCommutable; 1325class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1326 MSA128HOpnd>, IsCommutable; 1327class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1328 MSA128WOpnd>, IsCommutable; 1329class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1330 MSA128DOpnd>, IsCommutable; 1331 1332class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1333 MSA128BOpnd>, IsCommutable; 1334class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1335 MSA128HOpnd>, IsCommutable; 1336class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1337 MSA128WOpnd>, IsCommutable; 1338class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1339 MSA128DOpnd>, IsCommutable; 1340 1341class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1342class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1343class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1344class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1345 1346class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1347 MSA128BOpnd>; 1348class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1349 MSA128HOpnd>; 1350class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1351 MSA128WOpnd>; 1352class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1353 MSA128DOpnd>; 1354 1355class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1356class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1357class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1358class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1359 1360class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1361 MSA128BOpnd>; 1362 1363class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1364 MSA128BOpnd>; 1365class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1366 MSA128HOpnd>; 1367class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1368 MSA128WOpnd>; 1369class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1370 MSA128DOpnd>; 1371 1372class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1373 MSA128BOpnd>; 1374class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1375 MSA128HOpnd>; 1376class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1377 MSA128WOpnd>; 1378class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1379 MSA128DOpnd>; 1380 1381class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1382 IsCommutable; 1383class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1384 IsCommutable; 1385class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1386 IsCommutable; 1387class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1388 IsCommutable; 1389 1390class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1391 IsCommutable; 1392class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1393 IsCommutable; 1394class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1395 IsCommutable; 1396class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1397 IsCommutable; 1398 1399class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1400 MSA128BOpnd>, IsCommutable; 1401class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1402 MSA128HOpnd>, IsCommutable; 1403class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1404 MSA128WOpnd>, IsCommutable; 1405class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1406 MSA128DOpnd>, IsCommutable; 1407 1408class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1409 MSA128BOpnd>, IsCommutable; 1410class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1411 MSA128HOpnd>, IsCommutable; 1412class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1413 MSA128WOpnd>, IsCommutable; 1414class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1415 MSA128DOpnd>, IsCommutable; 1416 1417class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1418class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1419class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1420class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1421 1422class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1423class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1424class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1425class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1426 1427class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1428class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1429class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1430class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1431 1432class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1433 MSA128B>; 1434class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1435 MSA128H>; 1436class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1437 MSA128W>; 1438class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1439 MSA128D>; 1440 1441class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1442class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1443class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1444class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1445 1446class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1447 MSA128B>; 1448class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1449 MSA128H>; 1450class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1451 MSA128W>; 1452class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1453 MSA128D>; 1454 1455class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1456 1457class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1458 MSA128BOpnd>; 1459 1460class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1461 1462class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1463 1464class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1465class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1466class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1467class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1468 1469class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1470class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1471class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1472class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1473 1474class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1475class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1476class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1477class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1478 1479class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1480 1481class BSEL_V_DESC { 1482 dag OutOperandList = (outs MSA128B:$wd); 1483 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1484 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1485 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1486 MSA128B:$wt))]; 1487 InstrItinClass Itinerary = NoItinerary; 1488 string Constraints = "$wd = $wd_in"; 1489} 1490 1491class BSELI_B_DESC { 1492 dag OutOperandList = (outs MSA128BOpnd:$wd); 1493 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1494 vsplat_uimm8:$u8); 1495 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1496 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1497 MSA128BOpnd:$ws, 1498 vsplati8_uimm8:$u8))]; 1499 InstrItinClass Itinerary = NoItinerary; 1500 string Constraints = "$wd = $wd_in"; 1501} 1502 1503class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1504class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1505class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1506class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1507 1508class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1509class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1510class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1511class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1512 1513class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1514class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1515class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1516class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1517 1518class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1519 1520class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1521 IsCommutable; 1522class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1523 IsCommutable; 1524class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1525 IsCommutable; 1526class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1527 IsCommutable; 1528 1529class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1530 MSA128BOpnd>; 1531class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1532 MSA128HOpnd>; 1533class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1534 MSA128WOpnd>; 1535class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1536 MSA128DOpnd>; 1537 1538class CFCMSA_DESC { 1539 dag OutOperandList = (outs GPR32:$rd); 1540 dag InOperandList = (ins MSACtrl:$cs); 1541 string AsmString = "cfcmsa\t$rd, $cs"; 1542 InstrItinClass Itinerary = NoItinerary; 1543 bit hasSideEffects = 1; 1544} 1545 1546class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1547class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1548class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1549class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1550 1551class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1552class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1553class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1554class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1555 1556class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1557 vsplati8_simm5, MSA128BOpnd>; 1558class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1559 vsplati16_simm5, MSA128HOpnd>; 1560class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1561 vsplati32_simm5, MSA128WOpnd>; 1562class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1563 vsplati64_simm5, MSA128DOpnd>; 1564 1565class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1566 vsplati8_uimm5, MSA128BOpnd>; 1567class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1568 vsplati16_uimm5, MSA128HOpnd>; 1569class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1570 vsplati32_uimm5, MSA128WOpnd>; 1571class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1572 vsplati64_uimm5, MSA128DOpnd>; 1573 1574class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1575class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1576class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1577class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1578 1579class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1580class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1581class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1582class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1583 1584class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1585 vsplati8_simm5, MSA128BOpnd>; 1586class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1587 vsplati16_simm5, MSA128HOpnd>; 1588class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1589 vsplati32_simm5, MSA128WOpnd>; 1590class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1591 vsplati64_simm5, MSA128DOpnd>; 1592 1593class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1594 vsplati8_uimm5, MSA128BOpnd>; 1595class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1596 vsplati16_uimm5, MSA128HOpnd>; 1597class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1598 vsplati32_uimm5, MSA128WOpnd>; 1599class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1600 vsplati64_uimm5, MSA128DOpnd>; 1601 1602class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1603 GPR32, MSA128B>; 1604class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1605 GPR32, MSA128H>; 1606class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1607 GPR32, MSA128W>; 1608 1609class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1610 GPR32, MSA128B>; 1611class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1612 GPR32, MSA128H>; 1613class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1614 GPR32, MSA128W>; 1615 1616class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1617 MSA128W>; 1618class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1619 MSA128D>; 1620 1621class CTCMSA_DESC { 1622 dag OutOperandList = (outs); 1623 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1624 string AsmString = "ctcmsa\t$cd, $rs"; 1625 InstrItinClass Itinerary = NoItinerary; 1626 bit hasSideEffects = 1; 1627} 1628 1629class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1630class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1631class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1632class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1633 1634class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1635class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1636class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1637class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1638 1639class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1640 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1641 IsCommutable; 1642class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1643 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1644 IsCommutable; 1645class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1646 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1647 IsCommutable; 1648 1649class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1650 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1651 IsCommutable; 1652class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1653 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1654 IsCommutable; 1655class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1656 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1657 IsCommutable; 1658 1659class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1660 MSA128HOpnd, MSA128BOpnd, 1661 MSA128BOpnd>, IsCommutable; 1662class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1663 MSA128WOpnd, MSA128HOpnd, 1664 MSA128HOpnd>, IsCommutable; 1665class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1666 MSA128DOpnd, MSA128WOpnd, 1667 MSA128WOpnd>, IsCommutable; 1668 1669class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1670 MSA128HOpnd, MSA128BOpnd, 1671 MSA128BOpnd>, IsCommutable; 1672class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1673 MSA128WOpnd, MSA128HOpnd, 1674 MSA128HOpnd>, IsCommutable; 1675class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1676 MSA128DOpnd, MSA128WOpnd, 1677 MSA128WOpnd>, IsCommutable; 1678 1679class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1680 MSA128HOpnd, MSA128BOpnd, 1681 MSA128BOpnd>; 1682class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1683 MSA128WOpnd, MSA128HOpnd, 1684 MSA128HOpnd>; 1685class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1686 MSA128DOpnd, MSA128WOpnd, 1687 MSA128WOpnd>; 1688 1689class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1690 MSA128HOpnd, MSA128BOpnd, 1691 MSA128BOpnd>; 1692class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1693 MSA128WOpnd, MSA128HOpnd, 1694 MSA128HOpnd>; 1695class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1696 MSA128DOpnd, MSA128WOpnd, 1697 MSA128WOpnd>; 1698 1699class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1700 IsCommutable; 1701class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1702 IsCommutable; 1703 1704class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1705 IsCommutable; 1706class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1707 IsCommutable; 1708 1709class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1710 IsCommutable; 1711class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1712 IsCommutable; 1713 1714class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1715 MSA128WOpnd>; 1716class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1717 MSA128DOpnd>; 1718 1719class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1720class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1721 1722class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1723class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1724 1725class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1726 IsCommutable; 1727class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1728 IsCommutable; 1729 1730class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1731 IsCommutable; 1732class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1733 IsCommutable; 1734 1735class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1736 IsCommutable; 1737class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1738 IsCommutable; 1739 1740class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1741 IsCommutable; 1742class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1743 IsCommutable; 1744 1745class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1746 IsCommutable; 1747class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1748 IsCommutable; 1749 1750class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1751 IsCommutable; 1752class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1753 IsCommutable; 1754 1755class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1756 IsCommutable; 1757class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1758 IsCommutable; 1759 1760class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1761class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1762 1763class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1764 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1765class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1766 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1767 1768class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1769 MSA128WOpnd>; 1770class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1771 MSA128DOpnd>; 1772 1773class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1774 MSA128WOpnd, MSA128HOpnd>; 1775class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1776 MSA128DOpnd, MSA128WOpnd>; 1777 1778class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1779 MSA128WOpnd, MSA128HOpnd>; 1780class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1781 MSA128DOpnd, MSA128WOpnd>; 1782 1783class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1784class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1785 1786class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1787class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1788 1789class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1790 MSA128WOpnd, MSA128HOpnd>; 1791class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1792 MSA128DOpnd, MSA128WOpnd>; 1793 1794class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1795 MSA128WOpnd, MSA128HOpnd>; 1796class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1797 MSA128DOpnd, MSA128WOpnd>; 1798 1799class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1800 MSA128BOpnd, GPR32Opnd>; 1801class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1802 MSA128HOpnd, GPR32Opnd>; 1803class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1804 MSA128WOpnd, GPR32Opnd>; 1805 1806class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1807class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1808 1809class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1810class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1811 1812class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1813class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1814 1815class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1816 MSA128WOpnd>; 1817class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1818 MSA128DOpnd>; 1819 1820class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1821class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1822 1823class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1824 MSA128WOpnd>; 1825class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1826 MSA128DOpnd>; 1827 1828class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1829class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1830 1831class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1832class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1833 1834class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1835class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1836 1837class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1838class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1839 1840class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1841 MSA128WOpnd>; 1842class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1843 MSA128DOpnd>; 1844 1845class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1846class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1847 1848class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1849class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1850 1851class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1852class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1853 1854class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1855class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1856 1857class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1858class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1859 1860class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1861class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1862 1863class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1864class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1865 1866class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1867class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1868 1869class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1870 MSA128WOpnd>; 1871class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1872 MSA128DOpnd>; 1873 1874class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1875 MSA128WOpnd>; 1876class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1877 MSA128DOpnd>; 1878 1879class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1880 MSA128WOpnd>; 1881class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1882 MSA128DOpnd>; 1883 1884class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1885 MSA128WOpnd>; 1886class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1887 MSA128DOpnd>; 1888 1889class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1890 MSA128WOpnd>; 1891class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1892 MSA128DOpnd>; 1893 1894class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1895 MSA128WOpnd>; 1896class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1897 MSA128DOpnd>; 1898 1899class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1900 MSA128WOpnd>; 1901class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1902 MSA128DOpnd>; 1903 1904class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1905 MSA128WOpnd>; 1906class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1907 MSA128DOpnd>; 1908 1909class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1910 MSA128WOpnd>; 1911class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1912 MSA128DOpnd>; 1913 1914class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1915 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1916class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1917 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1918 1919class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1920 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1921class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1922 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1923class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1924 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1925 1926class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1927 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1928class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1929 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1930class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1931 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1932 1933class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1934 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1935class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1936 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1937class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1938 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1939 1940class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1941 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1942class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1943 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1944class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1945 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1946 1947class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1948class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1949class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1950class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1951 1952class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1953class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1954class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1955class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1956 1957class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 1958class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 1959class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 1960class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 1961 1962class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 1963class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 1964class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 1965class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 1966 1967class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 1968 MSA128BOpnd, GPR32Opnd>; 1969class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 1970 MSA128HOpnd, GPR32Opnd>; 1971class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 1972 MSA128WOpnd, GPR32Opnd>; 1973 1974class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 1975 MSA128W, FGR32>; 1976class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 1977 MSA128D, FGR64>; 1978 1979class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1980class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1981class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1982class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1983 1984class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1985 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1986 ComplexPattern Addr = addrRegImm, 1987 InstrItinClass itin = NoItinerary> { 1988 dag OutOperandList = (outs RCWD:$wd); 1989 dag InOperandList = (ins MemOpnd:$addr); 1990 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1991 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1992 InstrItinClass Itinerary = itin; 1993} 1994 1995class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1996class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1997class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1998class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1999 2000class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 2001class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 2002class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 2003class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 2004 2005class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2006 ValueType TyNode, RegisterClass RCWD, 2007 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2008 InstrItinClass itin = NoItinerary> { 2009 dag OutOperandList = (outs RCWD:$wd); 2010 dag InOperandList = (ins MemOpnd:$addr); 2011 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2012 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2013 InstrItinClass Itinerary = itin; 2014} 2015 2016class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 2017class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 2018class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 2019class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 2020 2021class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2022 MSA128HOpnd>; 2023class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2024 MSA128WOpnd>; 2025 2026class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2027 MSA128HOpnd>; 2028class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2029 MSA128WOpnd>; 2030 2031class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2032class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2033class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2034class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2035 2036class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2037class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2038class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2039class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2040 2041class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2042class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2043class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2044class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2045 2046class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2047class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2048class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2049class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2050 2051class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2052 MSA128BOpnd>; 2053class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2054 MSA128HOpnd>; 2055class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2056 MSA128WOpnd>; 2057class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2058 MSA128DOpnd>; 2059 2060class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2061 MSA128BOpnd>; 2062class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2063 MSA128HOpnd>; 2064class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2065 MSA128WOpnd>; 2066class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2067 MSA128DOpnd>; 2068 2069class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2070class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2071class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2072class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2073 2074class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2075class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2076class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2077class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2078 2079class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2080class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2081class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2082class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2083 2084class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2085 MSA128BOpnd>; 2086class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2087 MSA128HOpnd>; 2088class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2089 MSA128WOpnd>; 2090class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2091 MSA128DOpnd>; 2092 2093class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2094 MSA128BOpnd>; 2095class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2096 MSA128HOpnd>; 2097class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2098 MSA128WOpnd>; 2099class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2100 MSA128DOpnd>; 2101 2102class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2103class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2104class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2105class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2106 2107class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2108class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2109class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2110class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2111 2112class MOVE_V_DESC { 2113 dag OutOperandList = (outs MSA128B:$wd); 2114 dag InOperandList = (ins MSA128B:$ws); 2115 string AsmString = "move.v\t$wd, $ws"; 2116 list<dag> Pattern = []; 2117 InstrItinClass Itinerary = NoItinerary; 2118} 2119 2120class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2121 MSA128HOpnd>; 2122class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2123 MSA128WOpnd>; 2124 2125class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2126 MSA128HOpnd>; 2127class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2128 MSA128WOpnd>; 2129 2130class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2131class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2132class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2133class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2134 2135class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2136 MSA128HOpnd>; 2137class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2138 MSA128WOpnd>; 2139 2140class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2141 MSA128HOpnd>; 2142class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2143 MSA128WOpnd>; 2144 2145class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2146class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2147class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2148class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2149 2150class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2151class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2152class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2153class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2154 2155class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2156class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2157class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2158class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2159 2160class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 2161class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 2162class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 2163class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 2164 2165class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2166 MSA128BOpnd>; 2167 2168class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 2169class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 2170class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 2171class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 2172 2173class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2174 2175class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2176class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2177class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2178class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2179 2180class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2181class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2182class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2183class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2184 2185class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2186class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2187class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2188class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2189 2190class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 2191class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 2192class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 2193class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 2194 2195class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 2196class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 2197class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 2198class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 2199 2200class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2201class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2202class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2203 2204class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2205class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2206class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2207class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2208 2209class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 2210class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 2211class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 2212class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 2213 2214class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2215class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2216class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2217class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2218 2219class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2220 MSA128B>; 2221class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2222 MSA128H>; 2223class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2224 MSA128W>; 2225class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2226 MSA128D>; 2227 2228class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2229 MSA128BOpnd, GPR32Opnd>; 2230class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2231 MSA128HOpnd, GPR32Opnd>; 2232class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2233 MSA128WOpnd, GPR32Opnd>; 2234class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2235 MSA128DOpnd, GPR32Opnd>; 2236 2237class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2238 MSA128B>; 2239class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2240 MSA128H>; 2241class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2242 MSA128W>; 2243class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2244 MSA128D>; 2245 2246class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2247class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2248class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2249class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2250 2251class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2252 MSA128B>; 2253class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2254 MSA128H>; 2255class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2256 MSA128W>; 2257class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2258 MSA128D>; 2259 2260class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2261class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2262class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2263class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2264 2265class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2266class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2267class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2268class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2269 2270class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2271class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2272class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2273class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2274 2275class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2276 MSA128B>; 2277class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2278 MSA128H>; 2279class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2280 MSA128W>; 2281class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2282 MSA128D>; 2283 2284class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2285class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2286class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2287class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2288 2289class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2290class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2291class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2292class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2293 2294class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2295 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2296 ComplexPattern Addr = addrRegImm, 2297 InstrItinClass itin = NoItinerary> { 2298 dag OutOperandList = (outs); 2299 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2300 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2301 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2302 InstrItinClass Itinerary = itin; 2303} 2304 2305class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2306class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2307class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2308class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2309 2310class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2311 ValueType TyNode, RegisterClass RCWD, 2312 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2313 InstrItinClass itin = NoItinerary> { 2314 dag OutOperandList = (outs); 2315 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2316 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2317 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2318 InstrItinClass Itinerary = itin; 2319} 2320 2321class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2322class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2323class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2324class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2325 2326class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2327 MSA128BOpnd>; 2328class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2329 MSA128HOpnd>; 2330class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2331 MSA128WOpnd>; 2332class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2333 MSA128DOpnd>; 2334 2335class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2336 MSA128BOpnd>; 2337class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2338 MSA128HOpnd>; 2339class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2340 MSA128WOpnd>; 2341class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2342 MSA128DOpnd>; 2343 2344class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2345 MSA128BOpnd>; 2346class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2347 MSA128HOpnd>; 2348class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2349 MSA128WOpnd>; 2350class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2351 MSA128DOpnd>; 2352 2353class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2354 MSA128BOpnd>; 2355class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2356 MSA128HOpnd>; 2357class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2358 MSA128WOpnd>; 2359class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2360 MSA128DOpnd>; 2361 2362class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2363class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2364class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2365class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2366 2367class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2368 MSA128BOpnd>; 2369class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2370 MSA128HOpnd>; 2371class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2372 MSA128WOpnd>; 2373class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2374 MSA128DOpnd>; 2375 2376class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2377class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2378class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2379class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2380 2381class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2382class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2383class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2384class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2385 2386class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2387 MSA128BOpnd>; 2388 2389// Instruction defs. 2390def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2391def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2392def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2393def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2394 2395def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2396def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2397def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2398def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2399 2400def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2401def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2402def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2403def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2404 2405def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2406def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2407def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2408def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2409 2410def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2411def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2412def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2413def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2414 2415def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2416def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2417def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2418def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2419 2420def AND_V : AND_V_ENC, AND_V_DESC; 2421def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2422 PseudoInstExpansion<(AND_V MSA128B:$wd, 2423 MSA128B:$ws, MSA128B:$wt)>; 2424def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2425 PseudoInstExpansion<(AND_V MSA128B:$wd, 2426 MSA128B:$ws, MSA128B:$wt)>; 2427def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2428 PseudoInstExpansion<(AND_V MSA128B:$wd, 2429 MSA128B:$ws, MSA128B:$wt)>; 2430 2431def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2432 2433def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2434def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2435def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2436def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2437 2438def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2439def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2440def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2441def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2442 2443def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2444def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2445def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2446def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2447 2448def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2449def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2450def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2451def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2452 2453def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2454def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2455def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2456def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2457 2458def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2459def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2460def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2461def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2462 2463def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2464def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2465def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2466def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2467 2468def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2469def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2470def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2471def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2472 2473def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2474def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2475def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2476def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2477 2478def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2479def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2480def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2481def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2482 2483def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2484def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2485def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2486def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2487 2488def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2489def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2490def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2491def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2492 2493def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2494 2495def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2496 2497def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2498 2499def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2500 2501def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2502def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2503def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2504def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2505 2506def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2507def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2508def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2509def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2510 2511def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2512def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2513def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2514def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2515 2516def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2517 2518def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2519 2520class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2521 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2522 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2523 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2524 MSA128B:$wt)> { 2525 let Constraints = "$wd_in = $wd"; 2526} 2527 2528def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2529def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2530def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2531def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2532def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2533 2534def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2535 2536def BSET_B : BSET_B_ENC, BSET_B_DESC; 2537def BSET_H : BSET_H_ENC, BSET_H_DESC; 2538def BSET_W : BSET_W_ENC, BSET_W_DESC; 2539def BSET_D : BSET_D_ENC, BSET_D_DESC; 2540 2541def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2542def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2543def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2544def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2545 2546def BZ_B : BZ_B_ENC, BZ_B_DESC; 2547def BZ_H : BZ_H_ENC, BZ_H_DESC; 2548def BZ_W : BZ_W_ENC, BZ_W_DESC; 2549def BZ_D : BZ_D_ENC, BZ_D_DESC; 2550 2551def BZ_V : BZ_V_ENC, BZ_V_DESC; 2552 2553def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2554def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2555def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2556def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2557 2558def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2559def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2560def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2561def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2562 2563def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2564 2565def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2566def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2567def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2568def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2569 2570def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2571def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2572def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2573def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2574 2575def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2576def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2577def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2578def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2579 2580def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2581def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2582def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2583def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2584 2585def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2586def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2587def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2588def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2589 2590def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2591def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2592def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2593def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2594 2595def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2596def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2597def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2598def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2599 2600def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2601def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2602def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2603def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2604 2605def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2606def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2607def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2608 2609def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2610def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2611def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2612 2613def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2614def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2615 2616def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2617 2618def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2619def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2620def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2621def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2622 2623def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2624def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2625def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2626def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2627 2628def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2629def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2630def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2631 2632def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2633def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2634def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2635 2636def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2637def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2638def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2639 2640def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2641def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2642def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2643 2644def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2645def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2646def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2647 2648def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2649def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2650def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2651 2652def FADD_W : FADD_W_ENC, FADD_W_DESC; 2653def FADD_D : FADD_D_ENC, FADD_D_DESC; 2654 2655def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2656def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2657 2658def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2659def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2660 2661def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2662def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2663 2664def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2665def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2666 2667def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2668def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2669 2670def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2671def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2672 2673def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2674def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2675 2676def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2677def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2678 2679def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2680def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2681 2682def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2683def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2684 2685def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2686def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2687 2688def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2689def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2690 2691def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2692def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2693 2694def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2695def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2696 2697def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2698def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2699 2700def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2701def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2702 2703def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2704def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2705 2706def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2707def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2708 2709def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2710def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2711 2712def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2713def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2714 2715def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2716def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2717 2718def FILL_B : FILL_B_ENC, FILL_B_DESC; 2719def FILL_H : FILL_H_ENC, FILL_H_DESC; 2720def FILL_W : FILL_W_ENC, FILL_W_DESC; 2721 2722def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2723def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2724 2725def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2726def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2727 2728def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2729def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2730 2731def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2732def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2733 2734def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2735def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2736 2737def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2738def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2739 2740def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2741def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2742 2743def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2744def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2745 2746def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2747def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2748 2749def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2750def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2751 2752def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2753def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2754 2755def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2756def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2757 2758def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2759def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2760 2761def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2762def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2763 2764def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2765def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2766 2767def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2768def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2769 2770def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2771def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2772 2773def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2774def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2775 2776def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2777def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2778 2779def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2780def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2781 2782def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2783def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2784 2785def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2786def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2787 2788def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2789def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2790 2791def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2792def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2793 2794def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2795def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2796 2797def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2798def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2799 2800def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2801def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2802 2803def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2804def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2805 2806def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2807def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2808 2809def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2810def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2811def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2812 2813def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2814def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2815def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2816 2817def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2818def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2819def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2820 2821def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2822def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2823def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2824 2825def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2826def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2827def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2828def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2829 2830def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2831def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2832def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2833def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2834 2835def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2836def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2837def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2838def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2839 2840def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2841def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2842def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2843def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2844 2845def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2846def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2847def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2848 2849// INSERT_FW_PSEUDO defined after INSVE_W 2850// INSERT_FD_PSEUDO defined after INSVE_D 2851 2852def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2853def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2854def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2855def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2856 2857def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2858def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2859 2860def LD_B: LD_B_ENC, LD_B_DESC; 2861def LD_H: LD_H_ENC, LD_H_DESC; 2862def LD_W: LD_W_ENC, LD_W_DESC; 2863def LD_D: LD_D_ENC, LD_D_DESC; 2864 2865def LDI_B : LDI_B_ENC, LDI_B_DESC; 2866def LDI_H : LDI_H_ENC, LDI_H_DESC; 2867def LDI_W : LDI_W_ENC, LDI_W_DESC; 2868def LDI_D : LDI_D_ENC, LDI_D_DESC; 2869 2870def LDX_B: LDX_B_ENC, LDX_B_DESC; 2871def LDX_H: LDX_H_ENC, LDX_H_DESC; 2872def LDX_W: LDX_W_ENC, LDX_W_DESC; 2873def LDX_D: LDX_D_ENC, LDX_D_DESC; 2874 2875def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2876def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2877 2878def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2879def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2880 2881def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2882def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2883def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2884def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2885 2886def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2887def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2888def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2889def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2890 2891def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2892def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2893def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2894def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2895 2896def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2897def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2898def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2899def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2900 2901def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2902def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2903def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2904def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2905 2906def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2907def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2908def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2909def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2910 2911def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2912def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2913def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2914def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2915 2916def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2917def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2918def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2919def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2920 2921def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2922def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2923def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2924def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2925 2926def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2927def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2928def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2929def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2930 2931def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2932def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2933def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2934def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2935 2936def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2937def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2938def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2939def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2940 2941def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2942def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2943def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2944def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2945 2946def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2947 2948def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2949def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2950 2951def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2952def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2953 2954def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2955def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2956def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2957def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2958 2959def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2960def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2961 2962def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2963def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2964 2965def MULV_B : MULV_B_ENC, MULV_B_DESC; 2966def MULV_H : MULV_H_ENC, MULV_H_DESC; 2967def MULV_W : MULV_W_ENC, MULV_W_DESC; 2968def MULV_D : MULV_D_ENC, MULV_D_DESC; 2969 2970def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2971def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2972def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2973def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2974 2975def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2976def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2977def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2978def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2979 2980def NOR_V : NOR_V_ENC, NOR_V_DESC; 2981def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2982 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2983 MSA128B:$ws, MSA128B:$wt)>; 2984def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2985 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2986 MSA128B:$ws, MSA128B:$wt)>; 2987def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2988 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2989 MSA128B:$ws, MSA128B:$wt)>; 2990 2991def NORI_B : NORI_B_ENC, NORI_B_DESC; 2992 2993def OR_V : OR_V_ENC, OR_V_DESC; 2994def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2995 PseudoInstExpansion<(OR_V MSA128B:$wd, 2996 MSA128B:$ws, MSA128B:$wt)>; 2997def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2998 PseudoInstExpansion<(OR_V MSA128B:$wd, 2999 MSA128B:$ws, MSA128B:$wt)>; 3000def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3001 PseudoInstExpansion<(OR_V MSA128B:$wd, 3002 MSA128B:$ws, MSA128B:$wt)>; 3003 3004def ORI_B : ORI_B_ENC, ORI_B_DESC; 3005 3006def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3007def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3008def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3009def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3010 3011def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3012def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3013def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3014def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3015 3016def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3017def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3018def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3019def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3020 3021def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3022def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3023def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3024def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3025 3026def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3027def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3028def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3029def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3030 3031def SHF_B : SHF_B_ENC, SHF_B_DESC; 3032def SHF_H : SHF_H_ENC, SHF_H_DESC; 3033def SHF_W : SHF_W_ENC, SHF_W_DESC; 3034 3035def SLD_B : SLD_B_ENC, SLD_B_DESC; 3036def SLD_H : SLD_H_ENC, SLD_H_DESC; 3037def SLD_W : SLD_W_ENC, SLD_W_DESC; 3038def SLD_D : SLD_D_ENC, SLD_D_DESC; 3039 3040def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3041def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3042def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3043def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3044 3045def SLL_B : SLL_B_ENC, SLL_B_DESC; 3046def SLL_H : SLL_H_ENC, SLL_H_DESC; 3047def SLL_W : SLL_W_ENC, SLL_W_DESC; 3048def SLL_D : SLL_D_ENC, SLL_D_DESC; 3049 3050def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3051def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3052def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3053def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3054 3055def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3056def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3057def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3058def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3059 3060def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3061def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3062def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3063def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3064 3065def SRA_B : SRA_B_ENC, SRA_B_DESC; 3066def SRA_H : SRA_H_ENC, SRA_H_DESC; 3067def SRA_W : SRA_W_ENC, SRA_W_DESC; 3068def SRA_D : SRA_D_ENC, SRA_D_DESC; 3069 3070def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3071def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3072def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3073def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3074 3075def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3076def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3077def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3078def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3079 3080def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3081def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3082def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3083def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3084 3085def SRL_B : SRL_B_ENC, SRL_B_DESC; 3086def SRL_H : SRL_H_ENC, SRL_H_DESC; 3087def SRL_W : SRL_W_ENC, SRL_W_DESC; 3088def SRL_D : SRL_D_ENC, SRL_D_DESC; 3089 3090def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3091def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3092def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3093def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3094 3095def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3096def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3097def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3098def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3099 3100def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3101def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3102def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3103def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3104 3105def ST_B: ST_B_ENC, ST_B_DESC; 3106def ST_H: ST_H_ENC, ST_H_DESC; 3107def ST_W: ST_W_ENC, ST_W_DESC; 3108def ST_D: ST_D_ENC, ST_D_DESC; 3109 3110def STX_B: STX_B_ENC, STX_B_DESC; 3111def STX_H: STX_H_ENC, STX_H_DESC; 3112def STX_W: STX_W_ENC, STX_W_DESC; 3113def STX_D: STX_D_ENC, STX_D_DESC; 3114 3115def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3116def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3117def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3118def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3119 3120def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3121def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3122def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3123def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3124 3125def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3126def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3127def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3128def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3129 3130def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3131def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3132def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3133def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3134 3135def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3136def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3137def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3138def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3139 3140def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3141def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3142def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3143def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3144 3145def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3146def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3147def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3148def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3149 3150def XOR_V : XOR_V_ENC, XOR_V_DESC; 3151def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3152 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3153 MSA128B:$ws, MSA128B:$wt)>; 3154def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3155 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3156 MSA128B:$ws, MSA128B:$wt)>; 3157def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3158 PseudoInstExpansion<(XOR_V MSA128B:$wd, 3159 MSA128B:$ws, MSA128B:$wt)>; 3160 3161def XORI_B : XORI_B_ENC, XORI_B_DESC; 3162 3163// Patterns. 3164class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3165 Pat<pattern, result>, Requires<pred>; 3166 3167def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3168 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3169 3170def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3171def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3172def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3173def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3174def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3175def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3176def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3177 3178def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3179def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3180def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3181 3182def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3183 (ST_B MSA128B:$ws, addr:$addr)>; 3184def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3185 (ST_H MSA128H:$ws, addr:$addr)>; 3186def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3187 (ST_W MSA128W:$ws, addr:$addr)>; 3188def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3189 (ST_D MSA128D:$ws, addr:$addr)>; 3190def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3191 (ST_H MSA128H:$ws, addr:$addr)>; 3192def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3193 (ST_W MSA128W:$ws, addr:$addr)>; 3194def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3195 (ST_D MSA128D:$ws, addr:$addr)>; 3196 3197def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3198 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3199def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3200 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3201def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3202 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3203 3204class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3205 RegisterOperand ROWS = ROWD, 3206 InstrItinClass itin = NoItinerary> : 3207 MipsPseudo<(outs ROWD:$wd), 3208 (ins ROWS:$ws), 3209 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3210 InstrItinClass Itinerary = itin; 3211} 3212def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3213 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3214 MSA128WOpnd:$ws)>; 3215def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3216 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3217 MSA128DOpnd:$ws)>; 3218 3219class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3220 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3221 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3222 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3223 3224// These are endian-independant because the element size doesnt change 3225def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3226def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3227def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3228def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3229def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3230def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3231 3232// Little endian bitcasts are always no-ops 3233def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3234def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3235def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3236def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3237def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3238def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3239 3240def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3241def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3242def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3243def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3244def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3245 3246def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3247def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3248def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3249def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3250def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3251 3252def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3253def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3254def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3255def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3256def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3257 3258def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3259def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3260def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3261def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3262def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3263 3264def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3265def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3266def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3267def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3268def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3269 3270// Big endian bitcasts expand to shuffle instructions. 3271// This is because bitcast is defined to be a store/load sequence and the 3272// vector store/load instructions are mixed-endian with respect to the vector 3273// as a whole (little endian with respect to element order, but big endian 3274// elements). 3275 3276class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3277 RegisterClass DstRC, MSAInst Insn, 3278 RegisterClass ViaRC> : 3279 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3280 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3281 DstRC), 3282 [HasMSA, IsBE]>; 3283 3284class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3285 RegisterClass DstRC, MSAInst Insn, 3286 RegisterClass ViaRC> : 3287 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3288 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3289 DstRC), 3290 [HasMSA, IsBE]>; 3291 3292class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3293 RegisterClass DstRC> : 3294 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3295 3296class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3297 RegisterClass DstRC> : 3298 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3299 3300class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3301 RegisterClass DstRC> : 3302 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3303 (COPY_TO_REGCLASS 3304 (SHF_W 3305 (COPY_TO_REGCLASS 3306 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3307 MSA128W), 177), 3308 DstRC), 3309 [HasMSA, IsBE]>; 3310 3311class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3312 RegisterClass DstRC> : 3313 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3314 3315class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3316 RegisterClass DstRC> : 3317 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3318 3319class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3320 RegisterClass DstRC> : 3321 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3322 3323def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3324def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3325def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3326def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3327def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3328def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3329 3330def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3331def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3332def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3333def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3334def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3335 3336def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3337def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3338def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3339def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3340def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3341 3342def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3343def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3344def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3345def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3346def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3347 3348def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3349def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3350def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3351def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3352def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3353 3354def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3355def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3356def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3357def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3358def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3359 3360def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3361def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3362def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3363def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3364def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3365 3366// Pseudos used to implement BNZ.df, and BZ.df 3367 3368class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3369 RegisterClass RCWS, 3370 InstrItinClass itin = NoItinerary> : 3371 MipsPseudo<(outs GPR32:$dst), 3372 (ins RCWS:$ws), 3373 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3374 bit usesCustomInserter = 1; 3375} 3376 3377def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3378 MSA128B, NoItinerary>; 3379def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3380 MSA128H, NoItinerary>; 3381def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3382 MSA128W, NoItinerary>; 3383def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3384 MSA128D, NoItinerary>; 3385def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3386 MSA128B, NoItinerary>; 3387 3388def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3389 MSA128B, NoItinerary>; 3390def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3391 MSA128H, NoItinerary>; 3392def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3393 MSA128W, NoItinerary>; 3394def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3395 MSA128D, NoItinerary>; 3396def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3397 MSA128B, NoItinerary>; 3398