MipsMSAInstrInfo.td revision 4e812c1f4a723f0fa0e8714610e08be593c759b8
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>; 15def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 16 17def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 18def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 19def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 20def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 21def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>; 22def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>; 23 24def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>; 25def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>; 26def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>; 27def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>; 28 29// Immediates 30def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 31def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 32 33def uimm3 : Operand<i32> { 34 let PrintMethod = "printUnsignedImm"; 35} 36 37def uimm4 : Operand<i32> { 38 let PrintMethod = "printUnsignedImm"; 39} 40 41def uimm8 : Operand<i32> { 42 let PrintMethod = "printUnsignedImm"; 43} 44 45def simm5 : Operand<i32>; 46 47def simm10 : Operand<i32>; 48 49// Instruction encoding. 50class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 51class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 52class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 53class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 54 55class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 56class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 57class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 58class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 59 60class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 61class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 62class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 63class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 64 65class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 66class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 67class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 68class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 69 70class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 71class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 72class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 73class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 74 75class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 76class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 77class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 78class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 79 80class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 81 82class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 83 84class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 85class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 86class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 87class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 88 89class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 90class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 91class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 92class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 93 94class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 95class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 96class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 97class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 98 99class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 100class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 101class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 102class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 103 104class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 105class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 106class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 107class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 108 109class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 110class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 111class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 112class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 113 114class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 115class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 116class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 117class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 118 119class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 120class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 121class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 122class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 123 124class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 125class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 126class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 127class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 128 129class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 130class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 131class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 132class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 133 134class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 135class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 136class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 137class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 138 139class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 140class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 141class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 142class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 143 144class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 145 146class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 147 148class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 149 150class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 151 152class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 153class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 154class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 155class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 156 157class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 158class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 159class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 160class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 161 162class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 163class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 164class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 165class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 166 167class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 168 169class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 170 171class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 172 173class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 174class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 175class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 176class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 177 178class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 179class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 180class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 181class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 182 183class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 184class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 185class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 186class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 187 188class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 189 190class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 191class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 192class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 193class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 194 195class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 196class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 197class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 198class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 199 200class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 201 202class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 203class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 204class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 205class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 206 207class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 208class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 209class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 210class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 211 212class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 213class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 214class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 215class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 216 217class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 218class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 219class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 220class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 221 222class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 223class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 224class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 225class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 226 227class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 228class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 229class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 230class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 231 232class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 233class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 234class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 235class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 236 237class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 238class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 239class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 240class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 241 242class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 243class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 244class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 245 246class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 247class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 248class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 249 250class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 251 252class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 253class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 254class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 255class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 256 257class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 258class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 259class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 260class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 261 262class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 263class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 264class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 265 266class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 267class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 268class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 269 270class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 271class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 272class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 273 274class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 275class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 276class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 277 278class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 279class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 280class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 281 282class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 283class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 284class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 285 286class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 287class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 288 289class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 290class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 291 292class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 293class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 294 295class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 296class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 297 298class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 299class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 300 301class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 302class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 303 304class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 305class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 306 307class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 308class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 309 310class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 311class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 312 313class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 314class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 315 316class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 317class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 318 319class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 320class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 321 322class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 323class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 324 325class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 326class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 327 328class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 329class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 330 331class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 332class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 333 334class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 335class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 336 337class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 338class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 339 340class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 341class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 342 343class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 344class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 345 346class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 347class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 348 349class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 350class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 351 352class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 353class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 354class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 355 356class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 357class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 358 359class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 360class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 361 362class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 363class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 364 365class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 366class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 367 368class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 369class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 370 371class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 372class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 373 374class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 375class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 376 377class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 378class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 379 380class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 381class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 382 383class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 384class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 385 386class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 387class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 388 389class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 390class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 391 392class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 393class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 394 395class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 396class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 397 398class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 399class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 400 401class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 402class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 403 404class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 405class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 406 407class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 408class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 409 410class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 411class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 412 413class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 414class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 415 416class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 417class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 418 419class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 420class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 421 422class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 423class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 424 425class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 426class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 427 428class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 429class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 430 431class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 432class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 433 434class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 435class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 436 437class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 438class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 439 440class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 441class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 442 443class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 444class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 445class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 446 447class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 448class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 449class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 450 451class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 452class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 453class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 454 455class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 456class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 457class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 458 459class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 460class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 461class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 462class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 463 464class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 465class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 466class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 467class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 468 469class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 470class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 471class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 472class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 473 474class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 475class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 476class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 477class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 478 479class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 480class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 481class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 482 483class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 484class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 485class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 486class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 487 488class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 489class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 490class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 491class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 492 493class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 494class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 495class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 496class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 497 498class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 499class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 500class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 501class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 502 503class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 504class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 505 506class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 507class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 508 509class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 510class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 511class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 512class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 513 514class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 515class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 516class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 517class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 518 519class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 520class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 521class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 522class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 523 524class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 525class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 526class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 527class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 528 529class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 530class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 531class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 532class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 533 534class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 535class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 536class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 537class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 538 539class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 540class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 541class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 542class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 543 544class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 545class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 546class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 547class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 548 549class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 550class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 551class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 552class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 553 554class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 555class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 556class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 557class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 558 559class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 560class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 561class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 562class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 563 564class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 565class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 566class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 567class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 568 569class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 570class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 571class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 572class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 573 574class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 575 576class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 577class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 578 579class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 580class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 581 582class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 583class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 584class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 585class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 586 587class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 588class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 589 590class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 591class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 592 593class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 594class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 595class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 596class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 597 598class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 599class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 600class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 601class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 602 603class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 604class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 605class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 606class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 607 608class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 609 610class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 611 612class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 613 614class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 615 616class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 617class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 618class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 619class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 620 621class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 622class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 623class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 624class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 625 626class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 627class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 628class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 629class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 630 631class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 632class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 633class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 634class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 635 636class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 637class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 638class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 639class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 640 641class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 642class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 643class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 644 645class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 646class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 647class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 648class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 649 650class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 651class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 652class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 653class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 654 655class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 656class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 657class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 658class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 659 660class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 661class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 662class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 663class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 664 665class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 666class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 667class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 668class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 669 670class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 671class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 672class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 673class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 674 675class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 676class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 677class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 678class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 679 680class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 681class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 682class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 683class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 684 685class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 686class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 687class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 688class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 689 690class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 691class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 692class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 693class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 694 695class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 696class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 697class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 698class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 699 700class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 701class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 702class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 703class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 704 705class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 706class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 707class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 708class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 709 710class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 711class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 712class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 713class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 714 715class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 716class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 717class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 718class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 719 720class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 721class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 722class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 723class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 724 725class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 726class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 727class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 728class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 729 730class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 731class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 732class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 733class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 734 735class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 736class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 737class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 738class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 739 740class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 741class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 742class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 743class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 744 745class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 746class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 747class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 748class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 749 750class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 751class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 752class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 753class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 754 755class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 756class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 757class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 758class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 759 760class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 761 762class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 763 764// Instruction desc. 765class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 766 RegisterClass RCWD, RegisterClass RCWS = RCWD, 767 InstrItinClass itin = NoItinerary> { 768 dag OutOperandList = (outs RCWD:$wd); 769 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 770 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 771 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 772 InstrItinClass Itinerary = itin; 773} 774 775class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 776 RegisterClass RCWD, RegisterClass RCWS = RCWD, 777 InstrItinClass itin = NoItinerary> { 778 dag OutOperandList = (outs RCWD:$wd); 779 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 780 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 781 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 782 InstrItinClass Itinerary = itin; 783} 784 785class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 786 RegisterClass RCWD, RegisterClass RCWS = RCWD, 787 InstrItinClass itin = NoItinerary> { 788 dag OutOperandList = (outs RCWD:$wd); 789 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 790 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 791 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 792 InstrItinClass Itinerary = itin; 793} 794 795class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 796 RegisterClass RCWD, RegisterClass RCWS = RCWD, 797 InstrItinClass itin = NoItinerary> { 798 dag OutOperandList = (outs RCWD:$wd); 799 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 800 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 801 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 802 InstrItinClass Itinerary = itin; 803} 804 805class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 806 RegisterClass RCD, RegisterClass RCWS, 807 InstrItinClass itin = NoItinerary> { 808 dag OutOperandList = (outs RCD:$rd); 809 dag InOperandList = (ins RCWS:$ws, uimm6:$n); 810 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 811 list<dag> Pattern = [(set RCD:$rd, (OpNode RCWS:$ws, immZExt6:$n))]; 812 InstrItinClass Itinerary = itin; 813} 814 815class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 816 RegisterClass RCWD, RegisterClass RCWS = RCWD, 817 InstrItinClass itin = NoItinerary> { 818 dag OutOperandList = (outs RCWD:$wd); 819 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 820 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 821 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 822 InstrItinClass Itinerary = itin; 823} 824 825class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 826 RegisterClass RCWD, RegisterClass RCWS = RCWD, 827 InstrItinClass itin = NoItinerary> { 828 dag OutOperandList = (outs RCWD:$wd); 829 dag InOperandList = (ins RCWS:$ws, simm5:$s5); 830 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5"); 831 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))]; 832 InstrItinClass Itinerary = itin; 833} 834 835class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 836 RegisterClass RCWD, RegisterClass RCWS = RCWD, 837 InstrItinClass itin = NoItinerary> { 838 dag OutOperandList = (outs RCWD:$wd); 839 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 840 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 841 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 842 InstrItinClass Itinerary = itin; 843} 844 845class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 846 RegisterClass RCWD, 847 InstrItinClass itin = NoItinerary> { 848 dag OutOperandList = (outs RCWD:$wd); 849 dag InOperandList = (ins simm10:$i10); 850 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 851 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))]; 852 InstrItinClass Itinerary = itin; 853} 854 855class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 856 RegisterClass RCWD, RegisterClass RCWS = RCWD, 857 InstrItinClass itin = NoItinerary> { 858 dag OutOperandList = (outs RCWD:$wd); 859 dag InOperandList = (ins RCWS:$ws); 860 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 861 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 862 InstrItinClass Itinerary = itin; 863} 864 865class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 866 RegisterClass RCWD, RegisterClass RCWS = RCWD, 867 InstrItinClass itin = NoItinerary> : 868 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 869 870 871class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 872 RegisterClass RCWD, RegisterClass RCWS = RCWD, 873 RegisterClass RCWT = RCWD, 874 InstrItinClass itin = NoItinerary> { 875 dag OutOperandList = (outs RCWD:$wd); 876 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 877 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 878 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 879 InstrItinClass Itinerary = itin; 880} 881 882class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 883 RegisterClass RCWD, RegisterClass RCWS = RCWD, 884 RegisterClass RCWT = RCWD, 885 InstrItinClass itin = NoItinerary> { 886 dag OutOperandList = (outs RCWD:$wd); 887 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 888 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 889 list<dag> Pattern = [(set RCWD:$wd, 890 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 891 InstrItinClass Itinerary = itin; 892 string Constraints = "$wd = $wd_in"; 893} 894 895class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 896 RegisterClass RCWD, RegisterClass RCWS = RCWD, 897 RegisterClass RCWT = RCWD, 898 InstrItinClass itin = NoItinerary> : 899 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 900 901class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 902 RegisterClass RCWD, RegisterClass RCWS = RCWD, 903 RegisterClass RCWT = RCWD, 904 InstrItinClass itin = NoItinerary> : 905 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 906 907class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 908 dag OutOperandList = (outs); 909 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 910 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 911 list<dag> Pattern = []; 912 InstrItinClass Itinerary = IIBranch; 913 bit isBranch = 1; 914 bit isTerminator = 1; 915 bit hasDelaySlot = 1; 916 list<Register> Defs = [AT]; 917} 918 919class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 920 RegisterClass RCD, RegisterClass RCWS, 921 InstrItinClass itin = NoItinerary> { 922 dag OutOperandList = (outs RCD:$wd); 923 dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$rs); 924 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 925 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 926 immZExt6:$n, 927 RCWS:$rs))]; 928 InstrItinClass Itinerary = itin; 929 string Constraints = "$wd = $wd_in"; 930} 931 932class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 933 RegisterClass RCWD, RegisterClass RCWS = RCWD, 934 InstrItinClass itin = NoItinerary> { 935 dag OutOperandList = (outs RCWD:$wd); 936 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 937 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 938 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 939 immZExt6:$n, 940 RCWS:$ws))]; 941 InstrItinClass Itinerary = itin; 942 string Constraints = "$wd = $wd_in"; 943} 944 945class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 946 RegisterClass RCWD, RegisterClass RCWS = RCWD, 947 RegisterClass RCWT = RCWD, 948 InstrItinClass itin = NoItinerary> { 949 dag OutOperandList = (outs RCWD:$wd); 950 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 951 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 952 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 953 InstrItinClass Itinerary = itin; 954} 955 956class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 957 RegisterClass RCWS = RCWD, 958 RegisterClass RCWT = RCWD> : 959 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 960 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 961 962class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 963 IsCommutable; 964class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 965 IsCommutable; 966class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 967 IsCommutable; 968class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 969 IsCommutable; 970 971class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 972 IsCommutable; 973class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 974 IsCommutable; 975class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 976 IsCommutable; 977class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 978 IsCommutable; 979 980class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 981 IsCommutable; 982class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 983 IsCommutable; 984class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 985 IsCommutable; 986class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 987 IsCommutable; 988 989class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 990 IsCommutable; 991class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 992 IsCommutable; 993class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 994 IsCommutable; 995class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 996 IsCommutable; 997 998class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 999class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1000class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1001class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1002 1003class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, MSA128B>; 1004class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, MSA128H>; 1005class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, MSA128W>; 1006class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, MSA128D>; 1007 1008class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1009class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1010class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1011class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1012 1013class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>; 1014 1015class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1016class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1017class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1018class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1019 1020class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1021class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1022class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1023class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1024 1025class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1026 IsCommutable; 1027class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1028 IsCommutable; 1029class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1030 IsCommutable; 1031class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1032 IsCommutable; 1033 1034class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1035 IsCommutable; 1036class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1037 IsCommutable; 1038class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1039 IsCommutable; 1040class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1041 IsCommutable; 1042 1043class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1044 IsCommutable; 1045class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1046 IsCommutable; 1047class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1048 IsCommutable; 1049class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1050 IsCommutable; 1051 1052class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1053 IsCommutable; 1054class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1055 IsCommutable; 1056class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1057 IsCommutable; 1058class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1059 IsCommutable; 1060 1061class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1062class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1063class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1064class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1065 1066class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1067class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1068class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1069class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1070 1071class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1072class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1073class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1074class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1075 1076class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1077 MSA128B>; 1078class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1079 MSA128H>; 1080class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1081 MSA128W>; 1082class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1083 MSA128D>; 1084 1085class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1086class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1087class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1088class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1089 1090class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1091 MSA128B>; 1092class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1093 MSA128H>; 1094class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1095 MSA128W>; 1096class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1097 MSA128D>; 1098 1099class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1100 1101class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1102 1103class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1104 1105class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1106 1107class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1108class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1109class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1110class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1111 1112class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1113class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1114class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1115class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1116 1117class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1118class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1119class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1120class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1121 1122class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1123 1124class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>; 1125 1126class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>; 1127 1128class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1129class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1130class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1131class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1132 1133class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1134class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1135class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1136class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1137 1138class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1139class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1140class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1141class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1142 1143class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1144 1145class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, MSA128B>, 1146 IsCommutable; 1147class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, MSA128H>, 1148 IsCommutable; 1149class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, MSA128W>, 1150 IsCommutable; 1151class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, MSA128D>, 1152 IsCommutable; 1153 1154class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, MSA128B>; 1155class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, MSA128H>; 1156class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, MSA128W>; 1157class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, MSA128D>; 1158 1159class CFCMSA_DESC { 1160 dag OutOperandList = (outs GPR32:$rd); 1161 dag InOperandList = (ins MSACtrl:$cs); 1162 string AsmString = "cfcmsa\t$rd, $cs"; 1163 InstrItinClass Itinerary = NoItinerary; 1164 bit hasSideEffects = 1; 1165} 1166 1167class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, MSA128B>; 1168class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, MSA128H>; 1169class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, MSA128W>; 1170class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, MSA128D>; 1171 1172class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, MSA128B>; 1173class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, MSA128H>; 1174class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, MSA128W>; 1175class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, MSA128D>; 1176 1177class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b, 1178 MSA128B>; 1179class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h, 1180 MSA128H>; 1181class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w, 1182 MSA128W>; 1183class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d, 1184 MSA128D>; 1185 1186class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b, 1187 MSA128B>; 1188class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h, 1189 MSA128H>; 1190class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w, 1191 MSA128W>; 1192class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d, 1193 MSA128D>; 1194 1195class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, MSA128B>; 1196class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, MSA128H>; 1197class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, MSA128W>; 1198class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, MSA128D>; 1199 1200class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, MSA128B>; 1201class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, MSA128H>; 1202class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, MSA128W>; 1203class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, MSA128D>; 1204 1205class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b, 1206 MSA128B>; 1207class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h, 1208 MSA128H>; 1209class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w, 1210 MSA128W>; 1211class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d, 1212 MSA128D>; 1213 1214class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b, 1215 MSA128B>; 1216class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h, 1217 MSA128H>; 1218class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w, 1219 MSA128W>; 1220class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d, 1221 MSA128D>; 1222 1223class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b, 1224 GPR32, MSA128B>; 1225class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h, 1226 GPR32, MSA128H>; 1227class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w, 1228 GPR32, MSA128W>; 1229 1230class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b, 1231 GPR32, MSA128B>; 1232class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h, 1233 GPR32, MSA128H>; 1234class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w, 1235 GPR32, MSA128W>; 1236 1237class CTCMSA_DESC { 1238 dag OutOperandList = (outs); 1239 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1240 string AsmString = "ctcmsa\t$cd, $rs"; 1241 InstrItinClass Itinerary = NoItinerary; 1242 bit hasSideEffects = 1; 1243} 1244 1245class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1246class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1247class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1248class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1249 1250class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1251class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1252class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1253class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1254 1255class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1256 MSA128B, MSA128B>, IsCommutable; 1257class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1258 MSA128H, MSA128H>, IsCommutable; 1259class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1260 MSA128W, MSA128W>, IsCommutable; 1261 1262class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1263 MSA128B, MSA128B>, IsCommutable; 1264class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1265 MSA128H, MSA128H>, IsCommutable; 1266class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1267 MSA128W, MSA128W>, IsCommutable; 1268 1269class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1270 MSA128H, MSA128B, MSA128B>, 1271 IsCommutable; 1272class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1273 MSA128W, MSA128H, MSA128H>, 1274 IsCommutable; 1275class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1276 MSA128D, MSA128W, MSA128W>, 1277 IsCommutable; 1278 1279class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1280 MSA128H, MSA128B, MSA128B>, 1281 IsCommutable; 1282class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1283 MSA128W, MSA128H, MSA128H>, 1284 IsCommutable; 1285class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1286 MSA128D, MSA128W, MSA128W>, 1287 IsCommutable; 1288 1289class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1290 MSA128H, MSA128B, MSA128B>; 1291class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1292 MSA128W, MSA128H, MSA128H>; 1293class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1294 MSA128D, MSA128W, MSA128W>; 1295 1296class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1297 MSA128H, MSA128B, MSA128B>; 1298class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1299 MSA128W, MSA128H, MSA128H>; 1300class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1301 MSA128D, MSA128W, MSA128W>; 1302 1303class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1304class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1305 1306class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1307 IsCommutable; 1308class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1309 IsCommutable; 1310 1311class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w, MSA128W>, 1312 IsCommutable; 1313class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d, MSA128D>, 1314 IsCommutable; 1315 1316class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1317 MSA128W>; 1318class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1319 MSA128D>; 1320 1321class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w, MSA128W>; 1322class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d, MSA128D>; 1323 1324class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w, MSA128W>; 1325class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d, MSA128D>; 1326 1327class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w, MSA128W>, 1328 IsCommutable; 1329class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d, MSA128D>, 1330 IsCommutable; 1331 1332class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", int_mips_fcor_w, MSA128W>, 1333 IsCommutable; 1334class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", int_mips_fcor_d, MSA128D>, 1335 IsCommutable; 1336 1337class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", int_mips_fcueq_w, MSA128W>, 1338 IsCommutable; 1339class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", int_mips_fcueq_d, MSA128D>, 1340 IsCommutable; 1341 1342class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", int_mips_fcule_w, MSA128W>, 1343 IsCommutable; 1344class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", int_mips_fcule_d, MSA128D>, 1345 IsCommutable; 1346 1347class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", int_mips_fcult_w, MSA128W>, 1348 IsCommutable; 1349class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", int_mips_fcult_d, MSA128D>, 1350 IsCommutable; 1351 1352class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w, MSA128W>, 1353 IsCommutable; 1354class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d, MSA128D>, 1355 IsCommutable; 1356 1357class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", int_mips_fcune_w, MSA128W>, 1358 IsCommutable; 1359class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", int_mips_fcune_d, MSA128D>, 1360 IsCommutable; 1361 1362class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1363class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1364 1365class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1366 MSA128H, MSA128W, MSA128W>; 1367class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1368 MSA128W, MSA128D, MSA128D>; 1369 1370class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1371class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1372 1373class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1374 MSA128W, MSA128H>; 1375class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1376 MSA128D, MSA128W>; 1377 1378class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1379 MSA128W, MSA128H>; 1380class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1381 MSA128D, MSA128W>; 1382 1383class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1384 MSA128W>; 1385class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1386 MSA128D>; 1387 1388class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1389 MSA128W>; 1390class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1391 MSA128D>; 1392 1393class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1394 MSA128W, MSA128H>; 1395class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1396 MSA128D, MSA128W>; 1397 1398class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1399 MSA128W, MSA128H>; 1400class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1401 MSA128D, MSA128W>; 1402 1403class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>; 1404class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>; 1405class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>; 1406 1407class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1408class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1409 1410class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1411 MSA128W>; 1412class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1413 MSA128D>; 1414 1415class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1416class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1417 1418class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1419 MSA128W>; 1420class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1421 MSA128D>; 1422 1423class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1424class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1425 1426class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1427 MSA128W>; 1428class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1429 MSA128D>; 1430 1431class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1432 MSA128W>; 1433class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1434 MSA128D>; 1435 1436class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1437class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1438 1439class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1440class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1441 1442class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1443class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1444 1445class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1446 MSA128W>; 1447class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1448 MSA128D>; 1449 1450class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1451class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1452 1453class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1454class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1455 1456class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1457class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1458 1459class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1460class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1461 1462class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1463class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1464 1465class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1466class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1467 1468class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1469class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1470 1471class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1472class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1473 1474class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1475class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1476 1477class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1478class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1479 1480class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1481class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1482 1483class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1484class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1485 1486class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1487class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1488 1489class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1490 MSA128W>; 1491class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1492 MSA128D>; 1493 1494class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1495 MSA128W>; 1496class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1497 MSA128D>; 1498 1499class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1500 MSA128W>; 1501class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1502 MSA128D>; 1503 1504class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1505 MSA128W>; 1506class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1507 MSA128D>; 1508 1509class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1510 MSA128H, MSA128W, MSA128W>; 1511class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1512 MSA128W, MSA128D, MSA128D>; 1513 1514class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1515 MSA128B, MSA128B>; 1516class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1517 MSA128H, MSA128H>; 1518class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1519 MSA128W, MSA128W>; 1520 1521class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1522 MSA128B, MSA128B>; 1523class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1524 MSA128H, MSA128H>; 1525class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1526 MSA128W, MSA128W>; 1527 1528class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1529 MSA128B, MSA128B>; 1530class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1531 MSA128H, MSA128H>; 1532class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1533 MSA128W, MSA128W>; 1534 1535class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1536 MSA128B, MSA128B>; 1537class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1538 MSA128H, MSA128H>; 1539class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1540 MSA128W, MSA128W>; 1541 1542class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1543class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1544class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1545class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1546 1547class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1548class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1549class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1550class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1551 1552class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1553class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1554class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1555class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1556 1557class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1558class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1559class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1560class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1561 1562class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b, 1563 MSA128B, GPR32>; 1564class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h, 1565 MSA128H, GPR32>; 1566class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w, 1567 MSA128W, GPR32>; 1568 1569class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1570class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1571class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1572class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1573 1574class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1575 ValueType TyNode, RegisterClass RCWD, 1576 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1577 InstrItinClass itin = NoItinerary> { 1578 dag OutOperandList = (outs RCWD:$wd); 1579 dag InOperandList = (ins MemOpnd:$addr); 1580 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1581 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1582 InstrItinClass Itinerary = itin; 1583} 1584 1585class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1586class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1587class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1588class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1589 1590class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>; 1591class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>; 1592class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>; 1593class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>; 1594 1595class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1596 ValueType TyNode, RegisterClass RCWD, 1597 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1598 InstrItinClass itin = NoItinerary> { 1599 dag OutOperandList = (outs RCWD:$wd); 1600 dag InOperandList = (ins MemOpnd:$addr); 1601 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1602 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1603 InstrItinClass Itinerary = itin; 1604} 1605 1606class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1607class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1608class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1609class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1610 1611class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1612 MSA128H>; 1613class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1614 MSA128W>; 1615 1616class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1617 MSA128H>; 1618class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1619 MSA128W>; 1620 1621class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1622class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1623class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1624class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1625 1626class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1627class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1628class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1629class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1630 1631class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>; 1632class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>; 1633class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>; 1634class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>; 1635 1636class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>; 1637class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>; 1638class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>; 1639class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>; 1640 1641class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b, MSA128B>; 1642class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h, MSA128H>; 1643class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w, MSA128W>; 1644class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d, MSA128D>; 1645 1646class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b, MSA128B>; 1647class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h, MSA128H>; 1648class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w, MSA128W>; 1649class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d, MSA128D>; 1650 1651class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1652class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1653class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1654class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1655 1656class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>; 1657class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>; 1658class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>; 1659class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>; 1660 1661class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>; 1662class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>; 1663class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>; 1664class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>; 1665 1666class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", int_mips_mini_s_b, MSA128B>; 1667class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", int_mips_mini_s_h, MSA128H>; 1668class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", int_mips_mini_s_w, MSA128W>; 1669class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", int_mips_mini_s_d, MSA128D>; 1670 1671class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", int_mips_mini_u_b, MSA128B>; 1672class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", int_mips_mini_u_h, MSA128H>; 1673class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", int_mips_mini_u_w, MSA128W>; 1674class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", int_mips_mini_u_d, MSA128D>; 1675 1676class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1677class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1678class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1679class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1680 1681class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1682class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1683class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1684class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1685 1686class MOVE_V_DESC { 1687 dag OutOperandList = (outs MSA128B:$wd); 1688 dag InOperandList = (ins MSA128B:$ws); 1689 string AsmString = "move.v\t$wd, $ws"; 1690 list<dag> Pattern = []; 1691 InstrItinClass Itinerary = NoItinerary; 1692} 1693 1694class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 1695 MSA128H>; 1696class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 1697 MSA128W>; 1698 1699class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 1700 MSA128H>; 1701class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 1702 MSA128W>; 1703 1704class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 1705class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 1706class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 1707class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 1708 1709class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 1710class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 1711 1712class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 1713 MSA128H>; 1714class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 1715 MSA128W>; 1716 1717class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 1718class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 1719class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 1720class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 1721 1722class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 1723class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 1724class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 1725class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 1726 1727class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 1728class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 1729class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 1730class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 1731 1732class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", int_mips_nor_v, MSA128B>; 1733 1734class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>; 1735 1736class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 1737class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 1738class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 1739class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 1740 1741class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>; 1742 1743class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 1744class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 1745class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 1746class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 1747 1748class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 1749class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 1750class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 1751class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 1752 1753class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", int_mips_pcnt_b, MSA128B>; 1754class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", int_mips_pcnt_h, MSA128H>; 1755class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", int_mips_pcnt_w, MSA128W>; 1756class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", int_mips_pcnt_d, MSA128D>; 1757 1758class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 1759class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 1760class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 1761class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 1762 1763class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 1764class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 1765class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 1766class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 1767 1768class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>; 1769class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>; 1770class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>; 1771 1772class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 1773class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 1774class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 1775class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 1776 1777class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 1778class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 1779class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 1780class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 1781 1782class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 1783class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 1784class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 1785class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 1786 1787class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b, MSA128B>; 1788class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h, MSA128H>; 1789class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w, MSA128W>; 1790class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d, MSA128D>; 1791 1792class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 1793 MSA128B, GPR32>; 1794class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 1795 MSA128H, GPR32>; 1796class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 1797 MSA128W, GPR32>; 1798class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 1799 MSA128D, GPR32>; 1800 1801class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 1802 MSA128B>; 1803class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 1804 MSA128H>; 1805class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 1806 MSA128W>; 1807class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 1808 MSA128D>; 1809 1810class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 1811class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 1812class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 1813class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 1814 1815class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b, MSA128B>; 1816class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h, MSA128H>; 1817class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w, MSA128W>; 1818class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d, MSA128D>; 1819 1820class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 1821class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 1822class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 1823class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 1824 1825class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 1826class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 1827class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 1828class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 1829 1830class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 1831class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 1832class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 1833class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 1834 1835class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b, MSA128B>; 1836class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h, MSA128H>; 1837class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w, MSA128W>; 1838class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d, MSA128D>; 1839 1840class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 1841class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 1842class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 1843class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 1844 1845class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 1846class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 1847class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 1848class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 1849 1850class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1851 ValueType TyNode, RegisterClass RCWD, 1852 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1853 InstrItinClass itin = NoItinerary> { 1854 dag OutOperandList = (outs); 1855 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 1856 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1857 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 1858 InstrItinClass Itinerary = itin; 1859} 1860 1861class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 1862class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 1863class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 1864class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 1865 1866class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1867 ValueType TyNode, RegisterClass RCWD, 1868 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1869 InstrItinClass itin = NoItinerary> { 1870 dag OutOperandList = (outs); 1871 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 1872 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1873 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 1874 InstrItinClass Itinerary = itin; 1875} 1876 1877class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 1878class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 1879class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 1880class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 1881 1882class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 1883class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 1884class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 1885class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 1886 1887class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 1888class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 1889class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 1890class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 1891 1892class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 1893 MSA128B>; 1894class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 1895 MSA128H>; 1896class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 1897 MSA128W>; 1898class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 1899 MSA128D>; 1900 1901class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 1902 MSA128B>; 1903class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 1904 MSA128H>; 1905class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 1906 MSA128W>; 1907class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 1908 MSA128D>; 1909 1910class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 1911class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 1912class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 1913class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 1914 1915class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", int_mips_subvi_b, MSA128B>; 1916class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", int_mips_subvi_h, MSA128H>; 1917class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", int_mips_subvi_w, MSA128W>; 1918class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", int_mips_subvi_d, MSA128D>; 1919 1920class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>; 1921class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>; 1922class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>; 1923class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>; 1924 1925class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 1926class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 1927class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 1928class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 1929 1930class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>; 1931 1932// Instruction defs. 1933def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 1934def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 1935def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 1936def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 1937 1938def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 1939def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 1940def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 1941def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 1942 1943def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 1944def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 1945def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 1946def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 1947 1948def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 1949def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 1950def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 1951def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 1952 1953def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 1954def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 1955def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 1956def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 1957 1958def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 1959def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 1960def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 1961def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 1962 1963def AND_V : AND_V_ENC, AND_V_DESC; 1964def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 1965 PseudoInstExpansion<(AND_V MSA128B:$wd, 1966 MSA128B:$ws, MSA128B:$wt)>; 1967def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 1968 PseudoInstExpansion<(AND_V MSA128B:$wd, 1969 MSA128B:$ws, MSA128B:$wt)>; 1970def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 1971 PseudoInstExpansion<(AND_V MSA128B:$wd, 1972 MSA128B:$ws, MSA128B:$wt)>; 1973 1974def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 1975 1976def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 1977def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 1978def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 1979def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 1980 1981def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 1982def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 1983def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 1984def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 1985 1986def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 1987def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 1988def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 1989def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 1990 1991def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 1992def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 1993def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 1994def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 1995 1996def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 1997def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 1998def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 1999def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2000 2001def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2002def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2003def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2004def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2005 2006def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2007def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2008def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2009def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2010 2011def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2012def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2013def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2014def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2015 2016def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2017def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2018def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2019def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2020 2021def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2022def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2023def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2024def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2025 2026def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2027def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2028def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2029def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2030 2031def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2032def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2033def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2034def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2035 2036def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2037 2038def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2039 2040def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2041 2042def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2043 2044def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2045def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2046def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2047def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2048 2049def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2050def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2051def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2052def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2053 2054def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2055def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2056def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2057def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2058 2059def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2060 2061def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2062 2063def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2064 2065def BSET_B : BSET_B_ENC, BSET_B_DESC; 2066def BSET_H : BSET_H_ENC, BSET_H_DESC; 2067def BSET_W : BSET_W_ENC, BSET_W_DESC; 2068def BSET_D : BSET_D_ENC, BSET_D_DESC; 2069 2070def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2071def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2072def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2073def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2074 2075def BZ_B : BZ_B_ENC, BZ_B_DESC; 2076def BZ_H : BZ_H_ENC, BZ_H_DESC; 2077def BZ_W : BZ_W_ENC, BZ_W_DESC; 2078def BZ_D : BZ_D_ENC, BZ_D_DESC; 2079 2080def BZ_V : BZ_V_ENC, BZ_V_DESC; 2081 2082def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2083def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2084def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2085def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2086 2087def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2088def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2089def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2090def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2091 2092def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2093 2094def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2095def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2096def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2097def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2098 2099def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2100def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2101def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2102def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2103 2104def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2105def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2106def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2107def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2108 2109def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2110def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2111def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2112def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2113 2114def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2115def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2116def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2117def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2118 2119def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2120def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2121def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2122def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2123 2124def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2125def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2126def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2127def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2128 2129def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2130def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2131def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2132def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2133 2134def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2135def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2136def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2137 2138def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2139def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2140def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2141 2142def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2143 2144def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2145def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2146def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2147def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2148 2149def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2150def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2151def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2152def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2153 2154def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2155def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2156def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2157 2158def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2159def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2160def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2161 2162def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2163def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2164def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2165 2166def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2167def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2168def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2169 2170def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2171def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2172def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2173 2174def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2175def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2176def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2177 2178def FADD_W : FADD_W_ENC, FADD_W_DESC; 2179def FADD_D : FADD_D_ENC, FADD_D_DESC; 2180 2181def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2182def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2183 2184def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2185def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2186 2187def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2188def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2189 2190def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2191def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2192 2193def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2194def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2195 2196def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2197def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2198 2199def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2200def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2201 2202def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2203def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2204 2205def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2206def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2207 2208def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2209def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2210 2211def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2212def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2213 2214def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2215def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2216 2217def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2218def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2219 2220def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2221def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2222 2223def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2224def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2225 2226def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2227def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2228 2229def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2230def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2231 2232def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2233def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2234 2235def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2236def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2237 2238def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2239def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2240 2241def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2242def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2243 2244def FILL_B : FILL_B_ENC, FILL_B_DESC; 2245def FILL_H : FILL_H_ENC, FILL_H_DESC; 2246def FILL_W : FILL_W_ENC, FILL_W_DESC; 2247 2248def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2249def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2250 2251def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2252def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2253 2254def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2255def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2256 2257def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2258def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2259 2260def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2261def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2262 2263def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2264def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2265 2266def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2267def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2268 2269def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2270def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2271 2272def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2273def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2274 2275def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2276def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2277 2278def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2279def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2280 2281def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2282def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2283 2284def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2285def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2286 2287def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2288def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2289 2290def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2291def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2292 2293def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2294def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2295 2296def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2297def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2298 2299def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2300def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2301 2302def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2303def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2304 2305def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2306def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2307 2308def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2309def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2310 2311def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2312def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2313 2314def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2315def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2316 2317def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2318def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2319 2320def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2321def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2322 2323def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2324def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2325 2326def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2327def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2328 2329def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2330def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2331 2332def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2333def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2334 2335def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2336def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2337def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2338 2339def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2340def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2341def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2342 2343def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2344def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2345def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2346 2347def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2348def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2349def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2350 2351def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2352def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2353def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2354def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2355 2356def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2357def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2358def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2359def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2360 2361def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2362def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2363def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2364def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2365 2366def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2367def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2368def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2369def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2370 2371def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2372def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2373def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2374 2375def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2376def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2377def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2378def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2379 2380def LD_B: LD_B_ENC, LD_B_DESC; 2381def LD_H: LD_H_ENC, LD_H_DESC; 2382def LD_W: LD_W_ENC, LD_W_DESC; 2383def LD_D: LD_D_ENC, LD_D_DESC; 2384 2385def LDI_B : LDI_B_ENC, LDI_B_DESC; 2386def LDI_H : LDI_H_ENC, LDI_H_DESC; 2387def LDI_W : LDI_W_ENC, LDI_W_DESC; 2388def LDI_D : LDI_D_ENC, LDI_D_DESC; 2389 2390def LDX_B: LDX_B_ENC, LDX_B_DESC; 2391def LDX_H: LDX_H_ENC, LDX_H_DESC; 2392def LDX_W: LDX_W_ENC, LDX_W_DESC; 2393def LDX_D: LDX_D_ENC, LDX_D_DESC; 2394 2395def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2396def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2397 2398def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2399def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2400 2401def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2402def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2403def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2404def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2405 2406def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2407def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2408def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2409def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2410 2411def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2412def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2413def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2414def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2415 2416def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2417def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2418def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2419def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2420 2421def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2422def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2423def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2424def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2425 2426def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2427def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2428def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2429def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2430 2431def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2432def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2433def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2434def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2435 2436def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2437def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2438def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2439def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2440 2441def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2442def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2443def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2444def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2445 2446def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2447def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2448def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2449def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2450 2451def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2452def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2453def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2454def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2455 2456def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2457def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2458def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2459def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2460 2461def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2462def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2463def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2464def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2465 2466def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2467 2468def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2469def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2470 2471def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2472def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2473 2474def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2475def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2476def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2477def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2478 2479def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2480def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2481 2482def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2483def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2484 2485def MULV_B : MULV_B_ENC, MULV_B_DESC; 2486def MULV_H : MULV_H_ENC, MULV_H_DESC; 2487def MULV_W : MULV_W_ENC, MULV_W_DESC; 2488def MULV_D : MULV_D_ENC, MULV_D_DESC; 2489 2490def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2491def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2492def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2493def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2494 2495def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2496def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2497def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2498def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2499 2500def NOR_V : NOR_V_ENC, NOR_V_DESC; 2501 2502def NORI_B : NORI_B_ENC, NORI_B_DESC; 2503 2504def OR_V : OR_V_ENC, OR_V_DESC; 2505def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2506 PseudoInstExpansion<(OR_V MSA128B:$wd, 2507 MSA128B:$ws, MSA128B:$wt)>; 2508def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2509 PseudoInstExpansion<(OR_V MSA128B:$wd, 2510 MSA128B:$ws, MSA128B:$wt)>; 2511def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2512 PseudoInstExpansion<(OR_V MSA128B:$wd, 2513 MSA128B:$ws, MSA128B:$wt)>; 2514 2515def ORI_B : ORI_B_ENC, ORI_B_DESC; 2516 2517def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2518def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2519def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2520def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2521 2522def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2523def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2524def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2525def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2526 2527def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2528def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2529def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2530def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2531 2532def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2533def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2534def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2535def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2536 2537def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2538def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2539def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2540def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2541 2542def SHF_B : SHF_B_ENC, SHF_B_DESC; 2543def SHF_H : SHF_H_ENC, SHF_H_DESC; 2544def SHF_W : SHF_W_ENC, SHF_W_DESC; 2545 2546def SLD_B : SLD_B_ENC, SLD_B_DESC; 2547def SLD_H : SLD_H_ENC, SLD_H_DESC; 2548def SLD_W : SLD_W_ENC, SLD_W_DESC; 2549def SLD_D : SLD_D_ENC, SLD_D_DESC; 2550 2551def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2552def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2553def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2554def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2555 2556def SLL_B : SLL_B_ENC, SLL_B_DESC; 2557def SLL_H : SLL_H_ENC, SLL_H_DESC; 2558def SLL_W : SLL_W_ENC, SLL_W_DESC; 2559def SLL_D : SLL_D_ENC, SLL_D_DESC; 2560 2561def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2562def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2563def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2564def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2565 2566def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2567def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2568def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2569def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2570 2571def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2572def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2573def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2574def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2575 2576def SRA_B : SRA_B_ENC, SRA_B_DESC; 2577def SRA_H : SRA_H_ENC, SRA_H_DESC; 2578def SRA_W : SRA_W_ENC, SRA_W_DESC; 2579def SRA_D : SRA_D_ENC, SRA_D_DESC; 2580 2581def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2582def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2583def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2584def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2585 2586def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2587def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2588def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2589def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2590 2591def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2592def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2593def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2594def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2595 2596def SRL_B : SRL_B_ENC, SRL_B_DESC; 2597def SRL_H : SRL_H_ENC, SRL_H_DESC; 2598def SRL_W : SRL_W_ENC, SRL_W_DESC; 2599def SRL_D : SRL_D_ENC, SRL_D_DESC; 2600 2601def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2602def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2603def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2604def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2605 2606def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2607def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2608def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2609def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2610 2611def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2612def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2613def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2614def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2615 2616def ST_B: ST_B_ENC, ST_B_DESC; 2617def ST_H: ST_H_ENC, ST_H_DESC; 2618def ST_W: ST_W_ENC, ST_W_DESC; 2619def ST_D: ST_D_ENC, ST_D_DESC; 2620 2621def STX_B: STX_B_ENC, STX_B_DESC; 2622def STX_H: STX_H_ENC, STX_H_DESC; 2623def STX_W: STX_W_ENC, STX_W_DESC; 2624def STX_D: STX_D_ENC, STX_D_DESC; 2625 2626def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2627def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2628def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2629def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2630 2631def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2632def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2633def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2634def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2635 2636def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2637def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2638def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2639def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2640 2641def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2642def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2643def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2644def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2645 2646def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2647def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2648def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2649def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2650 2651def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 2652def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 2653def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 2654def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 2655 2656def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 2657def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 2658def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 2659def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 2660 2661def XOR_V : XOR_V_ENC, XOR_V_DESC; 2662def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 2663 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2664 MSA128B:$ws, MSA128B:$wt)>; 2665def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 2666 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2667 MSA128B:$ws, MSA128B:$wt)>; 2668def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 2669 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2670 MSA128B:$ws, MSA128B:$wt)>; 2671 2672def XORI_B : XORI_B_ENC, XORI_B_DESC; 2673 2674// Patterns. 2675class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 2676 Pat<pattern, result>, Requires<pred>; 2677 2678def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 2679def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 2680def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 2681def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 2682def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 2683def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 2684def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 2685 2686def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 2687def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 2688def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 2689 2690def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 2691 (ST_B MSA128B:$ws, addr:$addr)>; 2692def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 2693 (ST_H MSA128H:$ws, addr:$addr)>; 2694def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 2695 (ST_W MSA128W:$ws, addr:$addr)>; 2696def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 2697 (ST_D MSA128D:$ws, addr:$addr)>; 2698def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 2699 (ST_H MSA128H:$ws, addr:$addr)>; 2700def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 2701 (ST_W MSA128W:$ws, addr:$addr)>; 2702def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 2703 (ST_D MSA128D:$ws, addr:$addr)>; 2704 2705def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 2706 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 2707def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 2708 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 2709def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 2710 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 2711 2712class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 2713 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 2714 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2715 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 2716 2717// These are endian-independant because the element size doesnt change 2718def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 2719def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 2720def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 2721def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 2722def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 2723def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 2724 2725// Little endian bitcasts are always no-ops 2726def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 2727def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 2728def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 2729def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 2730def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 2731def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 2732 2733def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 2734def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 2735def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 2736def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 2737def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 2738 2739def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 2740def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 2741def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 2742def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 2743def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 2744 2745def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 2746def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 2747def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 2748def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 2749def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 2750 2751def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 2752def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 2753def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 2754def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 2755def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 2756 2757def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 2758def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 2759def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 2760def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 2761def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 2762 2763// Big endian bitcasts expand to shuffle instructions. 2764// This is because bitcast is defined to be a store/load sequence and the 2765// vector store/load instructions are mixed-endian with respect to the vector 2766// as a whole (little endian with respect to element order, but big endian 2767// elements). 2768 2769class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 2770 RegisterClass DstRC, MSAInst Insn, 2771 RegisterClass ViaRC> : 2772 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2773 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 2774 DstRC), 2775 [HasMSA, IsBE]>; 2776 2777class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 2778 RegisterClass DstRC, MSAInst Insn, 2779 RegisterClass ViaRC> : 2780 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2781 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 2782 DstRC), 2783 [HasMSA, IsBE]>; 2784 2785class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 2786 RegisterClass DstRC> : 2787 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2788 2789class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 2790 RegisterClass DstRC> : 2791 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2792 2793class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 2794 RegisterClass DstRC> : 2795 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2796 (COPY_TO_REGCLASS 2797 (SHF_W 2798 (COPY_TO_REGCLASS 2799 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 2800 MSA128W), 177), 2801 DstRC), 2802 [HasMSA, IsBE]>; 2803 2804class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 2805 RegisterClass DstRC> : 2806 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 2807 2808class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 2809 RegisterClass DstRC> : 2810 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 2811 2812class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 2813 RegisterClass DstRC> : 2814 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 2815 2816def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 2817def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 2818def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 2819def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 2820def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 2821def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 2822 2823def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 2824def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 2825def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 2826def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 2827def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 2828 2829def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 2830def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 2831def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 2832def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 2833def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 2834 2835def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 2836def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 2837def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 2838def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 2839def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 2840 2841def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 2842def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 2843def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 2844def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 2845def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 2846 2847def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 2848def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 2849def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 2850def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 2851def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 2852 2853def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 2854def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 2855def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 2856def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 2857def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 2858 2859// Pseudos used to implement BNZ.df, and BZ.df 2860 2861class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 2862 RegisterClass RCWS, 2863 InstrItinClass itin = NoItinerary> : 2864 MipsPseudo<(outs GPR32:$dst), 2865 (ins RCWS:$ws), 2866 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 2867 bit usesCustomInserter = 1; 2868} 2869 2870def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 2871 MSA128B, NoItinerary>; 2872def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 2873 MSA128H, NoItinerary>; 2874def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 2875 MSA128W, NoItinerary>; 2876def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 2877 MSA128D, NoItinerary>; 2878def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 2879 MSA128B, NoItinerary>; 2880 2881def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 2882 MSA128B, NoItinerary>; 2883def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 2884 MSA128H, NoItinerary>; 2885def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 2886 MSA128W, NoItinerary>; 2887def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 2888 MSA128D, NoItinerary>; 2889def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 2890 MSA128B, NoItinerary>; 2891