MipsMSAInstrInfo.td revision 52244da7f2b3def646900520668b859343b84a33
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm2 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm3 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm4 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def uimm8 : Operand<i32> { 77 let PrintMethod = "printUnsignedImm"; 78} 79 80def simm5 : Operand<i32>; 81 82def simm10 : Operand<i32>; 83 84def vsplat_uimm1 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm2 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm8"; 90} 91 92def vsplat_uimm3 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm4 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm5 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm6 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_uimm8 : Operand<vAny> { 109 let PrintMethod = "printUnsignedImm"; 110} 111 112def vsplat_simm5 : Operand<vAny>; 113 114def vsplat_simm10 : Operand<vAny>; 115 116def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>; 117 118// Pattern fragments 119def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 120 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 121def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 122 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 123def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 124 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 125 126def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 127 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 128def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 129 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 130def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 131 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 132 133def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 134 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 135def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 136 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 137def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 138 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 139 140class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 141 PatFrag<(ops node:$lhs, node:$rhs), 142 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 143 144// ISD::SETFALSE cannot occur 145def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 146def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 147def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 148def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 149def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 150def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 151def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 152def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 153def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 154def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 155def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 156def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 157def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 158def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 159def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 160def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 161def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 162def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 163def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 164def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 165def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 166def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 167def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 168def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 169def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 170def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 171def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 172def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 173// ISD::SETTRUE cannot occur 174// ISD::SETFALSE2 cannot occur 175// ISD::SETTRUE2 cannot occur 176 177class vsetcc_type<ValueType ResTy, CondCode CC> : 178 PatFrag<(ops node:$lhs, node:$rhs), 179 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 180 181def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 182def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 183def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 184def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 185def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 186def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 187def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 188def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 189def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 190def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 191def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 192def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 193def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 194def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 195def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 196def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 197def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 198def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 199def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 200def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 201 202def vsplati8 : PatFrag<(ops node:$e0), 203 (v16i8 (build_vector node:$e0, node:$e0, 204 node:$e0, node:$e0, 205 node:$e0, node:$e0, 206 node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0, 210 node:$e0, node:$e0))>; 211def vsplati16 : PatFrag<(ops node:$e0), 212 (v8i16 (build_vector node:$e0, node:$e0, 213 node:$e0, node:$e0, 214 node:$e0, node:$e0, 215 node:$e0, node:$e0))>; 216def vsplati32 : PatFrag<(ops node:$e0), 217 (v4i32 (build_vector node:$e0, node:$e0, 218 node:$e0, node:$e0))>; 219def vsplati64 : PatFrag<(ops node:$e0), 220 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 221def vsplatf32 : PatFrag<(ops node:$e0), 222 (v4f32 (build_vector node:$e0, node:$e0, 223 node:$e0, node:$e0))>; 224def vsplatf64 : PatFrag<(ops node:$e0), 225 (v2f64 (build_vector node:$e0, node:$e0))>; 226 227class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 228 SDNodeXForm xform = NOOP_SDNodeXForm> 229 : PatLeaf<frag, pred, xform> { 230 Operand OpClass = opclass; 231} 232 233class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 234 list<SDNode> roots = [], 235 list<SDNodeProperty> props = []> : 236 ComplexPattern<ty, numops, fn, roots, props> { 237 Operand OpClass = opclass; 238} 239 240def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 241 "selectVSplatUimm3", 242 [build_vector, bitconvert]>; 243 244def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 245 "selectVSplatUimm4", 246 [build_vector, bitconvert]>; 247 248def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 249 "selectVSplatUimm5", 250 [build_vector, bitconvert]>; 251 252def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 253 "selectVSplatUimm8", 254 [build_vector, bitconvert]>; 255 256def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 257 "selectVSplatSimm5", 258 [build_vector, bitconvert]>; 259 260def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 261 "selectVSplatUimm3", 262 [build_vector, bitconvert]>; 263 264def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 265 "selectVSplatUimm4", 266 [build_vector, bitconvert]>; 267 268def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 269 "selectVSplatUimm5", 270 [build_vector, bitconvert]>; 271 272def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 273 "selectVSplatSimm5", 274 [build_vector, bitconvert]>; 275 276def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 277 "selectVSplatUimm2", 278 [build_vector, bitconvert]>; 279 280def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 281 "selectVSplatUimm5", 282 [build_vector, bitconvert]>; 283 284def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 285 "selectVSplatSimm5", 286 [build_vector, bitconvert]>; 287 288def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 289 "selectVSplatUimm1", 290 [build_vector, bitconvert]>; 291 292def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 293 "selectVSplatUimm5", 294 [build_vector, bitconvert]>; 295 296def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 297 "selectVSplatUimm6", 298 [build_vector, bitconvert]>; 299 300def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 301 "selectVSplatSimm5", 302 [build_vector, bitconvert]>; 303 304// Any build_vector that is a constant splat with a value that is an exact 305// power of 2 306def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 307 [build_vector, bitconvert]>; 308 309def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 310 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 311 312def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 313 (add node:$wd, (mul node:$ws, node:$wt))>; 314 315def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 316 (sub node:$wd, (mul node:$ws, node:$wt))>; 317 318// Immediates 319def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 320def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 321 322// Instruction encoding. 323class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 324class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 325class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 326class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 327 328class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 329class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 330class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 331class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 332 333class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 334class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 335class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 336class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 337 338class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 339class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 340class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 341class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 342 343class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 344class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 345class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 346class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 347 348class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 349class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 350class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 351class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 352 353class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 354 355class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 356 357class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 358class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 359class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 360class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 361 362class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 363class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 364class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 365class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 366 367class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 368class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 369class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 370class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 371 372class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 373class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 374class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 375class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 376 377class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 378class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 379class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 380class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 381 382class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 383class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 384class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 385class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 386 387class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 388class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 389class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 390class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 391 392class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 393class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 394class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 395class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 396 397class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 398class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 399class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 400class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 401 402class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 403class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 404class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 405class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 406 407class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 408class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 409class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 410class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 411 412class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 413class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 414class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 415class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 416 417class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 418 419class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 420 421class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 422 423class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 424 425class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 426class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 427class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 428class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 429 430class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 431class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 432class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 433class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 434 435class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 436class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 437class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 438class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 439 440class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 441 442class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 443 444class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 445 446class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 447class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 448class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 449class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 450 451class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 452class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 453class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 454class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 455 456class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 457class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 458class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 459class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 460 461class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 462 463class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 464class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 465class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 466class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 467 468class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 469class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 470class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 471class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 472 473class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 474 475class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 476class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 477class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 478class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 479 480class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 481class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 482class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 483class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 484 485class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 486class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 487class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 488class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 489 490class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 491class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 492class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 493class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 494 495class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 496class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 497class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 498class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 499 500class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 501class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 502class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 503class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 504 505class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 506class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 507class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 508class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 509 510class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 511class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 512class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 513class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 514 515class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 516class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 517class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 518 519class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 520class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 521class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 522 523class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 524 525class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 526class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 527class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 528class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 529 530class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 531class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 532class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 533class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 534 535class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 536class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 537class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 538 539class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 540class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 541class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 542 543class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 544class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 545class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 546 547class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 548class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 549class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 550 551class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 552class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 553class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 554 555class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 556class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 557class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 558 559class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 560class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 561 562class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 563class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 564 565class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 566class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 567 568class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 569class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 570 571class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 572class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 573 574class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 575class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 576 577class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 578class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 579 580class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 581class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 582 583class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 584class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 585 586class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 587class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 588 589class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 590class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 591 592class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 593class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 594 595class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 596class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 597 598class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 599class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 600 601class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 602class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 603 604class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 605class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 606 607class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 608class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 609 610class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 611class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 612 613class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 614class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 615 616class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 617class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 618 619class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 620class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 621 622class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 623class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 624 625class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 626class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 627class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 628 629class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 630class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 631 632class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 633class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 634 635class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 636class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 637 638class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 639class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 640 641class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 642class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 643 644class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 645class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 646 647class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 648class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 649 650class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 651class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 652 653class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 654class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 655 656class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 657class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 658 659class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 660class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 661 662class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 663class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 664 665class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 666class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 667 668class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 669class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 670 671class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 672class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 673 674class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 675class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 676 677class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 678class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 679 680class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 681class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 682 683class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 684class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 685 686class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 687class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 688 689class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 690class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 691 692class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 693class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 694 695class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 696class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 697 698class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 699class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 700 701class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 702class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 703 704class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 705class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 706 707class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 708class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 709 710class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 711class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 712 713class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 714class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 715 716class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 717class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 718class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 719 720class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 721class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 722class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 723 724class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 725class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 726class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 727 728class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 729class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 730class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 731 732class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 733class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 734class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 735class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 736 737class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 738class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 739class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 740class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 741 742class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 743class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 744class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 745class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 746 747class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 748class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 749class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 750class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 751 752class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 753class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 754class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 755 756class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 757class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 758class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 759class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 760 761class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 762class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 763class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 764class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 765 766class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 767class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 768class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 769class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 770 771class LSA_ENC : SPECIAL_LSA_FMT; 772 773class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 774class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 775 776class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 777class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 778 779class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 780class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 781class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 782class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 783 784class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 785class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 786class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 787class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 788 789class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 790class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 791class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 792class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 793 794class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 795class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 796class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 797class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 798 799class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 800class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 801class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 802class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 803 804class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 805class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 806class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 807class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 808 809class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 810class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 811class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 812class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 813 814class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 815class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 816class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 817class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 818 819class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 820class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 821class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 822class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 823 824class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 825class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 826class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 827class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 828 829class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 830class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 831class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 832class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 833 834class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 835class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 836class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 837class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 838 839class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 840class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 841class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 842class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 843 844class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 845 846class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 847class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 848 849class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 850class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 851 852class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 853class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 854class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 855class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 856 857class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 858class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 859 860class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 861class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 862 863class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 864class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 865class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 866class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 867 868class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 869class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 870class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 871class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 872 873class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 874class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 875class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 876class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 877 878class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 879 880class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 881 882class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 883 884class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 885 886class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 887class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 888class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 889class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 890 891class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 892class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 893class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 894class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 895 896class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 897class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 898class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 899class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 900 901class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 902class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 903class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 904class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 905 906class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 907class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 908class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 909class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 910 911class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 912class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 913class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 914 915class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 916class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 917class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 918class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 919 920class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 921class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 922class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 923class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 924 925class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 926class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 927class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 928class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 929 930class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 931class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 932class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 933class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 934 935class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 936class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 937class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 938class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 939 940class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 941class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 942class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 943class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 944 945class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 946class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 947class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 948class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 949 950class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 951class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 952class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 953class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 954 955class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 956class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 957class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 958class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 959 960class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 961class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 962class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 963class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 964 965class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 966class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 967class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 968class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 969 970class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 971class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 972class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 973class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 974 975class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 976class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 977class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 978class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 979 980class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 981class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 982class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 983class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 984 985class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 986class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 987class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 988class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 989 990class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 991class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 992class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 993class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 994 995class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 996class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 997class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 998class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 999 1000class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 1001class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 1002class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1003class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1004 1005class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1006class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1007class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1008class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1009 1010class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1011class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1012class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1013class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1014 1015class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1016class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1017class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1018class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1019 1020class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1021class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1022class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1023class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1024 1025class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1026 1027class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1028 1029// Instruction desc. 1030class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1031 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1032 InstrItinClass itin = NoItinerary> { 1033 dag OutOperandList = (outs ROWD:$wd); 1034 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1035 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1036 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1037 InstrItinClass Itinerary = itin; 1038} 1039 1040class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1041 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1042 InstrItinClass itin = NoItinerary> { 1043 dag OutOperandList = (outs ROWD:$wd); 1044 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1045 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1046 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1047 InstrItinClass Itinerary = itin; 1048} 1049 1050class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1051 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1052 InstrItinClass itin = NoItinerary> { 1053 dag OutOperandList = (outs ROWD:$wd); 1054 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1055 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1056 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1057 InstrItinClass Itinerary = itin; 1058} 1059 1060class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1061 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1062 InstrItinClass itin = NoItinerary> { 1063 dag OutOperandList = (outs ROWD:$wd); 1064 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1065 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1066 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1067 InstrItinClass Itinerary = itin; 1068} 1069 1070class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1071 SplatComplexPattern SplatImm, 1072 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1073 InstrItinClass itin = NoItinerary> { 1074 dag OutOperandList = (outs ROWD:$wd); 1075 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1076 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1077 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1078 InstrItinClass Itinerary = itin; 1079} 1080 1081class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1082 ValueType VecTy, RegisterOperand ROD, 1083 RegisterOperand ROWS, 1084 InstrItinClass itin = NoItinerary> { 1085 dag OutOperandList = (outs ROD:$rd); 1086 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1087 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1088 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1089 InstrItinClass Itinerary = itin; 1090} 1091 1092class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1093 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1094 InstrItinClass itin = NoItinerary> { 1095 dag OutOperandList = (outs ROWD:$wd); 1096 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1097 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1098 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1099 InstrItinClass Itinerary = itin; 1100} 1101 1102class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1103 RegisterClass RCD, RegisterClass RCWS> : 1104 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1105 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1106 bit usesCustomInserter = 1; 1107} 1108 1109class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1110 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1111 RegisterOperand ROWS = ROWD, 1112 InstrItinClass itin = NoItinerary> { 1113 dag OutOperandList = (outs ROWD:$wd); 1114 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1115 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1116 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1117 InstrItinClass Itinerary = itin; 1118} 1119 1120class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1121 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1122 RegisterOperand ROWS = ROWD, 1123 InstrItinClass itin = NoItinerary> { 1124 dag OutOperandList = (outs ROWD:$wd); 1125 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1126 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1127 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1128 InstrItinClass Itinerary = itin; 1129} 1130 1131// This class is deprecated and will be removed in the next few patches 1132class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1133 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1134 InstrItinClass itin = NoItinerary> { 1135 dag OutOperandList = (outs ROWD:$wd); 1136 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1137 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1138 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1139 InstrItinClass Itinerary = itin; 1140} 1141 1142class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1143 RegisterOperand ROWS = ROWD, 1144 InstrItinClass itin = NoItinerary> { 1145 dag OutOperandList = (outs ROWD:$wd); 1146 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1147 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1148 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1149 InstrItinClass Itinerary = itin; 1150} 1151 1152class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1153 InstrItinClass itin = NoItinerary> { 1154 dag OutOperandList = (outs RCWD:$wd); 1155 dag InOperandList = (ins vsplat_simm10:$i10); 1156 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1157 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1158 list<dag> Pattern = []; 1159 bit hasSideEffects = 0; 1160 InstrItinClass Itinerary = itin; 1161} 1162 1163class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1164 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1165 InstrItinClass itin = NoItinerary> { 1166 dag OutOperandList = (outs ROWD:$wd); 1167 dag InOperandList = (ins ROWS:$ws); 1168 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1169 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1170 InstrItinClass Itinerary = itin; 1171} 1172 1173class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1174 SDPatternOperator OpNode, RegisterOperand ROWD, 1175 RegisterOperand ROS = ROWD, 1176 InstrItinClass itin = NoItinerary> { 1177 dag OutOperandList = (outs ROWD:$wd); 1178 dag InOperandList = (ins ROS:$rs); 1179 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1180 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1181 InstrItinClass Itinerary = itin; 1182} 1183 1184class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1185 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1186 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1187 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1188 let usesCustomInserter = 1; 1189} 1190 1191class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1192 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1193 InstrItinClass itin = NoItinerary> { 1194 dag OutOperandList = (outs ROWD:$wd); 1195 dag InOperandList = (ins ROWS:$ws); 1196 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1197 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1198 InstrItinClass Itinerary = itin; 1199} 1200 1201class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1202 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1203 RegisterOperand ROWT = ROWD, 1204 InstrItinClass itin = NoItinerary> { 1205 dag OutOperandList = (outs ROWD:$wd); 1206 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1207 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1208 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1209 InstrItinClass Itinerary = itin; 1210} 1211 1212class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1213 RegisterOperand ROWS = ROWD, 1214 RegisterOperand ROWT = ROWD, 1215 InstrItinClass itin = NoItinerary> { 1216 dag OutOperandList = (outs ROWD:$wd); 1217 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1218 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1219 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1220 ROWT:$wt))]; 1221 string Constraints = "$wd = $wd_in"; 1222 InstrItinClass Itinerary = itin; 1223} 1224 1225class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1226 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1227 RegisterOperand ROWT = ROWD, 1228 InstrItinClass itin = NoItinerary> { 1229 dag OutOperandList = (outs ROWD:$wd); 1230 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1231 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1232 list<dag> Pattern = [(set ROWD:$wd, 1233 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1234 InstrItinClass Itinerary = itin; 1235 string Constraints = "$wd = $wd_in"; 1236} 1237 1238class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1239 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1240 RegisterOperand ROWT = ROWD, 1241 InstrItinClass itin = NoItinerary> : 1242 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1243 1244class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1245 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1246 RegisterOperand ROWT = ROWD, 1247 InstrItinClass itin = NoItinerary> : 1248 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1249 1250class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1251 dag OutOperandList = (outs); 1252 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1253 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1254 list<dag> Pattern = []; 1255 InstrItinClass Itinerary = IIBranch; 1256 bit isBranch = 1; 1257 bit isTerminator = 1; 1258 bit hasDelaySlot = 1; 1259 list<Register> Defs = [AT]; 1260} 1261 1262class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1263 RegisterOperand ROWD, RegisterOperand ROS, 1264 InstrItinClass itin = NoItinerary> { 1265 dag OutOperandList = (outs ROWD:$wd); 1266 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1267 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1268 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1269 ROS:$rs, 1270 immZExt6:$n))]; 1271 InstrItinClass Itinerary = itin; 1272 string Constraints = "$wd = $wd_in"; 1273} 1274 1275class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1276 RegisterOperand ROWD, RegisterOperand ROFS> : 1277 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1278 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1279 immZExt6:$n))]> { 1280 bit usesCustomInserter = 1; 1281 string Constraints = "$wd = $wd_in"; 1282} 1283 1284class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1285 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1286 InstrItinClass itin = NoItinerary> { 1287 dag OutOperandList = (outs ROWD:$wd); 1288 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1289 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1290 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1291 immZExt6:$n, 1292 ROWS:$ws))]; 1293 InstrItinClass Itinerary = itin; 1294 string Constraints = "$wd = $wd_in"; 1295} 1296 1297class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1298 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1299 RegisterOperand ROWT = ROWD, 1300 InstrItinClass itin = NoItinerary> { 1301 dag OutOperandList = (outs ROWD:$wd); 1302 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1303 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1304 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1305 InstrItinClass Itinerary = itin; 1306} 1307 1308class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1309 RegisterOperand ROWD, 1310 RegisterOperand ROWS = ROWD, 1311 InstrItinClass itin = NoItinerary> { 1312 dag OutOperandList = (outs ROWD:$wd); 1313 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1314 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1315 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1316 ROWS:$ws))]; 1317 InstrItinClass Itinerary = itin; 1318} 1319 1320class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1321 RegisterOperand ROWS = ROWD, 1322 RegisterOperand ROWT = ROWD> : 1323 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1324 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1325 1326class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1327 IsCommutable; 1328class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1329 IsCommutable; 1330class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1331 IsCommutable; 1332class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1333 IsCommutable; 1334 1335class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1336 MSA128BOpnd>, IsCommutable; 1337class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1338 MSA128HOpnd>, IsCommutable; 1339class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1340 MSA128WOpnd>, IsCommutable; 1341class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1342 MSA128DOpnd>, IsCommutable; 1343 1344class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1345 MSA128BOpnd>, IsCommutable; 1346class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1347 MSA128HOpnd>, IsCommutable; 1348class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1349 MSA128WOpnd>, IsCommutable; 1350class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1351 MSA128DOpnd>, IsCommutable; 1352 1353class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1354 MSA128BOpnd>, IsCommutable; 1355class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1356 MSA128HOpnd>, IsCommutable; 1357class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1358 MSA128WOpnd>, IsCommutable; 1359class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1360 MSA128DOpnd>, IsCommutable; 1361 1362class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1363class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1364class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1365class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1366 1367class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1368 MSA128BOpnd>; 1369class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1370 MSA128HOpnd>; 1371class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1372 MSA128WOpnd>; 1373class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1374 MSA128DOpnd>; 1375 1376class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1377class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1378class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1379class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1380 1381class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1382 MSA128BOpnd>; 1383 1384class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1385 MSA128BOpnd>; 1386class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1387 MSA128HOpnd>; 1388class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1389 MSA128WOpnd>; 1390class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1391 MSA128DOpnd>; 1392 1393class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1394 MSA128BOpnd>; 1395class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1396 MSA128HOpnd>; 1397class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1398 MSA128WOpnd>; 1399class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1400 MSA128DOpnd>; 1401 1402class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1403 IsCommutable; 1404class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1405 IsCommutable; 1406class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1407 IsCommutable; 1408class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1409 IsCommutable; 1410 1411class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1412 IsCommutable; 1413class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1414 IsCommutable; 1415class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1416 IsCommutable; 1417class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1418 IsCommutable; 1419 1420class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1421 MSA128BOpnd>, IsCommutable; 1422class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1423 MSA128HOpnd>, IsCommutable; 1424class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1425 MSA128WOpnd>, IsCommutable; 1426class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1427 MSA128DOpnd>, IsCommutable; 1428 1429class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1430 MSA128BOpnd>, IsCommutable; 1431class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1432 MSA128HOpnd>, IsCommutable; 1433class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1434 MSA128WOpnd>, IsCommutable; 1435class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1436 MSA128DOpnd>, IsCommutable; 1437 1438class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1439class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1440class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1441class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1442 1443class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1444 MSA128BOpnd>; 1445class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1446 MSA128HOpnd>; 1447class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1448 MSA128WOpnd>; 1449class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1450 MSA128DOpnd>; 1451 1452class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1453class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1454class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1455class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1456 1457class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1458 MSA128BOpnd>; 1459class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1460 MSA128HOpnd>; 1461class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1462 MSA128WOpnd>; 1463class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1464 MSA128DOpnd>; 1465 1466class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1467class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1468class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1469class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1470 1471class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1472 MSA128BOpnd>; 1473class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1474 MSA128HOpnd>; 1475class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1476 MSA128WOpnd>; 1477class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1478 MSA128DOpnd>; 1479 1480class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1481 1482class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1483 MSA128BOpnd>; 1484 1485class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1486 1487class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1488 1489class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1490class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1491class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1492class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1493 1494class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1495 MSA128BOpnd>; 1496class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1497 MSA128HOpnd>; 1498class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1499 MSA128WOpnd>; 1500class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1501 MSA128DOpnd>; 1502 1503class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1504class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1505class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1506class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1507 1508class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1509 1510class BSEL_V_DESC { 1511 dag OutOperandList = (outs MSA128BOpnd:$wd); 1512 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1513 MSA128BOpnd:$wt); 1514 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1515 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1516 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1517 MSA128BOpnd:$wt))]; 1518 InstrItinClass Itinerary = NoItinerary; 1519 string Constraints = "$wd = $wd_in"; 1520} 1521 1522class BSELI_B_DESC { 1523 dag OutOperandList = (outs MSA128BOpnd:$wd); 1524 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1525 vsplat_uimm8:$u8); 1526 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1527 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1528 MSA128BOpnd:$ws, 1529 vsplati8_uimm8:$u8))]; 1530 InstrItinClass Itinerary = NoItinerary; 1531 string Constraints = "$wd = $wd_in"; 1532} 1533 1534class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1535class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1536class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1537class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1538 1539class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1540 MSA128BOpnd>; 1541class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1542 MSA128HOpnd>; 1543class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1544 MSA128WOpnd>; 1545class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1546 MSA128DOpnd>; 1547 1548class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1549class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1550class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1551class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1552 1553class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1554 1555class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1556 IsCommutable; 1557class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1558 IsCommutable; 1559class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1560 IsCommutable; 1561class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1562 IsCommutable; 1563 1564class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1565 MSA128BOpnd>; 1566class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1567 MSA128HOpnd>; 1568class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1569 MSA128WOpnd>; 1570class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1571 MSA128DOpnd>; 1572 1573class CFCMSA_DESC { 1574 dag OutOperandList = (outs GPR32:$rd); 1575 dag InOperandList = (ins MSACtrl:$cs); 1576 string AsmString = "cfcmsa\t$rd, $cs"; 1577 InstrItinClass Itinerary = NoItinerary; 1578 bit hasSideEffects = 1; 1579} 1580 1581class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1582class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1583class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1584class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1585 1586class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1587class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1588class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1589class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1590 1591class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1592 vsplati8_simm5, MSA128BOpnd>; 1593class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1594 vsplati16_simm5, MSA128HOpnd>; 1595class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1596 vsplati32_simm5, MSA128WOpnd>; 1597class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1598 vsplati64_simm5, MSA128DOpnd>; 1599 1600class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1601 vsplati8_uimm5, MSA128BOpnd>; 1602class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1603 vsplati16_uimm5, MSA128HOpnd>; 1604class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1605 vsplati32_uimm5, MSA128WOpnd>; 1606class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1607 vsplati64_uimm5, MSA128DOpnd>; 1608 1609class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1610class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1611class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1612class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1613 1614class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1615class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1616class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1617class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1618 1619class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1620 vsplati8_simm5, MSA128BOpnd>; 1621class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1622 vsplati16_simm5, MSA128HOpnd>; 1623class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1624 vsplati32_simm5, MSA128WOpnd>; 1625class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1626 vsplati64_simm5, MSA128DOpnd>; 1627 1628class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1629 vsplati8_uimm5, MSA128BOpnd>; 1630class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1631 vsplati16_uimm5, MSA128HOpnd>; 1632class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1633 vsplati32_uimm5, MSA128WOpnd>; 1634class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1635 vsplati64_uimm5, MSA128DOpnd>; 1636 1637class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1638 GPR32Opnd, MSA128BOpnd>; 1639class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1640 GPR32Opnd, MSA128HOpnd>; 1641class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1642 GPR32Opnd, MSA128WOpnd>; 1643 1644class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1645 GPR32Opnd, MSA128BOpnd>; 1646class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1647 GPR32Opnd, MSA128HOpnd>; 1648class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1649 GPR32Opnd, MSA128WOpnd>; 1650 1651class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1652 MSA128W>; 1653class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1654 MSA128D>; 1655 1656class CTCMSA_DESC { 1657 dag OutOperandList = (outs); 1658 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1659 string AsmString = "ctcmsa\t$cd, $rs"; 1660 InstrItinClass Itinerary = NoItinerary; 1661 bit hasSideEffects = 1; 1662} 1663 1664class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1665class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1666class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1667class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1668 1669class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1670class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1671class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1672class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1673 1674class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1675 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1676 IsCommutable; 1677class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1678 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1679 IsCommutable; 1680class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1681 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1682 IsCommutable; 1683 1684class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1685 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1686 IsCommutable; 1687class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1688 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1689 IsCommutable; 1690class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1691 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1692 IsCommutable; 1693 1694class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1695 MSA128HOpnd, MSA128BOpnd, 1696 MSA128BOpnd>, IsCommutable; 1697class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1698 MSA128WOpnd, MSA128HOpnd, 1699 MSA128HOpnd>, IsCommutable; 1700class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1701 MSA128DOpnd, MSA128WOpnd, 1702 MSA128WOpnd>, IsCommutable; 1703 1704class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1705 MSA128HOpnd, MSA128BOpnd, 1706 MSA128BOpnd>, IsCommutable; 1707class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1708 MSA128WOpnd, MSA128HOpnd, 1709 MSA128HOpnd>, IsCommutable; 1710class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1711 MSA128DOpnd, MSA128WOpnd, 1712 MSA128WOpnd>, IsCommutable; 1713 1714class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1715 MSA128HOpnd, MSA128BOpnd, 1716 MSA128BOpnd>; 1717class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1718 MSA128WOpnd, MSA128HOpnd, 1719 MSA128HOpnd>; 1720class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1721 MSA128DOpnd, MSA128WOpnd, 1722 MSA128WOpnd>; 1723 1724class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1725 MSA128HOpnd, MSA128BOpnd, 1726 MSA128BOpnd>; 1727class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1728 MSA128WOpnd, MSA128HOpnd, 1729 MSA128HOpnd>; 1730class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1731 MSA128DOpnd, MSA128WOpnd, 1732 MSA128WOpnd>; 1733 1734class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1735 IsCommutable; 1736class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1737 IsCommutable; 1738 1739class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1740 IsCommutable; 1741class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1742 IsCommutable; 1743 1744class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1745 IsCommutable; 1746class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1747 IsCommutable; 1748 1749class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1750 MSA128WOpnd>; 1751class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1752 MSA128DOpnd>; 1753 1754class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1755class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1756 1757class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1758class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1759 1760class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1761 IsCommutable; 1762class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1763 IsCommutable; 1764 1765class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1766 IsCommutable; 1767class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1768 IsCommutable; 1769 1770class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1771 IsCommutable; 1772class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1773 IsCommutable; 1774 1775class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1776 IsCommutable; 1777class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1778 IsCommutable; 1779 1780class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1781 IsCommutable; 1782class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1783 IsCommutable; 1784 1785class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1786 IsCommutable; 1787class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1788 IsCommutable; 1789 1790class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1791 IsCommutable; 1792class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1793 IsCommutable; 1794 1795class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1796class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1797 1798class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1799 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1800class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1801 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1802 1803class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1804 MSA128WOpnd>; 1805class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1806 MSA128DOpnd>; 1807 1808class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1809 MSA128WOpnd, MSA128HOpnd>; 1810class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1811 MSA128DOpnd, MSA128WOpnd>; 1812 1813class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1814 MSA128WOpnd, MSA128HOpnd>; 1815class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1816 MSA128DOpnd, MSA128WOpnd>; 1817 1818class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1819class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1820 1821class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1822class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1823 1824class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1825 MSA128WOpnd, MSA128HOpnd>; 1826class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1827 MSA128DOpnd, MSA128WOpnd>; 1828 1829class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1830 MSA128WOpnd, MSA128HOpnd>; 1831class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1832 MSA128DOpnd, MSA128WOpnd>; 1833 1834class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1835 MSA128BOpnd, GPR32Opnd>; 1836class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1837 MSA128HOpnd, GPR32Opnd>; 1838class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1839 MSA128WOpnd, GPR32Opnd>; 1840 1841class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 1842 FGR32>; 1843class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 1844 FGR64>; 1845 1846class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1847class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1848 1849class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1850class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1851 1852class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1853class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1854 1855class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1856 MSA128WOpnd>; 1857class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1858 MSA128DOpnd>; 1859 1860class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1861class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1862 1863class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1864 MSA128WOpnd>; 1865class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1866 MSA128DOpnd>; 1867 1868class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1869class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1870 1871class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1872class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1873 1874class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1875class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1876 1877class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1878class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1879 1880class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1881 MSA128WOpnd>; 1882class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1883 MSA128DOpnd>; 1884 1885class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1886class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1887 1888class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1889class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1890 1891class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1892class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1893 1894class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1895class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1896 1897class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1898class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1899 1900class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1901class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1902 1903class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1904class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1905 1906class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1907class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1908 1909class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1910 MSA128WOpnd>; 1911class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1912 MSA128DOpnd>; 1913 1914class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1915 MSA128WOpnd>; 1916class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1917 MSA128DOpnd>; 1918 1919class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1920 MSA128WOpnd>; 1921class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1922 MSA128DOpnd>; 1923 1924class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1925 MSA128WOpnd>; 1926class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1927 MSA128DOpnd>; 1928 1929class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1930 MSA128WOpnd>; 1931class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1932 MSA128DOpnd>; 1933 1934class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1935 MSA128WOpnd>; 1936class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1937 MSA128DOpnd>; 1938 1939class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1940 MSA128WOpnd>; 1941class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1942 MSA128DOpnd>; 1943 1944class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1945 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1946class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1947 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1948 1949class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1950 MSA128WOpnd>; 1951class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1952 MSA128DOpnd>; 1953 1954class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1955 MSA128WOpnd>; 1956class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1957 MSA128DOpnd>; 1958 1959class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1960 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1961class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1962 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1963class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1964 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1965 1966class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1967 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1968class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1969 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1970class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1971 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1972 1973class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1974 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1975class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1976 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1977class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1978 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1979 1980class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1981 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1982class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1983 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1984class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1985 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1986 1987class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1988class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1989class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1990class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1991 1992class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1993class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1994class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1995class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1996 1997class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 1998class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 1999class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 2000class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 2001 2002class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 2003class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 2004class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 2005class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 2006 2007class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2008 MSA128BOpnd, GPR32Opnd>; 2009class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2010 MSA128HOpnd, GPR32Opnd>; 2011class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2012 MSA128WOpnd, GPR32Opnd>; 2013 2014class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2015 MSA128WOpnd, FGR32Opnd>; 2016class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2017 MSA128DOpnd, FGR64Opnd>; 2018 2019class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2020 MSA128BOpnd>; 2021class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2022 MSA128HOpnd>; 2023class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2024 MSA128WOpnd>; 2025class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2026 MSA128DOpnd>; 2027 2028class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2029 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2030 ComplexPattern Addr = addrRegImm, 2031 InstrItinClass itin = NoItinerary> { 2032 dag OutOperandList = (outs RCWD:$wd); 2033 dag InOperandList = (ins MemOpnd:$addr); 2034 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2035 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2036 InstrItinClass Itinerary = itin; 2037} 2038 2039class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 2040class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 2041class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 2042class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 2043 2044class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 2045class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 2046class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 2047class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 2048 2049class LSA_DESC { 2050 dag OutOperandList = (outs GPR32:$rd); 2051 dag InOperandList = (ins GPR32:$rs, GPR32:$rt, uimm2:$sa); 2052 string AsmString = "lsa\t$rd, $rs, $rt, $sa"; 2053 list<dag> Pattern = [(set GPR32:$rd, (add GPR32:$rs, (shl GPR32:$rt, 2054 immZExt2Lsa:$sa)))]; 2055 InstrItinClass Itinerary = NoItinerary; 2056} 2057 2058class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2059 MSA128HOpnd>; 2060class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2061 MSA128WOpnd>; 2062 2063class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2064 MSA128HOpnd>; 2065class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2066 MSA128WOpnd>; 2067 2068class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2069class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2070class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2071class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2072 2073class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2074class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2075class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2076class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2077 2078class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2079class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2080class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2081class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2082 2083class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2084class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2085class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2086class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2087 2088class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2089 MSA128BOpnd>; 2090class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2091 MSA128HOpnd>; 2092class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2093 MSA128WOpnd>; 2094class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2095 MSA128DOpnd>; 2096 2097class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2098 MSA128BOpnd>; 2099class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2100 MSA128HOpnd>; 2101class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2102 MSA128WOpnd>; 2103class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2104 MSA128DOpnd>; 2105 2106class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2107class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2108class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2109class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2110 2111class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2112class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2113class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2114class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2115 2116class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2117class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2118class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2119class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2120 2121class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2122 MSA128BOpnd>; 2123class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2124 MSA128HOpnd>; 2125class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2126 MSA128WOpnd>; 2127class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2128 MSA128DOpnd>; 2129 2130class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2131 MSA128BOpnd>; 2132class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2133 MSA128HOpnd>; 2134class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2135 MSA128WOpnd>; 2136class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2137 MSA128DOpnd>; 2138 2139class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2140class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2141class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2142class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2143 2144class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2145class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2146class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2147class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2148 2149class MOVE_V_DESC { 2150 dag OutOperandList = (outs MSA128B:$wd); 2151 dag InOperandList = (ins MSA128B:$ws); 2152 string AsmString = "move.v\t$wd, $ws"; 2153 list<dag> Pattern = []; 2154 InstrItinClass Itinerary = NoItinerary; 2155} 2156 2157class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2158 MSA128HOpnd>; 2159class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2160 MSA128WOpnd>; 2161 2162class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2163 MSA128HOpnd>; 2164class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2165 MSA128WOpnd>; 2166 2167class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2168class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2169class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2170class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2171 2172class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2173 MSA128HOpnd>; 2174class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2175 MSA128WOpnd>; 2176 2177class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2178 MSA128HOpnd>; 2179class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2180 MSA128WOpnd>; 2181 2182class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2183class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2184class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2185class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2186 2187class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2188class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2189class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2190class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2191 2192class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2193class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2194class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2195class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2196 2197class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2198class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2199class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2200class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2201 2202class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2203 MSA128BOpnd>; 2204 2205class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2206class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2207class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2208class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2209 2210class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2211 2212class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2213class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2214class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2215class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2216 2217class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2218class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2219class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2220class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2221 2222class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2223class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2224class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2225class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2226 2227class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2228 MSA128BOpnd>; 2229class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2230 MSA128HOpnd>; 2231class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2232 MSA128WOpnd>; 2233class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2234 MSA128DOpnd>; 2235 2236class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2237 MSA128BOpnd>; 2238class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2239 MSA128HOpnd>; 2240class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2241 MSA128WOpnd>; 2242class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2243 MSA128DOpnd>; 2244 2245class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2246class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2247class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2248 2249class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2250class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2251class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2252class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2253 2254class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2255class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2256class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2257class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2258 2259class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2260class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2261class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2262class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2263 2264class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2265 MSA128BOpnd>; 2266class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2267 MSA128HOpnd>; 2268class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2269 MSA128WOpnd>; 2270class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2271 MSA128DOpnd>; 2272 2273class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2274 MSA128BOpnd, GPR32Opnd>; 2275class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2276 MSA128HOpnd, GPR32Opnd>; 2277class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2278 MSA128WOpnd, GPR32Opnd>; 2279class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2280 MSA128DOpnd, GPR32Opnd>; 2281 2282class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2283 MSA128BOpnd>; 2284class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2285 MSA128HOpnd>; 2286class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2287 MSA128WOpnd>; 2288class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2289 MSA128DOpnd>; 2290 2291class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2292class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2293class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2294class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2295 2296class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2297 MSA128BOpnd>; 2298class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2299 MSA128HOpnd>; 2300class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2301 MSA128WOpnd>; 2302class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2303 MSA128DOpnd>; 2304 2305class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2306class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2307class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2308class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2309 2310class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2311 MSA128BOpnd>; 2312class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2313 MSA128HOpnd>; 2314class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2315 MSA128WOpnd>; 2316class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2317 MSA128DOpnd>; 2318 2319class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2320class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2321class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2322class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2323 2324class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2325 MSA128BOpnd>; 2326class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2327 MSA128HOpnd>; 2328class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2329 MSA128WOpnd>; 2330class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2331 MSA128DOpnd>; 2332 2333class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2334class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2335class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2336class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2337 2338class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2339 MSA128BOpnd>; 2340class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2341 MSA128HOpnd>; 2342class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2343 MSA128WOpnd>; 2344class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2345 MSA128DOpnd>; 2346 2347class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2348 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2349 ComplexPattern Addr = addrRegImm, 2350 InstrItinClass itin = NoItinerary> { 2351 dag OutOperandList = (outs); 2352 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2353 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2354 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2355 InstrItinClass Itinerary = itin; 2356} 2357 2358class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2359class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2360class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2361class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2362 2363class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2364 MSA128BOpnd>; 2365class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2366 MSA128HOpnd>; 2367class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2368 MSA128WOpnd>; 2369class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2370 MSA128DOpnd>; 2371 2372class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2373 MSA128BOpnd>; 2374class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2375 MSA128HOpnd>; 2376class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2377 MSA128WOpnd>; 2378class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2379 MSA128DOpnd>; 2380 2381class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2382 MSA128BOpnd>; 2383class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2384 MSA128HOpnd>; 2385class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2386 MSA128WOpnd>; 2387class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2388 MSA128DOpnd>; 2389 2390class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2391 MSA128BOpnd>; 2392class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2393 MSA128HOpnd>; 2394class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2395 MSA128WOpnd>; 2396class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2397 MSA128DOpnd>; 2398 2399class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2400class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2401class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2402class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2403 2404class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2405 MSA128BOpnd>; 2406class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2407 MSA128HOpnd>; 2408class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2409 MSA128WOpnd>; 2410class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2411 MSA128DOpnd>; 2412 2413class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2414class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2415class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2416class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2417 2418class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2419class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2420class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2421class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2422 2423class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2424 MSA128BOpnd>; 2425 2426// Instruction defs. 2427def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2428def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2429def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2430def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2431 2432def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2433def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2434def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2435def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2436 2437def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2438def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2439def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2440def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2441 2442def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2443def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2444def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2445def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2446 2447def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2448def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2449def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2450def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2451 2452def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2453def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2454def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2455def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2456 2457def AND_V : AND_V_ENC, AND_V_DESC; 2458def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2459 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2460 MSA128BOpnd:$ws, 2461 MSA128BOpnd:$wt)>; 2462def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2463 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2464 MSA128BOpnd:$ws, 2465 MSA128BOpnd:$wt)>; 2466def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2467 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2468 MSA128BOpnd:$ws, 2469 MSA128BOpnd:$wt)>; 2470 2471def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2472 2473def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2474def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2475def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2476def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2477 2478def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2479def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2480def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2481def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2482 2483def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2484def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2485def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2486def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2487 2488def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2489def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2490def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2491def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2492 2493def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2494def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2495def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2496def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2497 2498def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2499def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2500def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2501def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2502 2503def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2504def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2505def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2506def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2507 2508def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2509def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2510def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2511def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2512 2513def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2514def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2515def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2516def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2517 2518def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2519def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2520def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2521def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2522 2523def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2524def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2525def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2526def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2527 2528def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2529def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2530def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2531def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2532 2533def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2534 2535def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2536 2537def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2538 2539def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2540 2541def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2542def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2543def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2544def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2545 2546def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2547def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2548def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2549def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2550 2551def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2552def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2553def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2554def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2555 2556def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2557 2558def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2559 2560class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2561 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2562 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2563 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2564 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2565 let Constraints = "$wd_in = $wd"; 2566} 2567 2568def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2569def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2570def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2571def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2572def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2573 2574def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2575 2576def BSET_B : BSET_B_ENC, BSET_B_DESC; 2577def BSET_H : BSET_H_ENC, BSET_H_DESC; 2578def BSET_W : BSET_W_ENC, BSET_W_DESC; 2579def BSET_D : BSET_D_ENC, BSET_D_DESC; 2580 2581def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2582def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2583def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2584def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2585 2586def BZ_B : BZ_B_ENC, BZ_B_DESC; 2587def BZ_H : BZ_H_ENC, BZ_H_DESC; 2588def BZ_W : BZ_W_ENC, BZ_W_DESC; 2589def BZ_D : BZ_D_ENC, BZ_D_DESC; 2590 2591def BZ_V : BZ_V_ENC, BZ_V_DESC; 2592 2593def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2594def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2595def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2596def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2597 2598def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2599def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2600def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2601def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2602 2603def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2604 2605def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2606def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2607def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2608def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2609 2610def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2611def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2612def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2613def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2614 2615def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2616def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2617def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2618def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2619 2620def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2621def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2622def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2623def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2624 2625def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2626def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2627def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2628def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2629 2630def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2631def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2632def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2633def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2634 2635def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2636def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2637def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2638def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2639 2640def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2641def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2642def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2643def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2644 2645def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2646def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2647def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2648 2649def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2650def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2651def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2652 2653def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2654def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2655 2656def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2657 2658def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2659def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2660def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2661def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2662 2663def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2664def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2665def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2666def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2667 2668def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2669def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2670def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2671 2672def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2673def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2674def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2675 2676def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2677def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2678def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2679 2680def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2681def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2682def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2683 2684def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2685def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2686def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2687 2688def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2689def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2690def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2691 2692def FADD_W : FADD_W_ENC, FADD_W_DESC; 2693def FADD_D : FADD_D_ENC, FADD_D_DESC; 2694 2695def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2696def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2697 2698def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2699def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2700 2701def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2702def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2703 2704def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2705def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2706 2707def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2708def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2709 2710def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2711def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2712 2713def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2714def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2715 2716def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2717def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2718 2719def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2720def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2721 2722def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2723def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2724 2725def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2726def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2727 2728def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2729def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2730 2731def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2732def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2733 2734def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2735def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2736 2737def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2738def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2739 2740def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2741def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2742 2743def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2744def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2745 2746def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2747def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2748 2749def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2750def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2751 2752def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2753def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2754 2755def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2756def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2757 2758def FILL_B : FILL_B_ENC, FILL_B_DESC; 2759def FILL_H : FILL_H_ENC, FILL_H_DESC; 2760def FILL_W : FILL_W_ENC, FILL_W_DESC; 2761def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 2762def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 2763 2764def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2765def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2766 2767def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2768def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2769 2770def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2771def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2772 2773def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2774def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2775 2776def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2777def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2778 2779def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2780def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2781 2782def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2783def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2784 2785def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2786def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2787 2788def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2789def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2790 2791def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2792def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2793 2794def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2795def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2796 2797def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2798def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2799 2800def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2801def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2802 2803def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2804def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2805 2806def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2807def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2808 2809def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2810def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2811 2812def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2813def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2814 2815def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2816def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2817 2818def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2819def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2820 2821def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2822def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2823 2824def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2825def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2826 2827def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2828def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2829 2830def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2831def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2832 2833def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2834def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2835 2836def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2837def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2838 2839def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2840def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2841 2842def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2843def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2844 2845def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2846def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2847 2848def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2849def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2850 2851def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2852def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2853def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2854 2855def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2856def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2857def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2858 2859def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2860def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2861def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2862 2863def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2864def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2865def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2866 2867def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2868def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2869def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2870def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2871 2872def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2873def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2874def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2875def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2876 2877def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2878def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2879def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2880def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2881 2882def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2883def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2884def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2885def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2886 2887def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2888def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2889def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2890 2891// INSERT_FW_PSEUDO defined after INSVE_W 2892// INSERT_FD_PSEUDO defined after INSVE_D 2893 2894def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2895def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2896def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2897def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2898 2899def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2900def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2901 2902def LD_B: LD_B_ENC, LD_B_DESC; 2903def LD_H: LD_H_ENC, LD_H_DESC; 2904def LD_W: LD_W_ENC, LD_W_DESC; 2905def LD_D: LD_D_ENC, LD_D_DESC; 2906 2907def LDI_B : LDI_B_ENC, LDI_B_DESC; 2908def LDI_H : LDI_H_ENC, LDI_H_DESC; 2909def LDI_W : LDI_W_ENC, LDI_W_DESC; 2910def LDI_D : LDI_D_ENC, LDI_D_DESC; 2911 2912def LSA : LSA_ENC, LSA_DESC; 2913 2914def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2915def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2916 2917def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2918def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2919 2920def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2921def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2922def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2923def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2924 2925def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2926def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2927def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2928def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2929 2930def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2931def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2932def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2933def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2934 2935def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2936def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2937def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2938def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2939 2940def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2941def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2942def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2943def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2944 2945def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2946def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2947def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2948def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2949 2950def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2951def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2952def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2953def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2954 2955def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2956def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2957def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2958def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2959 2960def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2961def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2962def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2963def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2964 2965def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2966def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2967def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2968def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2969 2970def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2971def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2972def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2973def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2974 2975def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2976def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2977def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2978def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2979 2980def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2981def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2982def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2983def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2984 2985def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2986 2987def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2988def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2989 2990def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2991def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2992 2993def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2994def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2995def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2996def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2997 2998def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2999def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3000 3001def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3002def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3003 3004def MULV_B : MULV_B_ENC, MULV_B_DESC; 3005def MULV_H : MULV_H_ENC, MULV_H_DESC; 3006def MULV_W : MULV_W_ENC, MULV_W_DESC; 3007def MULV_D : MULV_D_ENC, MULV_D_DESC; 3008 3009def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3010def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3011def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3012def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3013 3014def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3015def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3016def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3017def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3018 3019def NOR_V : NOR_V_ENC, NOR_V_DESC; 3020def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3021 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3022 MSA128BOpnd:$ws, 3023 MSA128BOpnd:$wt)>; 3024def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3025 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3026 MSA128BOpnd:$ws, 3027 MSA128BOpnd:$wt)>; 3028def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3029 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3030 MSA128BOpnd:$ws, 3031 MSA128BOpnd:$wt)>; 3032 3033def NORI_B : NORI_B_ENC, NORI_B_DESC; 3034 3035def OR_V : OR_V_ENC, OR_V_DESC; 3036def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3037 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3038 MSA128BOpnd:$ws, 3039 MSA128BOpnd:$wt)>; 3040def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3041 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3042 MSA128BOpnd:$ws, 3043 MSA128BOpnd:$wt)>; 3044def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3045 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3046 MSA128BOpnd:$ws, 3047 MSA128BOpnd:$wt)>; 3048 3049def ORI_B : ORI_B_ENC, ORI_B_DESC; 3050 3051def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3052def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3053def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3054def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3055 3056def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3057def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3058def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3059def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3060 3061def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3062def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3063def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3064def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3065 3066def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3067def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3068def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3069def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3070 3071def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3072def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3073def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3074def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3075 3076def SHF_B : SHF_B_ENC, SHF_B_DESC; 3077def SHF_H : SHF_H_ENC, SHF_H_DESC; 3078def SHF_W : SHF_W_ENC, SHF_W_DESC; 3079 3080def SLD_B : SLD_B_ENC, SLD_B_DESC; 3081def SLD_H : SLD_H_ENC, SLD_H_DESC; 3082def SLD_W : SLD_W_ENC, SLD_W_DESC; 3083def SLD_D : SLD_D_ENC, SLD_D_DESC; 3084 3085def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3086def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3087def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3088def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3089 3090def SLL_B : SLL_B_ENC, SLL_B_DESC; 3091def SLL_H : SLL_H_ENC, SLL_H_DESC; 3092def SLL_W : SLL_W_ENC, SLL_W_DESC; 3093def SLL_D : SLL_D_ENC, SLL_D_DESC; 3094 3095def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3096def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3097def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3098def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3099 3100def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3101def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3102def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3103def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3104 3105def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3106def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3107def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3108def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3109 3110def SRA_B : SRA_B_ENC, SRA_B_DESC; 3111def SRA_H : SRA_H_ENC, SRA_H_DESC; 3112def SRA_W : SRA_W_ENC, SRA_W_DESC; 3113def SRA_D : SRA_D_ENC, SRA_D_DESC; 3114 3115def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3116def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3117def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3118def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3119 3120def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3121def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3122def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3123def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3124 3125def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3126def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3127def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3128def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3129 3130def SRL_B : SRL_B_ENC, SRL_B_DESC; 3131def SRL_H : SRL_H_ENC, SRL_H_DESC; 3132def SRL_W : SRL_W_ENC, SRL_W_DESC; 3133def SRL_D : SRL_D_ENC, SRL_D_DESC; 3134 3135def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3136def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3137def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3138def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3139 3140def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3141def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3142def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3143def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3144 3145def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3146def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3147def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3148def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3149 3150def ST_B: ST_B_ENC, ST_B_DESC; 3151def ST_H: ST_H_ENC, ST_H_DESC; 3152def ST_W: ST_W_ENC, ST_W_DESC; 3153def ST_D: ST_D_ENC, ST_D_DESC; 3154 3155def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3156def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3157def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3158def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3159 3160def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3161def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3162def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3163def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3164 3165def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3166def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3167def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3168def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3169 3170def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3171def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3172def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3173def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3174 3175def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3176def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3177def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3178def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3179 3180def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3181def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3182def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3183def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3184 3185def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3186def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3187def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3188def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3189 3190def XOR_V : XOR_V_ENC, XOR_V_DESC; 3191def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3192 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3193 MSA128BOpnd:$ws, 3194 MSA128BOpnd:$wt)>; 3195def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3196 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3197 MSA128BOpnd:$ws, 3198 MSA128BOpnd:$wt)>; 3199def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3200 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3201 MSA128BOpnd:$ws, 3202 MSA128BOpnd:$wt)>; 3203 3204def XORI_B : XORI_B_ENC, XORI_B_DESC; 3205 3206// Patterns. 3207class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3208 Pat<pattern, result>, Requires<pred>; 3209 3210def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3211 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3212 3213def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3214def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3215def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3216def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3217def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3218def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3219def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3220 3221def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3222def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3223def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3224 3225def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3226 (ST_B MSA128B:$ws, addr:$addr)>; 3227def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3228 (ST_H MSA128H:$ws, addr:$addr)>; 3229def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3230 (ST_W MSA128W:$ws, addr:$addr)>; 3231def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3232 (ST_D MSA128D:$ws, addr:$addr)>; 3233def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3234 (ST_H MSA128H:$ws, addr:$addr)>; 3235def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3236 (ST_W MSA128W:$ws, addr:$addr)>; 3237def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3238 (ST_D MSA128D:$ws, addr:$addr)>; 3239 3240def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3241 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3242def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3243 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3244def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3245 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3246 3247class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3248 RegisterOperand ROWS = ROWD, 3249 InstrItinClass itin = NoItinerary> : 3250 MipsPseudo<(outs ROWD:$wd), 3251 (ins ROWS:$ws), 3252 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3253 InstrItinClass Itinerary = itin; 3254} 3255def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3256 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3257 MSA128WOpnd:$ws)>; 3258def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3259 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3260 MSA128DOpnd:$ws)>; 3261 3262class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3263 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3264 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3265 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3266 3267// These are endian-independant because the element size doesnt change 3268def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3269def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3270def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3271def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3272def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3273def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3274 3275// Little endian bitcasts are always no-ops 3276def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3277def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3278def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3279def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3280def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3281def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3282 3283def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3284def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3285def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3286def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3287def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3288 3289def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3290def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3291def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3292def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3293def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3294 3295def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3296def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3297def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3298def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3299def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3300 3301def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3302def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3303def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3304def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3305def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3306 3307def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3308def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3309def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3310def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3311def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3312 3313// Big endian bitcasts expand to shuffle instructions. 3314// This is because bitcast is defined to be a store/load sequence and the 3315// vector store/load instructions are mixed-endian with respect to the vector 3316// as a whole (little endian with respect to element order, but big endian 3317// elements). 3318 3319class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3320 RegisterClass DstRC, MSAInst Insn, 3321 RegisterClass ViaRC> : 3322 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3323 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3324 DstRC), 3325 [HasMSA, IsBE]>; 3326 3327class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3328 RegisterClass DstRC, MSAInst Insn, 3329 RegisterClass ViaRC> : 3330 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3331 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3332 DstRC), 3333 [HasMSA, IsBE]>; 3334 3335class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3336 RegisterClass DstRC> : 3337 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3338 3339class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3340 RegisterClass DstRC> : 3341 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3342 3343class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3344 RegisterClass DstRC> : 3345 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3346 (COPY_TO_REGCLASS 3347 (SHF_W 3348 (COPY_TO_REGCLASS 3349 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3350 MSA128W), 177), 3351 DstRC), 3352 [HasMSA, IsBE]>; 3353 3354class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3355 RegisterClass DstRC> : 3356 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3357 3358class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3359 RegisterClass DstRC> : 3360 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3361 3362class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3363 RegisterClass DstRC> : 3364 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3365 3366def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3367def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3368def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3369def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3370def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3371def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3372 3373def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3374def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3375def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3376def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3377def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3378 3379def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3380def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3381def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3382def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3383def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3384 3385def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3386def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3387def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3388def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3389def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3390 3391def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3392def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3393def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3394def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3395def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3396 3397def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3398def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3399def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3400def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3401def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3402 3403def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3404def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3405def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3406def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3407def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3408 3409// Pseudos used to implement BNZ.df, and BZ.df 3410 3411class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3412 RegisterClass RCWS, 3413 InstrItinClass itin = NoItinerary> : 3414 MipsPseudo<(outs GPR32:$dst), 3415 (ins RCWS:$ws), 3416 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3417 bit usesCustomInserter = 1; 3418} 3419 3420def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3421 MSA128B, NoItinerary>; 3422def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3423 MSA128H, NoItinerary>; 3424def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3425 MSA128W, NoItinerary>; 3426def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3427 MSA128D, NoItinerary>; 3428def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3429 MSA128B, NoItinerary>; 3430 3431def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3432 MSA128B, NoItinerary>; 3433def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3434 MSA128H, NoItinerary>; 3435def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3436 MSA128W, NoItinerary>; 3437def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3438 MSA128D, NoItinerary>; 3439def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3440 MSA128B, NoItinerary>; 3441