MipsMSAInstrInfo.td revision 57cd3bc4064bd71eb6572d3cba5e23471ab25863
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm2 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm3 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm4 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def uimm8 : Operand<i32> { 77 let PrintMethod = "printUnsignedImm"; 78} 79 80def simm5 : Operand<i32>; 81 82def simm10 : Operand<i32>; 83 84def vsplat_uimm1 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm2 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm8"; 90} 91 92def vsplat_uimm3 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm4 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm5 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm6 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_uimm8 : Operand<vAny> { 109 let PrintMethod = "printUnsignedImm"; 110} 111 112def vsplat_simm5 : Operand<vAny>; 113 114def vsplat_simm10 : Operand<vAny>; 115 116def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>; 117 118// Pattern fragments 119def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 120 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 121def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 122 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 123def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 124 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 125 126def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 127 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 128def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 129 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 130def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 131 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 132 133def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 134 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 135def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 136 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 137def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 138 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 139 140class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 141 PatFrag<(ops node:$lhs, node:$rhs), 142 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 143 144// ISD::SETFALSE cannot occur 145def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 146def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 147def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 148def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 149def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 150def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 151def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 152def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 153def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 154def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 155def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 156def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 157def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 158def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 159def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 160def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 161def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 162def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 163def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 164def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 165def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 166def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 167def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 168def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 169def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 170def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 171def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 172def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 173// ISD::SETTRUE cannot occur 174// ISD::SETFALSE2 cannot occur 175// ISD::SETTRUE2 cannot occur 176 177class vsetcc_type<ValueType ResTy, CondCode CC> : 178 PatFrag<(ops node:$lhs, node:$rhs), 179 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 180 181def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 182def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 183def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 184def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 185def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 186def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 187def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 188def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 189def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 190def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 191def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 192def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 193def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 194def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 195def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 196def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 197def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 198def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 199def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 200def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 201 202def vsplati8 : PatFrag<(ops node:$e0), 203 (v16i8 (build_vector node:$e0, node:$e0, 204 node:$e0, node:$e0, 205 node:$e0, node:$e0, 206 node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0, 210 node:$e0, node:$e0))>; 211def vsplati16 : PatFrag<(ops node:$e0), 212 (v8i16 (build_vector node:$e0, node:$e0, 213 node:$e0, node:$e0, 214 node:$e0, node:$e0, 215 node:$e0, node:$e0))>; 216def vsplati32 : PatFrag<(ops node:$e0), 217 (v4i32 (build_vector node:$e0, node:$e0, 218 node:$e0, node:$e0))>; 219def vsplati64 : PatFrag<(ops node:$e0), 220 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 221def vsplatf32 : PatFrag<(ops node:$e0), 222 (v4f32 (build_vector node:$e0, node:$e0, 223 node:$e0, node:$e0))>; 224def vsplatf64 : PatFrag<(ops node:$e0), 225 (v2f64 (build_vector node:$e0, node:$e0))>; 226 227def vsplati8_elt : PatFrag<(ops node:$v, node:$i), 228 (MipsVSHF (vsplati8 node:$i), node:$v, node:$v)>; 229def vsplati16_elt : PatFrag<(ops node:$v, node:$i), 230 (MipsVSHF (vsplati16 node:$i), node:$v, node:$v)>; 231def vsplati32_elt : PatFrag<(ops node:$v, node:$i), 232 (MipsVSHF (vsplati32 node:$i), node:$v, node:$v)>; 233def vsplati64_elt : PatFrag<(ops node:$v, node:$i), 234 (MipsVSHF (vsplati64 node:$i), node:$v, node:$v)>; 235 236class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 237 SDNodeXForm xform = NOOP_SDNodeXForm> 238 : PatLeaf<frag, pred, xform> { 239 Operand OpClass = opclass; 240} 241 242class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 243 list<SDNode> roots = [], 244 list<SDNodeProperty> props = []> : 245 ComplexPattern<ty, numops, fn, roots, props> { 246 Operand OpClass = opclass; 247} 248 249def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 250 "selectVSplatUimm3", 251 [build_vector, bitconvert]>; 252 253def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 254 "selectVSplatUimm4", 255 [build_vector, bitconvert]>; 256 257def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 262 "selectVSplatUimm8", 263 [build_vector, bitconvert]>; 264 265def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 266 "selectVSplatSimm5", 267 [build_vector, bitconvert]>; 268 269def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 270 "selectVSplatUimm3", 271 [build_vector, bitconvert]>; 272 273def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 274 "selectVSplatUimm4", 275 [build_vector, bitconvert]>; 276 277def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 278 "selectVSplatUimm5", 279 [build_vector, bitconvert]>; 280 281def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 282 "selectVSplatSimm5", 283 [build_vector, bitconvert]>; 284 285def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 286 "selectVSplatUimm2", 287 [build_vector, bitconvert]>; 288 289def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 290 "selectVSplatUimm5", 291 [build_vector, bitconvert]>; 292 293def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 294 "selectVSplatSimm5", 295 [build_vector, bitconvert]>; 296 297def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 298 "selectVSplatUimm1", 299 [build_vector, bitconvert]>; 300 301def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 302 "selectVSplatUimm5", 303 [build_vector, bitconvert]>; 304 305def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 306 "selectVSplatUimm6", 307 [build_vector, bitconvert]>; 308 309def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 310 "selectVSplatSimm5", 311 [build_vector, bitconvert]>; 312 313// Any build_vector that is a constant splat with a value that is an exact 314// power of 2 315def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 316 [build_vector, bitconvert]>; 317 318def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 319 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 320 321def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 322 (add node:$wd, (mul node:$ws, node:$wt))>; 323 324def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 325 (sub node:$wd, (mul node:$ws, node:$wt))>; 326 327def mul_fexp2 : PatFrag<(ops node:$ws, node:$wt), 328 (fmul node:$ws, (fexp2 node:$wt))>; 329 330// Immediates 331def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 332def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 333 334// Instruction encoding. 335class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 336class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 337class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 338class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 339 340class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 341class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 342class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 343class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 344 345class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 346class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 347class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 348class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 349 350class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 351class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 352class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 353class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 354 355class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 356class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 357class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 358class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 359 360class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 361class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 362class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 363class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 364 365class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 366 367class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 368 369class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 370class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 371class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 372class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 373 374class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 375class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 376class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 377class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 378 379class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 380class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 381class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 382class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 383 384class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 385class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 386class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 387class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 388 389class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 390class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 391class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 392class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 393 394class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 395class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 396class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 397class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 398 399class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 400class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 401class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 402class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 403 404class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 405class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 406class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 407class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 408 409class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 410class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 411class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 412class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 413 414class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 415class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 416class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 417class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 418 419class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 420class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 421class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 422class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 423 424class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 425class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 426class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 427class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 428 429class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 430 431class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 432 433class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 434 435class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 436 437class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 438class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 439class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 440class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 441 442class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 443class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 444class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 445class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 446 447class BNZ_B_ENC : MSA_CBRANCH_FMT<0b111, 0b00>; 448class BNZ_H_ENC : MSA_CBRANCH_FMT<0b111, 0b01>; 449class BNZ_W_ENC : MSA_CBRANCH_FMT<0b111, 0b10>; 450class BNZ_D_ENC : MSA_CBRANCH_FMT<0b111, 0b11>; 451 452class BNZ_V_ENC : MSA_CBRANCH_V_FMT<0b01000>; 453 454class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 455 456class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 457 458class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 459class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 460class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 461class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 462 463class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 464class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 465class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 466class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 467 468class BZ_B_ENC : MSA_CBRANCH_FMT<0b110, 0b00>; 469class BZ_H_ENC : MSA_CBRANCH_FMT<0b110, 0b01>; 470class BZ_W_ENC : MSA_CBRANCH_FMT<0b110, 0b10>; 471class BZ_D_ENC : MSA_CBRANCH_FMT<0b110, 0b11>; 472 473class BZ_V_ENC : MSA_CBRANCH_V_FMT<0b01011>; 474 475class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 476class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 477class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 478class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 479 480class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 481class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 482class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 483class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 484 485class CFCMSA_ENC : MSA_ELM_CFCMSA_FMT<0b0001111110, 0b011001>; 486 487class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 488class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 489class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 490class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 491 492class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 493class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 494class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 495class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 496 497class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 498class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 499class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 500class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 501 502class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 503class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 504class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 505class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 506 507class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 508class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 509class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 510class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 511 512class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 513class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 514class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 515class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 516 517class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 518class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 519class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 520class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 521 522class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 523class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 524class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 525class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 526 527class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 528class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 529class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 530 531class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 532class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 533class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 534 535class CTCMSA_ENC : MSA_ELM_CTCMSA_FMT<0b0000111110, 0b011001>; 536 537class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 538class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 539class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 540class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 541 542class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 543class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 544class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 545class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 546 547class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 548class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 549class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 550 551class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 552class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 553class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 554 555class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 556class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 557class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 558 559class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 560class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 561class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 562 563class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 564class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 565class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 566 567class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 568class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 569class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 570 571class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 572class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 573 574class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 575class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 576 577class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 578class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 579 580class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 581class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 582 583class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 584class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 585 586class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 587class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 588 589class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 590class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 591 592class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 593class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 594 595class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 596class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 597 598class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 599class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 600 601class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 602class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 603 604class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 605class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 606 607class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 608class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 609 610class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 611class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 612 613class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 614class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 615 616class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 617class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 618 619class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 620class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 621 622class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 623class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 624 625class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 626class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 627 628class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 629class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 630 631class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 632class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 633 634class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 635class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 636 637class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 638class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 639class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 640 641class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 642class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 643 644class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 645class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 646 647class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 648class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 649 650class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 651class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 652 653class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 654class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 655 656class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 657class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 658 659class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 660class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 661 662class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 663class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 664 665class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 666class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 667 668class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 669class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 670 671class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 672class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 673 674class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 675class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 676 677class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 678class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 679 680class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 681class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 682 683class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 684class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 685 686class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 687class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 688 689class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 690class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 691 692class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 693class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 694 695class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 696class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 697 698class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 699class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 700 701class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 702class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 703 704class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 705class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 706 707class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 708class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 709 710class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 711class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 712 713class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 714class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 715 716class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 717class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 718 719class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 720class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 721 722class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 723class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 724 725class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 726class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 727 728class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 729class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 730class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 731 732class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 733class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 734class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 735 736class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 737class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 738class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 739 740class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 741class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 742class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 743 744class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 745class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 746class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 747class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 748 749class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 750class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 751class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 752class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 753 754class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 755class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 756class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 757class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 758 759class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 760class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 761class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 762class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 763 764class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 765class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 766class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 767 768class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 769class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 770class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 771class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 772 773class LD_B_ENC : MSA_MI10_FMT<0b00, 0b1000>; 774class LD_H_ENC : MSA_MI10_FMT<0b01, 0b1000>; 775class LD_W_ENC : MSA_MI10_FMT<0b10, 0b1000>; 776class LD_D_ENC : MSA_MI10_FMT<0b11, 0b1000>; 777 778class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 779class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 780class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 781class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 782 783class LSA_ENC : SPECIAL_LSA_FMT<0b000101>; 784 785class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 786class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 787 788class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 789class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 790 791class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 792class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 793class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 794class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 795 796class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 797class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 798class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 799class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 800 801class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 802class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 803class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 804class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 805 806class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 807class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 808class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 809class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 810 811class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 812class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 813class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 814class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 815 816class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 817class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 818class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 819class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 820 821class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 822class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 823class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 824class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 825 826class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 827class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 828class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 829class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 830 831class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 832class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 833class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 834class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 835 836class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 837class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 838class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 839class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 840 841class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 842class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 843class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 844class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 845 846class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 847class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 848class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 849class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 850 851class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 852class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 853class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 854class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 855 856class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 857 858class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 859class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 860 861class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 862class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 863 864class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 865class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 866class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 867class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 868 869class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 870class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 871 872class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 873class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 874 875class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 876class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 877class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 878class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 879 880class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 881class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 882class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 883class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 884 885class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 886class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 887class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 888class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 889 890class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 891 892class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 893 894class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 895 896class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 897 898class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 899class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 900class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 901class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 902 903class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 904class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 905class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 906class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 907 908class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 909class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 910class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 911class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 912 913class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 914class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 915class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 916class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 917 918class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 919class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 920class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 921class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 922 923class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 924class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 925class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 926 927class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>; 928class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>; 929class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>; 930class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>; 931 932class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 933class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 934class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 935class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 936 937class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 938class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 939class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 940class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 941 942class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 943class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 944class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 945class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 946 947class SPLAT_B_ENC : MSA_3R_INDEX_FMT<0b001, 0b00, 0b010100>; 948class SPLAT_H_ENC : MSA_3R_INDEX_FMT<0b001, 0b01, 0b010100>; 949class SPLAT_W_ENC : MSA_3R_INDEX_FMT<0b001, 0b10, 0b010100>; 950class SPLAT_D_ENC : MSA_3R_INDEX_FMT<0b001, 0b11, 0b010100>; 951 952class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 953class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 954class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 955class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 956 957class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 958class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 959class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 960class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 961 962class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 963class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 964class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 965class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 966 967class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 968class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 969class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 970class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 971 972class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 973class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 974class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 975class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 976 977class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 978class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 979class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 980class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 981 982class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 983class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 984class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 985class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 986 987class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 988class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 989class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 990class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 991 992class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 993class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 994class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 995class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 996 997class ST_B_ENC : MSA_MI10_FMT<0b00, 0b1001>; 998class ST_H_ENC : MSA_MI10_FMT<0b01, 0b1001>; 999class ST_W_ENC : MSA_MI10_FMT<0b10, 0b1001>; 1000class ST_D_ENC : MSA_MI10_FMT<0b11, 0b1001>; 1001 1002class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 1003class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 1004class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 1005class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 1006 1007class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 1008class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 1009class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 1010class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 1011 1012class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 1013class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 1014class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1015class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1016 1017class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1018class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1019class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1020class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1021 1022class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1023class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1024class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1025class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1026 1027class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1028class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1029class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1030class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1031 1032class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1033class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1034class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1035class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1036 1037class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1038 1039class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1040 1041// Instruction desc. 1042class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1043 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1044 InstrItinClass itin = NoItinerary> { 1045 dag OutOperandList = (outs ROWD:$wd); 1046 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1047 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1048 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1049 InstrItinClass Itinerary = itin; 1050} 1051 1052class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1053 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1054 InstrItinClass itin = NoItinerary> { 1055 dag OutOperandList = (outs ROWD:$wd); 1056 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1057 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1058 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1059 InstrItinClass Itinerary = itin; 1060} 1061 1062class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1063 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1064 InstrItinClass itin = NoItinerary> { 1065 dag OutOperandList = (outs ROWD:$wd); 1066 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1067 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1068 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1069 InstrItinClass Itinerary = itin; 1070} 1071 1072class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1073 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1074 InstrItinClass itin = NoItinerary> { 1075 dag OutOperandList = (outs ROWD:$wd); 1076 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1077 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1078 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1079 InstrItinClass Itinerary = itin; 1080} 1081 1082class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1083 SplatComplexPattern SplatImm, 1084 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1085 InstrItinClass itin = NoItinerary> { 1086 dag OutOperandList = (outs ROWD:$wd); 1087 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1088 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1089 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1090 InstrItinClass Itinerary = itin; 1091} 1092 1093class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1094 ValueType VecTy, RegisterOperand ROD, 1095 RegisterOperand ROWS, 1096 InstrItinClass itin = NoItinerary> { 1097 dag OutOperandList = (outs ROD:$rd); 1098 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1099 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1100 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1101 InstrItinClass Itinerary = itin; 1102} 1103 1104class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1105 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1106 InstrItinClass itin = NoItinerary> { 1107 dag OutOperandList = (outs ROWD:$wd); 1108 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1109 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1110 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1111 InstrItinClass Itinerary = itin; 1112} 1113 1114class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1115 RegisterClass RCD, RegisterClass RCWS> : 1116 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1117 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1118 bit usesCustomInserter = 1; 1119} 1120 1121class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1122 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1123 RegisterOperand ROWS = ROWD, 1124 InstrItinClass itin = NoItinerary> { 1125 dag OutOperandList = (outs ROWD:$wd); 1126 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1127 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1128 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1129 InstrItinClass Itinerary = itin; 1130} 1131 1132class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1133 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1134 RegisterOperand ROWS = ROWD, 1135 InstrItinClass itin = NoItinerary> { 1136 dag OutOperandList = (outs ROWD:$wd); 1137 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1138 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1139 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1140 InstrItinClass Itinerary = itin; 1141} 1142 1143// This class is deprecated and will be removed in the next few patches 1144class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1145 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1146 InstrItinClass itin = NoItinerary> { 1147 dag OutOperandList = (outs ROWD:$wd); 1148 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1149 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1150 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1151 InstrItinClass Itinerary = itin; 1152} 1153 1154class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1155 RegisterOperand ROWS = ROWD, 1156 InstrItinClass itin = NoItinerary> { 1157 dag OutOperandList = (outs ROWD:$wd); 1158 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1159 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1160 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1161 InstrItinClass Itinerary = itin; 1162} 1163 1164class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1165 InstrItinClass itin = NoItinerary> { 1166 dag OutOperandList = (outs ROWD:$wd); 1167 dag InOperandList = (ins vsplat_simm10:$s10); 1168 string AsmString = !strconcat(instr_asm, "\t$wd, $s10"); 1169 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1170 list<dag> Pattern = []; 1171 bit hasSideEffects = 0; 1172 InstrItinClass Itinerary = itin; 1173} 1174 1175class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1176 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1177 InstrItinClass itin = NoItinerary> { 1178 dag OutOperandList = (outs ROWD:$wd); 1179 dag InOperandList = (ins ROWS:$ws); 1180 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1181 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1182 InstrItinClass Itinerary = itin; 1183} 1184 1185class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1186 SDPatternOperator OpNode, RegisterOperand ROWD, 1187 RegisterOperand ROS = ROWD, 1188 InstrItinClass itin = NoItinerary> { 1189 dag OutOperandList = (outs ROWD:$wd); 1190 dag InOperandList = (ins ROS:$rs); 1191 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1192 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1193 InstrItinClass Itinerary = itin; 1194} 1195 1196class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1197 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1198 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1199 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1200 let usesCustomInserter = 1; 1201} 1202 1203class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1204 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1205 InstrItinClass itin = NoItinerary> { 1206 dag OutOperandList = (outs ROWD:$wd); 1207 dag InOperandList = (ins ROWS:$ws); 1208 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1209 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1210 InstrItinClass Itinerary = itin; 1211} 1212 1213class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1214 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1215 RegisterOperand ROWT = ROWD, 1216 InstrItinClass itin = NoItinerary> { 1217 dag OutOperandList = (outs ROWD:$wd); 1218 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1219 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1220 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1221 InstrItinClass Itinerary = itin; 1222} 1223 1224class MSA_3R_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1225 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1226 InstrItinClass itin = NoItinerary> { 1227 dag OutOperandList = (outs ROWD:$wd); 1228 dag InOperandList = (ins ROWS:$ws, GPR32:$rt); 1229 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1230 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))]; 1231 InstrItinClass Itinerary = itin; 1232} 1233 1234class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1235 RegisterOperand ROWS = ROWD, 1236 RegisterOperand ROWT = ROWD, 1237 InstrItinClass itin = NoItinerary> { 1238 dag OutOperandList = (outs ROWD:$wd); 1239 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1240 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1241 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1242 ROWT:$wt))]; 1243 string Constraints = "$wd = $wd_in"; 1244 InstrItinClass Itinerary = itin; 1245} 1246 1247class MSA_3R_SLD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1248 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1249 InstrItinClass itin = NoItinerary> { 1250 dag OutOperandList = (outs ROWD:$wd); 1251 dag InOperandList = (ins ROWS:$ws, GPR32:$rt); 1252 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]"); 1253 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, GPR32:$rt))]; 1254 InstrItinClass Itinerary = itin; 1255} 1256 1257class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1258 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1259 RegisterOperand ROWT = ROWD, 1260 InstrItinClass itin = NoItinerary> { 1261 dag OutOperandList = (outs ROWD:$wd); 1262 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1263 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1264 list<dag> Pattern = [(set ROWD:$wd, 1265 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1266 InstrItinClass Itinerary = itin; 1267 string Constraints = "$wd = $wd_in"; 1268} 1269 1270class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1271 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1272 RegisterOperand ROWT = ROWD, 1273 InstrItinClass itin = NoItinerary> : 1274 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1275 1276class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1277 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1278 RegisterOperand ROWT = ROWD, 1279 InstrItinClass itin = NoItinerary> : 1280 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1281 1282class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterOperand ROWD> { 1283 dag OutOperandList = (outs); 1284 dag InOperandList = (ins ROWD:$wt, brtarget:$offset); 1285 string AsmString = !strconcat(instr_asm, "\t$wt, $offset"); 1286 list<dag> Pattern = []; 1287 InstrItinClass Itinerary = IIBranch; 1288 bit isBranch = 1; 1289 bit isTerminator = 1; 1290 bit hasDelaySlot = 1; 1291 list<Register> Defs = [AT]; 1292} 1293 1294class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1295 RegisterOperand ROWD, RegisterOperand ROS, 1296 InstrItinClass itin = NoItinerary> { 1297 dag OutOperandList = (outs ROWD:$wd); 1298 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1299 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1300 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1301 ROS:$rs, 1302 immZExt6:$n))]; 1303 InstrItinClass Itinerary = itin; 1304 string Constraints = "$wd = $wd_in"; 1305} 1306 1307class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1308 RegisterOperand ROWD, RegisterOperand ROFS> : 1309 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1310 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1311 immZExt6:$n))]> { 1312 bit usesCustomInserter = 1; 1313 string Constraints = "$wd = $wd_in"; 1314} 1315 1316class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1317 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1318 InstrItinClass itin = NoItinerary> { 1319 dag OutOperandList = (outs ROWD:$wd); 1320 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1321 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1322 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1323 immZExt6:$n, 1324 ROWS:$ws))]; 1325 InstrItinClass Itinerary = itin; 1326 string Constraints = "$wd = $wd_in"; 1327} 1328 1329class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1330 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1331 RegisterOperand ROWT = ROWD, 1332 InstrItinClass itin = NoItinerary> { 1333 dag OutOperandList = (outs ROWD:$wd); 1334 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1335 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1336 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1337 InstrItinClass Itinerary = itin; 1338} 1339 1340class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1341 RegisterOperand ROWD, 1342 RegisterOperand ROWS = ROWD, 1343 InstrItinClass itin = NoItinerary> { 1344 dag OutOperandList = (outs ROWD:$wd); 1345 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1346 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1347 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1348 ROWS:$ws))]; 1349 InstrItinClass Itinerary = itin; 1350} 1351 1352class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1353 RegisterOperand ROWS = ROWD, 1354 RegisterOperand ROWT = ROWD> : 1355 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1356 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1357 1358class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1359 IsCommutable; 1360class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1361 IsCommutable; 1362class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1363 IsCommutable; 1364class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1365 IsCommutable; 1366 1367class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1368 MSA128BOpnd>, IsCommutable; 1369class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1370 MSA128HOpnd>, IsCommutable; 1371class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1372 MSA128WOpnd>, IsCommutable; 1373class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1374 MSA128DOpnd>, IsCommutable; 1375 1376class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1377 MSA128BOpnd>, IsCommutable; 1378class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1379 MSA128HOpnd>, IsCommutable; 1380class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1381 MSA128WOpnd>, IsCommutable; 1382class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1383 MSA128DOpnd>, IsCommutable; 1384 1385class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1386 MSA128BOpnd>, IsCommutable; 1387class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1388 MSA128HOpnd>, IsCommutable; 1389class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1390 MSA128WOpnd>, IsCommutable; 1391class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1392 MSA128DOpnd>, IsCommutable; 1393 1394class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1395class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1396class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1397class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1398 1399class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1400 MSA128BOpnd>; 1401class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1402 MSA128HOpnd>; 1403class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1404 MSA128WOpnd>; 1405class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1406 MSA128DOpnd>; 1407 1408class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1409class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1410class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1411class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1412 1413class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1414 MSA128BOpnd>; 1415 1416class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1417 MSA128BOpnd>; 1418class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1419 MSA128HOpnd>; 1420class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1421 MSA128WOpnd>; 1422class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1423 MSA128DOpnd>; 1424 1425class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1426 MSA128BOpnd>; 1427class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1428 MSA128HOpnd>; 1429class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1430 MSA128WOpnd>; 1431class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1432 MSA128DOpnd>; 1433 1434class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1435 IsCommutable; 1436class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1437 IsCommutable; 1438class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1439 IsCommutable; 1440class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1441 IsCommutable; 1442 1443class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1444 IsCommutable; 1445class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1446 IsCommutable; 1447class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1448 IsCommutable; 1449class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1450 IsCommutable; 1451 1452class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1453 MSA128BOpnd>, IsCommutable; 1454class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1455 MSA128HOpnd>, IsCommutable; 1456class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1457 MSA128WOpnd>, IsCommutable; 1458class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1459 MSA128DOpnd>, IsCommutable; 1460 1461class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1462 MSA128BOpnd>, IsCommutable; 1463class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1464 MSA128HOpnd>, IsCommutable; 1465class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1466 MSA128WOpnd>, IsCommutable; 1467class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1468 MSA128DOpnd>, IsCommutable; 1469 1470class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1471class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1472class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1473class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1474 1475class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1476 MSA128BOpnd>; 1477class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1478 MSA128HOpnd>; 1479class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1480 MSA128WOpnd>; 1481class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1482 MSA128DOpnd>; 1483 1484class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1485class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1486class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1487class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1488 1489class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1490 MSA128BOpnd>; 1491class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1492 MSA128HOpnd>; 1493class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1494 MSA128WOpnd>; 1495class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1496 MSA128DOpnd>; 1497 1498class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1499class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1500class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1501class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1502 1503class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1504 MSA128BOpnd>; 1505class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1506 MSA128HOpnd>; 1507class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1508 MSA128WOpnd>; 1509class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1510 MSA128DOpnd>; 1511 1512class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1513 1514class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1515 MSA128BOpnd>; 1516 1517class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1518 1519class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1520 1521class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1522class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1523class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1524class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1525 1526class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1527 MSA128BOpnd>; 1528class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1529 MSA128HOpnd>; 1530class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1531 MSA128WOpnd>; 1532class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1533 MSA128DOpnd>; 1534 1535class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128BOpnd>; 1536class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128HOpnd>; 1537class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128WOpnd>; 1538class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128DOpnd>; 1539 1540class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128BOpnd>; 1541 1542class BSEL_V_DESC { 1543 dag OutOperandList = (outs MSA128BOpnd:$wd); 1544 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1545 MSA128BOpnd:$wt); 1546 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1547 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1548 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1549 MSA128BOpnd:$wt))]; 1550 InstrItinClass Itinerary = NoItinerary; 1551 string Constraints = "$wd = $wd_in"; 1552} 1553 1554class BSELI_B_DESC { 1555 dag OutOperandList = (outs MSA128BOpnd:$wd); 1556 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1557 vsplat_uimm8:$u8); 1558 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1559 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1560 MSA128BOpnd:$ws, 1561 vsplati8_uimm8:$u8))]; 1562 InstrItinClass Itinerary = NoItinerary; 1563 string Constraints = "$wd = $wd_in"; 1564} 1565 1566class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1567class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1568class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1569class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1570 1571class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1572 MSA128BOpnd>; 1573class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1574 MSA128HOpnd>; 1575class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1576 MSA128WOpnd>; 1577class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1578 MSA128DOpnd>; 1579 1580class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128BOpnd>; 1581class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128HOpnd>; 1582class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128WOpnd>; 1583class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128DOpnd>; 1584 1585class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128BOpnd>; 1586 1587class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1588 IsCommutable; 1589class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1590 IsCommutable; 1591class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1592 IsCommutable; 1593class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1594 IsCommutable; 1595 1596class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1597 MSA128BOpnd>; 1598class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1599 MSA128HOpnd>; 1600class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1601 MSA128WOpnd>; 1602class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1603 MSA128DOpnd>; 1604 1605class CFCMSA_DESC { 1606 dag OutOperandList = (outs GPR32Opnd:$rd); 1607 dag InOperandList = (ins MSA128CROpnd:$cs); 1608 string AsmString = "cfcmsa\t$rd, $cs"; 1609 InstrItinClass Itinerary = NoItinerary; 1610 bit hasSideEffects = 1; 1611} 1612 1613class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1614class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1615class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1616class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1617 1618class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1619class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1620class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1621class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1622 1623class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1624 vsplati8_simm5, MSA128BOpnd>; 1625class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1626 vsplati16_simm5, MSA128HOpnd>; 1627class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1628 vsplati32_simm5, MSA128WOpnd>; 1629class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1630 vsplati64_simm5, MSA128DOpnd>; 1631 1632class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1633 vsplati8_uimm5, MSA128BOpnd>; 1634class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1635 vsplati16_uimm5, MSA128HOpnd>; 1636class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1637 vsplati32_uimm5, MSA128WOpnd>; 1638class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1639 vsplati64_uimm5, MSA128DOpnd>; 1640 1641class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1642class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1643class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1644class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1645 1646class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1647class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1648class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1649class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1650 1651class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1652 vsplati8_simm5, MSA128BOpnd>; 1653class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1654 vsplati16_simm5, MSA128HOpnd>; 1655class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1656 vsplati32_simm5, MSA128WOpnd>; 1657class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1658 vsplati64_simm5, MSA128DOpnd>; 1659 1660class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1661 vsplati8_uimm5, MSA128BOpnd>; 1662class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1663 vsplati16_uimm5, MSA128HOpnd>; 1664class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1665 vsplati32_uimm5, MSA128WOpnd>; 1666class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1667 vsplati64_uimm5, MSA128DOpnd>; 1668 1669class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1670 GPR32Opnd, MSA128BOpnd>; 1671class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1672 GPR32Opnd, MSA128HOpnd>; 1673class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1674 GPR32Opnd, MSA128WOpnd>; 1675 1676class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1677 GPR32Opnd, MSA128BOpnd>; 1678class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1679 GPR32Opnd, MSA128HOpnd>; 1680class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1681 GPR32Opnd, MSA128WOpnd>; 1682 1683class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1684 MSA128W>; 1685class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1686 MSA128D>; 1687 1688class CTCMSA_DESC { 1689 dag OutOperandList = (outs); 1690 dag InOperandList = (ins MSA128CROpnd:$cd, GPR32Opnd:$rs); 1691 string AsmString = "ctcmsa\t$cd, $rs"; 1692 InstrItinClass Itinerary = NoItinerary; 1693 bit hasSideEffects = 1; 1694} 1695 1696class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1697class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1698class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1699class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1700 1701class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1702class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1703class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1704class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1705 1706class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1707 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1708 IsCommutable; 1709class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1710 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1711 IsCommutable; 1712class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1713 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1714 IsCommutable; 1715 1716class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1717 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1718 IsCommutable; 1719class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1720 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1721 IsCommutable; 1722class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1723 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1724 IsCommutable; 1725 1726class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1727 MSA128HOpnd, MSA128BOpnd, 1728 MSA128BOpnd>, IsCommutable; 1729class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1730 MSA128WOpnd, MSA128HOpnd, 1731 MSA128HOpnd>, IsCommutable; 1732class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1733 MSA128DOpnd, MSA128WOpnd, 1734 MSA128WOpnd>, IsCommutable; 1735 1736class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1737 MSA128HOpnd, MSA128BOpnd, 1738 MSA128BOpnd>, IsCommutable; 1739class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1740 MSA128WOpnd, MSA128HOpnd, 1741 MSA128HOpnd>, IsCommutable; 1742class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1743 MSA128DOpnd, MSA128WOpnd, 1744 MSA128WOpnd>, IsCommutable; 1745 1746class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1747 MSA128HOpnd, MSA128BOpnd, 1748 MSA128BOpnd>; 1749class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1750 MSA128WOpnd, MSA128HOpnd, 1751 MSA128HOpnd>; 1752class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1753 MSA128DOpnd, MSA128WOpnd, 1754 MSA128WOpnd>; 1755 1756class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1757 MSA128HOpnd, MSA128BOpnd, 1758 MSA128BOpnd>; 1759class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1760 MSA128WOpnd, MSA128HOpnd, 1761 MSA128HOpnd>; 1762class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1763 MSA128DOpnd, MSA128WOpnd, 1764 MSA128WOpnd>; 1765 1766class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1767 IsCommutable; 1768class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1769 IsCommutable; 1770 1771class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1772 IsCommutable; 1773class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1774 IsCommutable; 1775 1776class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1777 IsCommutable; 1778class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1779 IsCommutable; 1780 1781class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1782 MSA128WOpnd>; 1783class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1784 MSA128DOpnd>; 1785 1786class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1787class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1788 1789class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1790class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1791 1792class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1793 IsCommutable; 1794class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1795 IsCommutable; 1796 1797class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1798 IsCommutable; 1799class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1800 IsCommutable; 1801 1802class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1803 IsCommutable; 1804class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1805 IsCommutable; 1806 1807class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1808 IsCommutable; 1809class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1810 IsCommutable; 1811 1812class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1813 IsCommutable; 1814class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1815 IsCommutable; 1816 1817class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1818 IsCommutable; 1819class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1820 IsCommutable; 1821 1822class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1823 IsCommutable; 1824class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1825 IsCommutable; 1826 1827class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1828class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1829 1830class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1831 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1832class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1833 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1834 1835// The fexp2.df instruction multiplies the first operand by 2 to the power of 1836// the second operand. We therefore need a pseudo-insn in order to invent the 1837// 1.0 when we only need to match ISD::FEXP2. 1838class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", mul_fexp2, MSA128WOpnd>; 1839class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", mul_fexp2, MSA128DOpnd>; 1840let usesCustomInserter = 1 in { 1841 class FEXP2_W_1_PSEUDO_DESC : 1842 MipsPseudo<(outs MSA128W:$wd), (ins MSA128W:$ws), 1843 [(set MSA128W:$wd, (fexp2 MSA128W:$ws))]>; 1844 class FEXP2_D_1_PSEUDO_DESC : 1845 MipsPseudo<(outs MSA128D:$wd), (ins MSA128D:$ws), 1846 [(set MSA128D:$wd, (fexp2 MSA128D:$ws))]>; 1847} 1848 1849class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1850 MSA128WOpnd, MSA128HOpnd>; 1851class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1852 MSA128DOpnd, MSA128WOpnd>; 1853 1854class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1855 MSA128WOpnd, MSA128HOpnd>; 1856class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1857 MSA128DOpnd, MSA128WOpnd>; 1858 1859class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1860class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1861 1862class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1863class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1864 1865class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1866 MSA128WOpnd, MSA128HOpnd>; 1867class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1868 MSA128DOpnd, MSA128WOpnd>; 1869 1870class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1871 MSA128WOpnd, MSA128HOpnd>; 1872class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1873 MSA128DOpnd, MSA128WOpnd>; 1874 1875class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1876 MSA128BOpnd, GPR32Opnd>; 1877class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1878 MSA128HOpnd, GPR32Opnd>; 1879class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1880 MSA128WOpnd, GPR32Opnd>; 1881 1882class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 1883 FGR32>; 1884class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 1885 FGR64>; 1886 1887class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1888class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1889 1890class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1891class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1892 1893class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1894class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1895 1896class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1897 MSA128WOpnd>; 1898class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1899 MSA128DOpnd>; 1900 1901class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1902class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1903 1904class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1905 MSA128WOpnd>; 1906class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1907 MSA128DOpnd>; 1908 1909class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1910class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1911 1912class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1913class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1914 1915class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1916class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1917 1918class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1919class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1920 1921class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1922 MSA128WOpnd>; 1923class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1924 MSA128DOpnd>; 1925 1926class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1927class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1928 1929class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1930class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1931 1932class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1933class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1934 1935class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1936class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1937 1938class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1939class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1940 1941class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1942class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1943 1944class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1945class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1946 1947class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1948class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1949 1950class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1951 MSA128WOpnd>; 1952class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1953 MSA128DOpnd>; 1954 1955class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1956 MSA128WOpnd>; 1957class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1958 MSA128DOpnd>; 1959 1960class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1961 MSA128WOpnd>; 1962class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1963 MSA128DOpnd>; 1964 1965class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1966 MSA128WOpnd>; 1967class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1968 MSA128DOpnd>; 1969 1970class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1971 MSA128WOpnd>; 1972class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1973 MSA128DOpnd>; 1974 1975class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1976 MSA128WOpnd>; 1977class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1978 MSA128DOpnd>; 1979 1980class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1981 MSA128WOpnd>; 1982class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1983 MSA128DOpnd>; 1984 1985class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1986 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1987class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1988 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1989 1990class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1991 MSA128WOpnd>; 1992class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1993 MSA128DOpnd>; 1994 1995class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1996 MSA128WOpnd>; 1997class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1998 MSA128DOpnd>; 1999 2000class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 2001 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2002class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 2003 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2004class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 2005 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2006 2007class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 2008 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2009class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 2010 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2011class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 2012 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2013 2014class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 2015 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2016class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 2017 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2018class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 2019 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2020 2021class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 2022 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 2023class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 2024 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 2025class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 2026 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 2027 2028class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 2029class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 2030class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 2031class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 2032 2033class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 2034class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 2035class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 2036class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 2037 2038class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 2039class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 2040class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 2041class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 2042 2043class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 2044class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 2045class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 2046class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 2047 2048class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2049 MSA128BOpnd, GPR32Opnd>; 2050class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2051 MSA128HOpnd, GPR32Opnd>; 2052class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2053 MSA128WOpnd, GPR32Opnd>; 2054 2055class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2056 MSA128WOpnd, FGR32Opnd>; 2057class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2058 MSA128DOpnd, FGR64Opnd>; 2059 2060class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2061 MSA128BOpnd>; 2062class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2063 MSA128HOpnd>; 2064class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2065 MSA128WOpnd>; 2066class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2067 MSA128DOpnd>; 2068 2069class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2070 ValueType TyNode, RegisterOperand ROWD, 2071 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2072 InstrItinClass itin = NoItinerary> { 2073 dag OutOperandList = (outs ROWD:$wd); 2074 dag InOperandList = (ins MemOpnd:$addr); 2075 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2076 list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2077 InstrItinClass Itinerary = itin; 2078 string DecoderMethod = "DecodeMSA128Mem"; 2079} 2080 2081class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128BOpnd>; 2082class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128HOpnd>; 2083class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128WOpnd>; 2084class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128DOpnd>; 2085 2086class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128BOpnd>; 2087class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128HOpnd>; 2088class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>; 2089class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>; 2090 2091class LSA_DESC { 2092 dag OutOperandList = (outs GPR32Opnd:$rd); 2093 dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, uimm2:$sa); 2094 string AsmString = "lsa\t$rd, $rs, $rt, $sa"; 2095 list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs, 2096 (shl GPR32Opnd:$rt, 2097 immZExt2Lsa:$sa)))]; 2098 InstrItinClass Itinerary = NoItinerary; 2099} 2100 2101class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2102 MSA128HOpnd>; 2103class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2104 MSA128WOpnd>; 2105 2106class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2107 MSA128HOpnd>; 2108class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2109 MSA128WOpnd>; 2110 2111class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2112class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2113class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2114class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2115 2116class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2117class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2118class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2119class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2120 2121class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2122class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2123class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2124class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2125 2126class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2127class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2128class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2129class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2130 2131class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2132 MSA128BOpnd>; 2133class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2134 MSA128HOpnd>; 2135class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2136 MSA128WOpnd>; 2137class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2138 MSA128DOpnd>; 2139 2140class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2141 MSA128BOpnd>; 2142class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2143 MSA128HOpnd>; 2144class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2145 MSA128WOpnd>; 2146class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2147 MSA128DOpnd>; 2148 2149class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2150class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2151class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2152class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2153 2154class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2155class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2156class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2157class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2158 2159class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2160class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2161class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2162class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2163 2164class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2165 MSA128BOpnd>; 2166class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2167 MSA128HOpnd>; 2168class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2169 MSA128WOpnd>; 2170class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2171 MSA128DOpnd>; 2172 2173class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2174 MSA128BOpnd>; 2175class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2176 MSA128HOpnd>; 2177class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2178 MSA128WOpnd>; 2179class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2180 MSA128DOpnd>; 2181 2182class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2183class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2184class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2185class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2186 2187class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2188class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2189class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2190class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2191 2192class MOVE_V_DESC { 2193 dag OutOperandList = (outs MSA128BOpnd:$wd); 2194 dag InOperandList = (ins MSA128BOpnd:$ws); 2195 string AsmString = "move.v\t$wd, $ws"; 2196 list<dag> Pattern = []; 2197 InstrItinClass Itinerary = NoItinerary; 2198} 2199 2200class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2201 MSA128HOpnd>; 2202class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2203 MSA128WOpnd>; 2204 2205class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2206 MSA128HOpnd>; 2207class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2208 MSA128WOpnd>; 2209 2210class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2211class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2212class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2213class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2214 2215class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2216 MSA128HOpnd>; 2217class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2218 MSA128WOpnd>; 2219 2220class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2221 MSA128HOpnd>; 2222class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2223 MSA128WOpnd>; 2224 2225class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2226class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2227class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2228class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2229 2230class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2231class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2232class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2233class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2234 2235class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2236class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2237class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2238class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2239 2240class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2241class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2242class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2243class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2244 2245class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2246 MSA128BOpnd>; 2247 2248class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2249class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2250class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2251class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2252 2253class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2254 2255class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2256class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2257class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2258class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2259 2260class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2261class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2262class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2263class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2264 2265class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2266class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2267class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2268class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2269 2270class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2271 MSA128BOpnd>; 2272class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2273 MSA128HOpnd>; 2274class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2275 MSA128WOpnd>; 2276class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2277 MSA128DOpnd>; 2278 2279class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2280 MSA128BOpnd>; 2281class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2282 MSA128HOpnd>; 2283class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2284 MSA128WOpnd>; 2285class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2286 MSA128DOpnd>; 2287 2288class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2289class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2290class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2291 2292class SLD_B_DESC : MSA_3R_SLD_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2293class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2294class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2295class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2296 2297class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2298class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2299class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2300class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2301 2302class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2303class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2304class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2305class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2306 2307class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2308 MSA128BOpnd>; 2309class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2310 MSA128HOpnd>; 2311class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2312 MSA128WOpnd>; 2313class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2314 MSA128DOpnd>; 2315 2316class SPLAT_B_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.b", vsplati8_elt, 2317 MSA128BOpnd>; 2318class SPLAT_H_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.h", vsplati16_elt, 2319 MSA128HOpnd>; 2320class SPLAT_W_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.w", vsplati32_elt, 2321 MSA128WOpnd>; 2322class SPLAT_D_DESC : MSA_3R_SPLAT_DESC_BASE<"splat.d", vsplati64_elt, 2323 MSA128DOpnd>; 2324 2325class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2326 MSA128BOpnd>; 2327class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2328 MSA128HOpnd>; 2329class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2330 MSA128WOpnd>; 2331class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2332 MSA128DOpnd>; 2333 2334class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2335class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2336class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2337class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2338 2339class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2340 MSA128BOpnd>; 2341class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2342 MSA128HOpnd>; 2343class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2344 MSA128WOpnd>; 2345class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2346 MSA128DOpnd>; 2347 2348class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2349class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2350class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2351class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2352 2353class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2354 MSA128BOpnd>; 2355class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2356 MSA128HOpnd>; 2357class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2358 MSA128WOpnd>; 2359class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2360 MSA128DOpnd>; 2361 2362class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2363class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2364class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2365class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2366 2367class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2368 MSA128BOpnd>; 2369class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2370 MSA128HOpnd>; 2371class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2372 MSA128WOpnd>; 2373class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2374 MSA128DOpnd>; 2375 2376class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2377class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2378class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2379class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2380 2381class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2382 MSA128BOpnd>; 2383class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2384 MSA128HOpnd>; 2385class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2386 MSA128WOpnd>; 2387class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2388 MSA128DOpnd>; 2389 2390class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2391 ValueType TyNode, RegisterOperand ROWD, 2392 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2393 InstrItinClass itin = NoItinerary> { 2394 dag OutOperandList = (outs); 2395 dag InOperandList = (ins ROWD:$wd, MemOpnd:$addr); 2396 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2397 list<dag> Pattern = [(OpNode (TyNode ROWD:$wd), Addr:$addr)]; 2398 InstrItinClass Itinerary = itin; 2399 string DecoderMethod = "DecodeMSA128Mem"; 2400} 2401 2402class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128BOpnd>; 2403class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128HOpnd>; 2404class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128WOpnd>; 2405class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128DOpnd>; 2406 2407class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2408 MSA128BOpnd>; 2409class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2410 MSA128HOpnd>; 2411class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2412 MSA128WOpnd>; 2413class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2414 MSA128DOpnd>; 2415 2416class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2417 MSA128BOpnd>; 2418class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2419 MSA128HOpnd>; 2420class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2421 MSA128WOpnd>; 2422class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2423 MSA128DOpnd>; 2424 2425class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2426 MSA128BOpnd>; 2427class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2428 MSA128HOpnd>; 2429class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2430 MSA128WOpnd>; 2431class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2432 MSA128DOpnd>; 2433 2434class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2435 MSA128BOpnd>; 2436class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2437 MSA128HOpnd>; 2438class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2439 MSA128WOpnd>; 2440class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2441 MSA128DOpnd>; 2442 2443class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2444class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2445class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2446class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2447 2448class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2449 MSA128BOpnd>; 2450class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2451 MSA128HOpnd>; 2452class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2453 MSA128WOpnd>; 2454class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2455 MSA128DOpnd>; 2456 2457class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2458class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2459class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2460class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2461 2462class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2463class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2464class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2465class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2466 2467class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2468 MSA128BOpnd>; 2469 2470// Instruction defs. 2471def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2472def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2473def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2474def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2475 2476def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2477def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2478def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2479def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2480 2481def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2482def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2483def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2484def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2485 2486def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2487def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2488def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2489def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2490 2491def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2492def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2493def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2494def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2495 2496def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2497def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2498def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2499def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2500 2501def AND_V : AND_V_ENC, AND_V_DESC; 2502def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2503 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2504 MSA128BOpnd:$ws, 2505 MSA128BOpnd:$wt)>; 2506def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2507 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2508 MSA128BOpnd:$ws, 2509 MSA128BOpnd:$wt)>; 2510def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2511 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2512 MSA128BOpnd:$ws, 2513 MSA128BOpnd:$wt)>; 2514 2515def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2516 2517def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2518def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2519def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2520def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2521 2522def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2523def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2524def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2525def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2526 2527def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2528def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2529def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2530def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2531 2532def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2533def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2534def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2535def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2536 2537def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2538def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2539def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2540def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2541 2542def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2543def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2544def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2545def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2546 2547def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2548def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2549def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2550def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2551 2552def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2553def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2554def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2555def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2556 2557def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2558def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2559def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2560def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2561 2562def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2563def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2564def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2565def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2566 2567def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2568def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2569def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2570def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2571 2572def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2573def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2574def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2575def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2576 2577def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2578 2579def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2580 2581def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2582 2583def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2584 2585def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2586def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2587def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2588def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2589 2590def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2591def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2592def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2593def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2594 2595def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2596def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2597def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2598def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2599 2600def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2601 2602def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2603 2604class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2605 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2606 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2607 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2608 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2609 let Constraints = "$wd_in = $wd"; 2610} 2611 2612def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2613def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2614def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2615def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2616def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2617 2618def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2619 2620def BSET_B : BSET_B_ENC, BSET_B_DESC; 2621def BSET_H : BSET_H_ENC, BSET_H_DESC; 2622def BSET_W : BSET_W_ENC, BSET_W_DESC; 2623def BSET_D : BSET_D_ENC, BSET_D_DESC; 2624 2625def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2626def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2627def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2628def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2629 2630def BZ_B : BZ_B_ENC, BZ_B_DESC; 2631def BZ_H : BZ_H_ENC, BZ_H_DESC; 2632def BZ_W : BZ_W_ENC, BZ_W_DESC; 2633def BZ_D : BZ_D_ENC, BZ_D_DESC; 2634 2635def BZ_V : BZ_V_ENC, BZ_V_DESC; 2636 2637def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2638def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2639def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2640def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2641 2642def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2643def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2644def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2645def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2646 2647def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2648 2649def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2650def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2651def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2652def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2653 2654def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2655def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2656def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2657def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2658 2659def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2660def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2661def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2662def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2663 2664def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2665def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2666def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2667def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2668 2669def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2670def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2671def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2672def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2673 2674def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2675def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2676def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2677def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2678 2679def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2680def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2681def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2682def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2683 2684def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2685def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2686def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2687def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2688 2689def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2690def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2691def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2692 2693def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2694def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2695def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2696 2697def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2698def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2699 2700def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2701 2702def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2703def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2704def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2705def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2706 2707def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2708def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2709def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2710def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2711 2712def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2713def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2714def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2715 2716def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2717def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2718def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2719 2720def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2721def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2722def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2723 2724def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2725def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2726def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2727 2728def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2729def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2730def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2731 2732def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2733def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2734def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2735 2736def FADD_W : FADD_W_ENC, FADD_W_DESC; 2737def FADD_D : FADD_D_ENC, FADD_D_DESC; 2738 2739def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2740def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2741 2742def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2743def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2744 2745def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2746def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2747 2748def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2749def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2750 2751def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2752def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2753 2754def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2755def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2756 2757def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2758def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2759 2760def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2761def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2762 2763def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2764def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2765 2766def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2767def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2768 2769def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2770def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2771 2772def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2773def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2774 2775def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2776def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2777 2778def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2779def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2780 2781def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2782def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2783def FEXP2_W_1_PSEUDO : FEXP2_W_1_PSEUDO_DESC; 2784def FEXP2_D_1_PSEUDO : FEXP2_D_1_PSEUDO_DESC; 2785 2786def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2787def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2788 2789def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2790def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2791 2792def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2793def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2794 2795def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2796def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2797 2798def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2799def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2800 2801def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2802def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2803 2804def FILL_B : FILL_B_ENC, FILL_B_DESC; 2805def FILL_H : FILL_H_ENC, FILL_H_DESC; 2806def FILL_W : FILL_W_ENC, FILL_W_DESC; 2807def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 2808def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 2809 2810def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2811def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2812 2813def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2814def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2815 2816def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2817def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2818 2819def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2820def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2821 2822def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2823def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2824 2825def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2826def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2827 2828def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2829def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2830 2831def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2832def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2833 2834def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2835def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2836 2837def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2838def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2839 2840def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2841def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2842 2843def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2844def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2845 2846def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2847def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2848 2849def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2850def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2851 2852def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2853def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2854 2855def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2856def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2857 2858def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2859def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2860 2861def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2862def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2863 2864def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2865def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2866 2867def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2868def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2869 2870def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2871def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2872 2873def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2874def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2875 2876def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2877def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2878 2879def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2880def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2881 2882def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2883def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2884 2885def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2886def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2887 2888def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2889def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2890 2891def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2892def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2893 2894def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2895def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2896 2897def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2898def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2899def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2900 2901def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2902def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2903def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2904 2905def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2906def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2907def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2908 2909def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2910def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2911def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2912 2913def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2914def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2915def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2916def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2917 2918def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2919def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2920def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2921def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2922 2923def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2924def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2925def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2926def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2927 2928def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2929def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2930def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2931def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2932 2933def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2934def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2935def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2936 2937// INSERT_FW_PSEUDO defined after INSVE_W 2938// INSERT_FD_PSEUDO defined after INSVE_D 2939 2940def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2941def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2942def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2943def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2944 2945def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2946def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2947 2948def LD_B: LD_B_ENC, LD_B_DESC; 2949def LD_H: LD_H_ENC, LD_H_DESC; 2950def LD_W: LD_W_ENC, LD_W_DESC; 2951def LD_D: LD_D_ENC, LD_D_DESC; 2952 2953def LDI_B : LDI_B_ENC, LDI_B_DESC; 2954def LDI_H : LDI_H_ENC, LDI_H_DESC; 2955def LDI_W : LDI_W_ENC, LDI_W_DESC; 2956def LDI_D : LDI_D_ENC, LDI_D_DESC; 2957 2958def LSA : LSA_ENC, LSA_DESC; 2959 2960def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2961def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2962 2963def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2964def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2965 2966def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2967def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2968def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2969def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2970 2971def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2972def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2973def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2974def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2975 2976def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2977def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2978def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2979def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2980 2981def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2982def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2983def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2984def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2985 2986def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2987def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2988def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2989def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2990 2991def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2992def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2993def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2994def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2995 2996def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2997def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2998def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2999def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 3000 3001def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 3002def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 3003def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 3004def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 3005 3006def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 3007def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 3008def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 3009def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 3010 3011def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 3012def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 3013def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 3014def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 3015 3016def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 3017def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 3018def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 3019def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 3020 3021def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 3022def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 3023def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 3024def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 3025 3026def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 3027def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 3028def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 3029def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 3030 3031def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 3032 3033def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 3034def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 3035 3036def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 3037def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 3038 3039def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 3040def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 3041def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 3042def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 3043 3044def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 3045def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3046 3047def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3048def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3049 3050def MULV_B : MULV_B_ENC, MULV_B_DESC; 3051def MULV_H : MULV_H_ENC, MULV_H_DESC; 3052def MULV_W : MULV_W_ENC, MULV_W_DESC; 3053def MULV_D : MULV_D_ENC, MULV_D_DESC; 3054 3055def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3056def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3057def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3058def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3059 3060def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3061def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3062def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3063def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3064 3065def NOR_V : NOR_V_ENC, NOR_V_DESC; 3066def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3067 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3068 MSA128BOpnd:$ws, 3069 MSA128BOpnd:$wt)>; 3070def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3071 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3072 MSA128BOpnd:$ws, 3073 MSA128BOpnd:$wt)>; 3074def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3075 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3076 MSA128BOpnd:$ws, 3077 MSA128BOpnd:$wt)>; 3078 3079def NORI_B : NORI_B_ENC, NORI_B_DESC; 3080 3081def OR_V : OR_V_ENC, OR_V_DESC; 3082def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3083 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3084 MSA128BOpnd:$ws, 3085 MSA128BOpnd:$wt)>; 3086def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3087 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3088 MSA128BOpnd:$ws, 3089 MSA128BOpnd:$wt)>; 3090def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3091 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3092 MSA128BOpnd:$ws, 3093 MSA128BOpnd:$wt)>; 3094 3095def ORI_B : ORI_B_ENC, ORI_B_DESC; 3096 3097def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3098def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3099def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3100def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3101 3102def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3103def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3104def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3105def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3106 3107def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3108def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3109def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3110def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3111 3112def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3113def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3114def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3115def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3116 3117def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3118def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3119def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3120def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3121 3122def SHF_B : SHF_B_ENC, SHF_B_DESC; 3123def SHF_H : SHF_H_ENC, SHF_H_DESC; 3124def SHF_W : SHF_W_ENC, SHF_W_DESC; 3125 3126def SLD_B : SLD_B_ENC, SLD_B_DESC; 3127def SLD_H : SLD_H_ENC, SLD_H_DESC; 3128def SLD_W : SLD_W_ENC, SLD_W_DESC; 3129def SLD_D : SLD_D_ENC, SLD_D_DESC; 3130 3131def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3132def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3133def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3134def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3135 3136def SLL_B : SLL_B_ENC, SLL_B_DESC; 3137def SLL_H : SLL_H_ENC, SLL_H_DESC; 3138def SLL_W : SLL_W_ENC, SLL_W_DESC; 3139def SLL_D : SLL_D_ENC, SLL_D_DESC; 3140 3141def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3142def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3143def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3144def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3145 3146def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3147def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3148def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3149def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3150 3151def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3152def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3153def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3154def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3155 3156def SRA_B : SRA_B_ENC, SRA_B_DESC; 3157def SRA_H : SRA_H_ENC, SRA_H_DESC; 3158def SRA_W : SRA_W_ENC, SRA_W_DESC; 3159def SRA_D : SRA_D_ENC, SRA_D_DESC; 3160 3161def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3162def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3163def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3164def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3165 3166def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3167def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3168def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3169def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3170 3171def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3172def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3173def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3174def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3175 3176def SRL_B : SRL_B_ENC, SRL_B_DESC; 3177def SRL_H : SRL_H_ENC, SRL_H_DESC; 3178def SRL_W : SRL_W_ENC, SRL_W_DESC; 3179def SRL_D : SRL_D_ENC, SRL_D_DESC; 3180 3181def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3182def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3183def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3184def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3185 3186def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3187def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3188def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3189def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3190 3191def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3192def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3193def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3194def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3195 3196def ST_B: ST_B_ENC, ST_B_DESC; 3197def ST_H: ST_H_ENC, ST_H_DESC; 3198def ST_W: ST_W_ENC, ST_W_DESC; 3199def ST_D: ST_D_ENC, ST_D_DESC; 3200 3201def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3202def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3203def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3204def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3205 3206def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3207def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3208def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3209def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3210 3211def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3212def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3213def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3214def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3215 3216def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3217def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3218def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3219def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3220 3221def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3222def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3223def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3224def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3225 3226def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3227def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3228def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3229def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3230 3231def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3232def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3233def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3234def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3235 3236def XOR_V : XOR_V_ENC, XOR_V_DESC; 3237def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3238 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3239 MSA128BOpnd:$ws, 3240 MSA128BOpnd:$wt)>; 3241def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3242 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3243 MSA128BOpnd:$ws, 3244 MSA128BOpnd:$wt)>; 3245def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3246 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3247 MSA128BOpnd:$ws, 3248 MSA128BOpnd:$wt)>; 3249 3250def XORI_B : XORI_B_ENC, XORI_B_DESC; 3251 3252// Patterns. 3253class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3254 Pat<pattern, result>, Requires<pred>; 3255 3256def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3257 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3258 3259def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3260def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3261def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3262def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3263def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3264def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3265def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3266 3267def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3268def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3269def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3270 3271def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3272 (ST_B MSA128B:$ws, addr:$addr)>; 3273def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3274 (ST_H MSA128H:$ws, addr:$addr)>; 3275def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3276 (ST_W MSA128W:$ws, addr:$addr)>; 3277def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3278 (ST_D MSA128D:$ws, addr:$addr)>; 3279def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3280 (ST_H MSA128H:$ws, addr:$addr)>; 3281def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3282 (ST_W MSA128W:$ws, addr:$addr)>; 3283def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3284 (ST_D MSA128D:$ws, addr:$addr)>; 3285 3286def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3287 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3288def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3289 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3290def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3291 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3292 3293class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3294 RegisterOperand ROWS = ROWD, 3295 InstrItinClass itin = NoItinerary> : 3296 MipsPseudo<(outs ROWD:$wd), 3297 (ins ROWS:$ws), 3298 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3299 InstrItinClass Itinerary = itin; 3300} 3301def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3302 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3303 MSA128WOpnd:$ws)>; 3304def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3305 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3306 MSA128DOpnd:$ws)>; 3307 3308class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3309 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3310 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3311 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3312 3313// These are endian-independant because the element size doesnt change 3314def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3315def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3316def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3317def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3318def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3319def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3320 3321// Little endian bitcasts are always no-ops 3322def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3323def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3324def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3325def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3326def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3327def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3328 3329def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3330def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3331def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3332def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3333def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3334 3335def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3336def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3337def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3338def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3339def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3340 3341def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3342def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3343def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3344def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3345def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3346 3347def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3348def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3349def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3350def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3351def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3352 3353def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3354def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3355def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3356def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3357def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3358 3359// Big endian bitcasts expand to shuffle instructions. 3360// This is because bitcast is defined to be a store/load sequence and the 3361// vector store/load instructions are mixed-endian with respect to the vector 3362// as a whole (little endian with respect to element order, but big endian 3363// elements). 3364 3365class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3366 RegisterClass DstRC, MSAInst Insn, 3367 RegisterClass ViaRC> : 3368 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3369 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3370 DstRC), 3371 [HasMSA, IsBE]>; 3372 3373class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3374 RegisterClass DstRC, MSAInst Insn, 3375 RegisterClass ViaRC> : 3376 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3377 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3378 DstRC), 3379 [HasMSA, IsBE]>; 3380 3381class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3382 RegisterClass DstRC> : 3383 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3384 3385class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3386 RegisterClass DstRC> : 3387 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3388 3389class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3390 RegisterClass DstRC> : 3391 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3392 (COPY_TO_REGCLASS 3393 (SHF_W 3394 (COPY_TO_REGCLASS 3395 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3396 MSA128W), 177), 3397 DstRC), 3398 [HasMSA, IsBE]>; 3399 3400class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3401 RegisterClass DstRC> : 3402 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3403 3404class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3405 RegisterClass DstRC> : 3406 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3407 3408class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3409 RegisterClass DstRC> : 3410 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3411 3412def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3413def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3414def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3415def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3416def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3417def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3418 3419def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3420def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3421def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3422def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3423def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3424 3425def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3426def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3427def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3428def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3429def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3430 3431def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3432def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3433def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3434def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3435def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3436 3437def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3438def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3439def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3440def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3441def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3442 3443def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3444def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3445def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3446def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3447def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3448 3449def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3450def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3451def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3452def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3453def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3454 3455// Pseudos used to implement BNZ.df, and BZ.df 3456 3457class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3458 RegisterClass RCWS, 3459 InstrItinClass itin = NoItinerary> : 3460 MipsPseudo<(outs GPR32:$dst), 3461 (ins RCWS:$ws), 3462 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3463 bit usesCustomInserter = 1; 3464} 3465 3466def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3467 MSA128B, NoItinerary>; 3468def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3469 MSA128H, NoItinerary>; 3470def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3471 MSA128W, NoItinerary>; 3472def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3473 MSA128D, NoItinerary>; 3474def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3475 MSA128B, NoItinerary>; 3476 3477def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3478 MSA128B, NoItinerary>; 3479def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3480 MSA128H, NoItinerary>; 3481def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3482 MSA128W, NoItinerary>; 3483def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3484 MSA128D, NoItinerary>; 3485def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3486 MSA128B, NoItinerary>; 3487