MipsMSAInstrInfo.td revision 62e87cb2415b305ca9b888a2338a6af59e74005d
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm1 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm8"; 82} 83 84def vsplat_uimm2 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm3 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm4 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm5 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm6 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm8 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_simm5 : Operand<vAny>; 109 110def vsplat_simm10 : Operand<vAny>; 111 112// Pattern fragments 113def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 114 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 115def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 116 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 117def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 118 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 119 120def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 121 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 122def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 123 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 124def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 125 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 126 127def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 129def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 131def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 133 134class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 135 PatFrag<(ops node:$lhs, node:$rhs), 136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 137 138// ISD::SETFALSE cannot occur 139def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 140def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 141def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 142def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 143def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 144def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 145def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 146def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 147def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 148def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 149def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 150def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 151def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 152def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 153def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 154def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 155def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 156def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 157def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 158def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 159def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 160def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 161def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 162def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 163def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 164def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 165def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 166def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 167// ISD::SETTRUE cannot occur 168// ISD::SETFALSE2 cannot occur 169// ISD::SETTRUE2 cannot occur 170 171class vsetcc_type<ValueType ResTy, CondCode CC> : 172 PatFrag<(ops node:$lhs, node:$rhs), 173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 174 175def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 176def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 177def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 178def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 179def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 180def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 181def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 182def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 183def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 184def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 185def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 186def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 187def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 188def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 189def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 190def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 191def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 192def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 193def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 194def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 195 196def vsplati8 : PatFrag<(ops node:$e0), 197 (v16i8 (build_vector node:$e0, node:$e0, 198 node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0, 202 node:$e0, node:$e0, 203 node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati16 : PatFrag<(ops node:$e0), 206 (v8i16 (build_vector node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0))>; 210def vsplati32 : PatFrag<(ops node:$e0), 211 (v4i32 (build_vector node:$e0, node:$e0, 212 node:$e0, node:$e0))>; 213def vsplati64 : PatFrag<(ops node:$e0), 214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 215def vsplatf32 : PatFrag<(ops node:$e0), 216 (v4f32 (build_vector node:$e0, node:$e0, 217 node:$e0, node:$e0))>; 218def vsplatf64 : PatFrag<(ops node:$e0), 219 (v2f64 (build_vector node:$e0, node:$e0))>; 220 221class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 222 SDNodeXForm xform = NOOP_SDNodeXForm> 223 : PatLeaf<frag, pred, xform> { 224 Operand OpClass = opclass; 225} 226 227class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 228 list<SDNode> roots = [], 229 list<SDNodeProperty> props = []> : 230 ComplexPattern<ty, numops, fn, roots, props> { 231 Operand OpClass = opclass; 232} 233 234def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 235 "selectVSplatUimm3", 236 [build_vector, bitconvert]>; 237 238def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 239 "selectVSplatUimm4", 240 [build_vector, bitconvert]>; 241 242def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 243 "selectVSplatUimm5", 244 [build_vector, bitconvert]>; 245 246def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 247 "selectVSplatUimm8", 248 [build_vector, bitconvert]>; 249 250def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 251 "selectVSplatSimm5", 252 [build_vector, bitconvert]>; 253 254def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 255 "selectVSplatUimm3", 256 [build_vector, bitconvert]>; 257 258def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 259 "selectVSplatUimm4", 260 [build_vector, bitconvert]>; 261 262def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 263 "selectVSplatUimm5", 264 [build_vector, bitconvert]>; 265 266def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 267 "selectVSplatSimm5", 268 [build_vector, bitconvert]>; 269 270def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 271 "selectVSplatUimm2", 272 [build_vector, bitconvert]>; 273 274def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 275 "selectVSplatUimm5", 276 [build_vector, bitconvert]>; 277 278def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 279 "selectVSplatSimm5", 280 [build_vector, bitconvert]>; 281 282def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 283 "selectVSplatUimm1", 284 [build_vector, bitconvert]>; 285 286def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 287 "selectVSplatUimm5", 288 [build_vector, bitconvert]>; 289 290def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 291 "selectVSplatUimm6", 292 [build_vector, bitconvert]>; 293 294def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 295 "selectVSplatSimm5", 296 [build_vector, bitconvert]>; 297 298// Any build_vector that is a constant splat with a value that is an exact 299// power of 2 300def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 301 [build_vector, bitconvert]>; 302 303def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 304 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 305 306def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 307 (add node:$wd, (mul node:$ws, node:$wt))>; 308 309def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 310 (sub node:$wd, (mul node:$ws, node:$wt))>; 311 312// Immediates 313def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 314def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 315 316// Instruction encoding. 317class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 318class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 319class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 320class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 321 322class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 323class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 324class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 325class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 326 327class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 328class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 329class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 330class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 331 332class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 333class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 334class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 335class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 336 337class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 338class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 339class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 340class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 341 342class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 343class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 344class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 345class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 346 347class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 348 349class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 350 351class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 352class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 353class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 354class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 355 356class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 357class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 358class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 359class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 360 361class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 362class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 363class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 364class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 365 366class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 367class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 368class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 369class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 370 371class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 372class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 373class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 374class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 375 376class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 377class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 378class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 379class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 380 381class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 382class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 383class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 384class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 385 386class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 387class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 388class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 389class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 390 391class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 392class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 393class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 394class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 395 396class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 397class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 398class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 399class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 400 401class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 402class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 403class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 404class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 405 406class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 407class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 408class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 409class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 410 411class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 412 413class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 414 415class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 416 417class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 418 419class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 420class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 421class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 422class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 423 424class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 425class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 426class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 427class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 428 429class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 430class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 431class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 432class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 433 434class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 435 436class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 437 438class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 439 440class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 441class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 442class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 443class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 444 445class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 446class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 447class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 448class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 449 450class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 451class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 452class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 453class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 454 455class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 456 457class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 458class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 459class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 460class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 461 462class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 463class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 464class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 465class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 466 467class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 468 469class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 470class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 471class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 472class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 473 474class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 475class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 476class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 477class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 478 479class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 480class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 481class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 482class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 483 484class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 485class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 486class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 487class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 488 489class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 490class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 491class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 492class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 493 494class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 495class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 496class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 497class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 498 499class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 500class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 501class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 502class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 503 504class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 505class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 506class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 507class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 508 509class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 510class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 511class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 512 513class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 514class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 515class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 516 517class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 518 519class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 520class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 521class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 522class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 523 524class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 525class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 526class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 527class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 528 529class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 530class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 531class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 532 533class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 534class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 535class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 536 537class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 538class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 539class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 540 541class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 542class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 543class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 544 545class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 546class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 547class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 548 549class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 550class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 551class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 552 553class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 554class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 555 556class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 557class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 558 559class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 560class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 561 562class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 563class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 564 565class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 566class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 567 568class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 569class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 570 571class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 572class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 573 574class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 575class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 576 577class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 578class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 579 580class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 581class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 582 583class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 584class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 585 586class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 587class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 588 589class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 590class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 591 592class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 593class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 594 595class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 596class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 597 598class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 599class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 600 601class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 602class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 603 604class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 605class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 606 607class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 608class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 609 610class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 611class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 612 613class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 614class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 615 616class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 617class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 618 619class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 620class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 621class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 622 623class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 624class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 625 626class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 627class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 628 629class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 630class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 631 632class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 633class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 634 635class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 636class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 637 638class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 639class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 640 641class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 642class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 643 644class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 645class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 646 647class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 648class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 649 650class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 651class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 652 653class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 654class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 655 656class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 657class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 658 659class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 660class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 661 662class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 663class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 664 665class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 666class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 667 668class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 669class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 670 671class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 672class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 673 674class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 675class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 676 677class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 678class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 679 680class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 681class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 682 683class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 684class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 685 686class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 687class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 688 689class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 690class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 691 692class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 693class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 694 695class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 696class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 697 698class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 699class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 700 701class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 702class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 703 704class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 705class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 706 707class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 708class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 709 710class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 711class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 712class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 713 714class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 715class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 716class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 717 718class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 719class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 720class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 721 722class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 723class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 724class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 725 726class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 727class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 728class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 729class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 730 731class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 732class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 733class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 734class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 735 736class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 737class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 738class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 739class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 740 741class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 742class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 743class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 744class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 745 746class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 747class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 748class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 749 750class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 751class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 752class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 753class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 754 755class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 756class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 757class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 758class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 759 760class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 761class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 762class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 763class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 764 765class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 766class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 767class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 768class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 769 770class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 771class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 772 773class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 774class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 775 776class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 777class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 778class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 779class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 780 781class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 782class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 783class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 784class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 785 786class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 787class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 788class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 789class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 790 791class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 792class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 793class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 794class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 795 796class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 797class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 798class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 799class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 800 801class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 802class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 803class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 804class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 805 806class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 807class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 808class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 809class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 810 811class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 812class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 813class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 814class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 815 816class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 817class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 818class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 819class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 820 821class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 822class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 823class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 824class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 825 826class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 827class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 828class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 829class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 830 831class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 832class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 833class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 834class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 835 836class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 837class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 838class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 839class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 840 841class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 842 843class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 844class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 845 846class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 847class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 848 849class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 850class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 851class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 852class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 853 854class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 855class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 856 857class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 858class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 859 860class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 861class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 862class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 863class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 864 865class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 866class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 867class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 868class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 869 870class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 871class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 872class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 873class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 874 875class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 876 877class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 878 879class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 880 881class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 882 883class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 884class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 885class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 886class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 887 888class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 889class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 890class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 891class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 892 893class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 894class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 895class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 896class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 897 898class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 899class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 900class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 901class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 902 903class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 904class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 905class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 906class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 907 908class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 909class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 910class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 911 912class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 913class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 914class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 915class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 916 917class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 918class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 919class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 920class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 921 922class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 923class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 924class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 925class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 926 927class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 928class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 929class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 930class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 931 932class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 933class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 934class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 935class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 936 937class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 938class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 939class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 940class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 941 942class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 943class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 944class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 945class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 946 947class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 948class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 949class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 950class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 951 952class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 953class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 954class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 955class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 956 957class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 958class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 959class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 960class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 961 962class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 963class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 964class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 965class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 966 967class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 968class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 969class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 970class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 971 972class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 973class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 974class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 975class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 976 977class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 978class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 979class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 980class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 981 982class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 983class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 984class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 985class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 986 987class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 988class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 989class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 990class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 991 992class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 993class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 994class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 995class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 996 997class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 998class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 999class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 1000class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 1001 1002class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 1003class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 1004class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1005class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1006 1007class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1008class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1009class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1010class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1011 1012class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1013class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1014class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1015class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1016 1017class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1018class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1019class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1020class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1021 1022class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1023class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1024class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1025class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1026 1027class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1028 1029class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1030 1031// Instruction desc. 1032class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1033 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1034 InstrItinClass itin = NoItinerary> { 1035 dag OutOperandList = (outs ROWD:$wd); 1036 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1037 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1038 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1039 InstrItinClass Itinerary = itin; 1040} 1041 1042class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1043 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1044 InstrItinClass itin = NoItinerary> { 1045 dag OutOperandList = (outs ROWD:$wd); 1046 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1047 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1048 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1049 InstrItinClass Itinerary = itin; 1050} 1051 1052class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1053 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1054 InstrItinClass itin = NoItinerary> { 1055 dag OutOperandList = (outs ROWD:$wd); 1056 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1057 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1058 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1059 InstrItinClass Itinerary = itin; 1060} 1061 1062class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1063 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1064 InstrItinClass itin = NoItinerary> { 1065 dag OutOperandList = (outs ROWD:$wd); 1066 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1067 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1068 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1069 InstrItinClass Itinerary = itin; 1070} 1071 1072class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1073 SplatComplexPattern SplatImm, 1074 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1075 InstrItinClass itin = NoItinerary> { 1076 dag OutOperandList = (outs ROWD:$wd); 1077 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1078 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1079 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1080 InstrItinClass Itinerary = itin; 1081} 1082 1083class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1084 ValueType VecTy, RegisterOperand ROD, 1085 RegisterOperand ROWS, 1086 InstrItinClass itin = NoItinerary> { 1087 dag OutOperandList = (outs ROD:$rd); 1088 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1089 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1090 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1091 InstrItinClass Itinerary = itin; 1092} 1093 1094class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1095 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1096 InstrItinClass itin = NoItinerary> { 1097 dag OutOperandList = (outs ROWD:$wd); 1098 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1099 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1100 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1101 InstrItinClass Itinerary = itin; 1102} 1103 1104class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1105 RegisterClass RCD, RegisterClass RCWS> : 1106 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1107 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1108 bit usesCustomInserter = 1; 1109} 1110 1111class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1112 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1113 RegisterOperand ROWS = ROWD, 1114 InstrItinClass itin = NoItinerary> { 1115 dag OutOperandList = (outs ROWD:$wd); 1116 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1117 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1118 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1119 InstrItinClass Itinerary = itin; 1120} 1121 1122class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1123 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1124 RegisterOperand ROWS = ROWD, 1125 InstrItinClass itin = NoItinerary> { 1126 dag OutOperandList = (outs ROWD:$wd); 1127 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1128 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1129 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1130 InstrItinClass Itinerary = itin; 1131} 1132 1133// This class is deprecated and will be removed in the next few patches 1134class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1135 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1136 InstrItinClass itin = NoItinerary> { 1137 dag OutOperandList = (outs ROWD:$wd); 1138 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1139 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1140 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1141 InstrItinClass Itinerary = itin; 1142} 1143 1144class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1145 RegisterOperand ROWS = ROWD, 1146 InstrItinClass itin = NoItinerary> { 1147 dag OutOperandList = (outs ROWD:$wd); 1148 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1149 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1150 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1151 InstrItinClass Itinerary = itin; 1152} 1153 1154class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1155 InstrItinClass itin = NoItinerary> { 1156 dag OutOperandList = (outs RCWD:$wd); 1157 dag InOperandList = (ins vsplat_simm10:$i10); 1158 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1159 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1160 list<dag> Pattern = []; 1161 bit hasSideEffects = 0; 1162 InstrItinClass Itinerary = itin; 1163} 1164 1165class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1166 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1167 InstrItinClass itin = NoItinerary> { 1168 dag OutOperandList = (outs ROWD:$wd); 1169 dag InOperandList = (ins ROWS:$ws); 1170 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1171 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1172 InstrItinClass Itinerary = itin; 1173} 1174 1175class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1176 SDPatternOperator OpNode, RegisterOperand ROWD, 1177 RegisterOperand ROS = ROWD, 1178 InstrItinClass itin = NoItinerary> { 1179 dag OutOperandList = (outs ROWD:$wd); 1180 dag InOperandList = (ins ROS:$rs); 1181 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1182 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))]; 1183 InstrItinClass Itinerary = itin; 1184} 1185 1186class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode, 1187 RegisterClass RCWD, RegisterClass RCWS = RCWD> : 1188 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs), 1189 [(set RCWD:$wd, (OpNode RCWS:$fs))]> { 1190 let usesCustomInserter = 1; 1191} 1192 1193class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1194 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1195 InstrItinClass itin = NoItinerary> { 1196 dag OutOperandList = (outs ROWD:$wd); 1197 dag InOperandList = (ins ROWS:$ws); 1198 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1199 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1200 InstrItinClass Itinerary = itin; 1201} 1202 1203class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1204 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1205 RegisterOperand ROWT = ROWD, 1206 InstrItinClass itin = NoItinerary> { 1207 dag OutOperandList = (outs ROWD:$wd); 1208 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1209 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1210 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1211 InstrItinClass Itinerary = itin; 1212} 1213 1214class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1215 RegisterOperand ROWS = ROWD, 1216 RegisterOperand ROWT = ROWD, 1217 InstrItinClass itin = NoItinerary> { 1218 dag OutOperandList = (outs ROWD:$wd); 1219 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1220 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1221 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1222 ROWT:$wt))]; 1223 string Constraints = "$wd = $wd_in"; 1224 InstrItinClass Itinerary = itin; 1225} 1226 1227class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1228 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1229 RegisterOperand ROWT = ROWD, 1230 InstrItinClass itin = NoItinerary> { 1231 dag OutOperandList = (outs ROWD:$wd); 1232 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1233 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1234 list<dag> Pattern = [(set ROWD:$wd, 1235 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1236 InstrItinClass Itinerary = itin; 1237 string Constraints = "$wd = $wd_in"; 1238} 1239 1240class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1241 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1242 RegisterOperand ROWT = ROWD, 1243 InstrItinClass itin = NoItinerary> : 1244 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1245 1246class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1247 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1248 RegisterOperand ROWT = ROWD, 1249 InstrItinClass itin = NoItinerary> : 1250 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1251 1252class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1253 dag OutOperandList = (outs); 1254 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1255 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1256 list<dag> Pattern = []; 1257 InstrItinClass Itinerary = IIBranch; 1258 bit isBranch = 1; 1259 bit isTerminator = 1; 1260 bit hasDelaySlot = 1; 1261 list<Register> Defs = [AT]; 1262} 1263 1264class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1265 RegisterOperand ROWD, RegisterOperand ROS, 1266 InstrItinClass itin = NoItinerary> { 1267 dag OutOperandList = (outs ROWD:$wd); 1268 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1269 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1270 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1271 ROS:$rs, 1272 immZExt6:$n))]; 1273 InstrItinClass Itinerary = itin; 1274 string Constraints = "$wd = $wd_in"; 1275} 1276 1277class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1278 RegisterOperand ROWD, RegisterOperand ROFS> : 1279 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1280 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1281 immZExt6:$n))]> { 1282 bit usesCustomInserter = 1; 1283 string Constraints = "$wd = $wd_in"; 1284} 1285 1286class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1287 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1288 InstrItinClass itin = NoItinerary> { 1289 dag OutOperandList = (outs ROWD:$wd); 1290 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1291 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1292 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1293 immZExt6:$n, 1294 ROWS:$ws))]; 1295 InstrItinClass Itinerary = itin; 1296 string Constraints = "$wd = $wd_in"; 1297} 1298 1299class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1300 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1301 RegisterOperand ROWT = ROWD, 1302 InstrItinClass itin = NoItinerary> { 1303 dag OutOperandList = (outs ROWD:$wd); 1304 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1305 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1306 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1307 InstrItinClass Itinerary = itin; 1308} 1309 1310class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1311 RegisterOperand ROWD, 1312 RegisterOperand ROWS = ROWD, 1313 InstrItinClass itin = NoItinerary> { 1314 dag OutOperandList = (outs ROWD:$wd); 1315 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1316 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1317 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1318 ROWS:$ws))]; 1319 InstrItinClass Itinerary = itin; 1320} 1321 1322class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1323 RegisterOperand ROWS = ROWD, 1324 RegisterOperand ROWT = ROWD> : 1325 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1326 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1327 1328class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1329 IsCommutable; 1330class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1331 IsCommutable; 1332class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1333 IsCommutable; 1334class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1335 IsCommutable; 1336 1337class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1338 MSA128BOpnd>, IsCommutable; 1339class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1340 MSA128HOpnd>, IsCommutable; 1341class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1342 MSA128WOpnd>, IsCommutable; 1343class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1344 MSA128DOpnd>, IsCommutable; 1345 1346class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1347 MSA128BOpnd>, IsCommutable; 1348class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1349 MSA128HOpnd>, IsCommutable; 1350class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1351 MSA128WOpnd>, IsCommutable; 1352class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1353 MSA128DOpnd>, IsCommutable; 1354 1355class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1356 MSA128BOpnd>, IsCommutable; 1357class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1358 MSA128HOpnd>, IsCommutable; 1359class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1360 MSA128WOpnd>, IsCommutable; 1361class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1362 MSA128DOpnd>, IsCommutable; 1363 1364class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1365class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1366class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1367class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1368 1369class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1370 MSA128BOpnd>; 1371class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1372 MSA128HOpnd>; 1373class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1374 MSA128WOpnd>; 1375class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1376 MSA128DOpnd>; 1377 1378class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1379class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1380class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1381class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1382 1383class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1384 MSA128BOpnd>; 1385 1386class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1387 MSA128BOpnd>; 1388class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1389 MSA128HOpnd>; 1390class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1391 MSA128WOpnd>; 1392class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1393 MSA128DOpnd>; 1394 1395class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1396 MSA128BOpnd>; 1397class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1398 MSA128HOpnd>; 1399class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1400 MSA128WOpnd>; 1401class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1402 MSA128DOpnd>; 1403 1404class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1405 IsCommutable; 1406class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1407 IsCommutable; 1408class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1409 IsCommutable; 1410class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1411 IsCommutable; 1412 1413class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1414 IsCommutable; 1415class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1416 IsCommutable; 1417class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1418 IsCommutable; 1419class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1420 IsCommutable; 1421 1422class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1423 MSA128BOpnd>, IsCommutable; 1424class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1425 MSA128HOpnd>, IsCommutable; 1426class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1427 MSA128WOpnd>, IsCommutable; 1428class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1429 MSA128DOpnd>, IsCommutable; 1430 1431class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1432 MSA128BOpnd>, IsCommutable; 1433class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1434 MSA128HOpnd>, IsCommutable; 1435class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1436 MSA128WOpnd>, IsCommutable; 1437class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1438 MSA128DOpnd>, IsCommutable; 1439 1440class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1441class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1442class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1443class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1444 1445class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1446 MSA128BOpnd>; 1447class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1448 MSA128HOpnd>; 1449class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1450 MSA128WOpnd>; 1451class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1452 MSA128DOpnd>; 1453 1454class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1455class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1456class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1457class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1458 1459class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1460 MSA128BOpnd>; 1461class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1462 MSA128HOpnd>; 1463class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1464 MSA128WOpnd>; 1465class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1466 MSA128DOpnd>; 1467 1468class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1469class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1470class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1471class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1472 1473class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1474 MSA128BOpnd>; 1475class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1476 MSA128HOpnd>; 1477class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1478 MSA128WOpnd>; 1479class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1480 MSA128DOpnd>; 1481 1482class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1483 1484class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1485 MSA128BOpnd>; 1486 1487class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1488 1489class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1490 1491class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1492class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1493class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1494class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1495 1496class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1497 MSA128BOpnd>; 1498class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1499 MSA128HOpnd>; 1500class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1501 MSA128WOpnd>; 1502class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1503 MSA128DOpnd>; 1504 1505class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1506class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1507class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1508class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1509 1510class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1511 1512class BSEL_V_DESC { 1513 dag OutOperandList = (outs MSA128BOpnd:$wd); 1514 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1515 MSA128BOpnd:$wt); 1516 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1517 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1518 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1519 MSA128BOpnd:$wt))]; 1520 InstrItinClass Itinerary = NoItinerary; 1521 string Constraints = "$wd = $wd_in"; 1522} 1523 1524class BSELI_B_DESC { 1525 dag OutOperandList = (outs MSA128BOpnd:$wd); 1526 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1527 vsplat_uimm8:$u8); 1528 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1529 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1530 MSA128BOpnd:$ws, 1531 vsplati8_uimm8:$u8))]; 1532 InstrItinClass Itinerary = NoItinerary; 1533 string Constraints = "$wd = $wd_in"; 1534} 1535 1536class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1537class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1538class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1539class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1540 1541class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1542 MSA128BOpnd>; 1543class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1544 MSA128HOpnd>; 1545class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1546 MSA128WOpnd>; 1547class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1548 MSA128DOpnd>; 1549 1550class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1551class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1552class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1553class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1554 1555class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1556 1557class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1558 IsCommutable; 1559class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1560 IsCommutable; 1561class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1562 IsCommutable; 1563class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1564 IsCommutable; 1565 1566class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1567 MSA128BOpnd>; 1568class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1569 MSA128HOpnd>; 1570class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1571 MSA128WOpnd>; 1572class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1573 MSA128DOpnd>; 1574 1575class CFCMSA_DESC { 1576 dag OutOperandList = (outs GPR32:$rd); 1577 dag InOperandList = (ins MSACtrl:$cs); 1578 string AsmString = "cfcmsa\t$rd, $cs"; 1579 InstrItinClass Itinerary = NoItinerary; 1580 bit hasSideEffects = 1; 1581} 1582 1583class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1584class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1585class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1586class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1587 1588class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1589class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1590class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1591class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1592 1593class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1594 vsplati8_simm5, MSA128BOpnd>; 1595class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1596 vsplati16_simm5, MSA128HOpnd>; 1597class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1598 vsplati32_simm5, MSA128WOpnd>; 1599class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1600 vsplati64_simm5, MSA128DOpnd>; 1601 1602class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1603 vsplati8_uimm5, MSA128BOpnd>; 1604class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1605 vsplati16_uimm5, MSA128HOpnd>; 1606class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1607 vsplati32_uimm5, MSA128WOpnd>; 1608class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1609 vsplati64_uimm5, MSA128DOpnd>; 1610 1611class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1612class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1613class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1614class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1615 1616class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1617class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1618class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1619class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1620 1621class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1622 vsplati8_simm5, MSA128BOpnd>; 1623class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1624 vsplati16_simm5, MSA128HOpnd>; 1625class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1626 vsplati32_simm5, MSA128WOpnd>; 1627class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1628 vsplati64_simm5, MSA128DOpnd>; 1629 1630class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1631 vsplati8_uimm5, MSA128BOpnd>; 1632class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1633 vsplati16_uimm5, MSA128HOpnd>; 1634class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1635 vsplati32_uimm5, MSA128WOpnd>; 1636class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1637 vsplati64_uimm5, MSA128DOpnd>; 1638 1639class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1640 GPR32Opnd, MSA128BOpnd>; 1641class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1642 GPR32Opnd, MSA128HOpnd>; 1643class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1644 GPR32Opnd, MSA128WOpnd>; 1645 1646class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1647 GPR32Opnd, MSA128BOpnd>; 1648class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1649 GPR32Opnd, MSA128HOpnd>; 1650class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1651 GPR32Opnd, MSA128WOpnd>; 1652 1653class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1654 MSA128W>; 1655class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1656 MSA128D>; 1657 1658class CTCMSA_DESC { 1659 dag OutOperandList = (outs); 1660 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1661 string AsmString = "ctcmsa\t$cd, $rs"; 1662 InstrItinClass Itinerary = NoItinerary; 1663 bit hasSideEffects = 1; 1664} 1665 1666class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1667class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1668class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1669class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1670 1671class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1672class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1673class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1674class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1675 1676class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1677 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1678 IsCommutable; 1679class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1680 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1681 IsCommutable; 1682class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1683 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1684 IsCommutable; 1685 1686class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1687 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1688 IsCommutable; 1689class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1690 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1691 IsCommutable; 1692class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1693 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1694 IsCommutable; 1695 1696class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1697 MSA128HOpnd, MSA128BOpnd, 1698 MSA128BOpnd>, IsCommutable; 1699class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1700 MSA128WOpnd, MSA128HOpnd, 1701 MSA128HOpnd>, IsCommutable; 1702class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1703 MSA128DOpnd, MSA128WOpnd, 1704 MSA128WOpnd>, IsCommutable; 1705 1706class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1707 MSA128HOpnd, MSA128BOpnd, 1708 MSA128BOpnd>, IsCommutable; 1709class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1710 MSA128WOpnd, MSA128HOpnd, 1711 MSA128HOpnd>, IsCommutable; 1712class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1713 MSA128DOpnd, MSA128WOpnd, 1714 MSA128WOpnd>, IsCommutable; 1715 1716class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1717 MSA128HOpnd, MSA128BOpnd, 1718 MSA128BOpnd>; 1719class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1720 MSA128WOpnd, MSA128HOpnd, 1721 MSA128HOpnd>; 1722class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1723 MSA128DOpnd, MSA128WOpnd, 1724 MSA128WOpnd>; 1725 1726class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1727 MSA128HOpnd, MSA128BOpnd, 1728 MSA128BOpnd>; 1729class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1730 MSA128WOpnd, MSA128HOpnd, 1731 MSA128HOpnd>; 1732class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1733 MSA128DOpnd, MSA128WOpnd, 1734 MSA128WOpnd>; 1735 1736class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1737 IsCommutable; 1738class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1739 IsCommutable; 1740 1741class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1742 IsCommutable; 1743class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1744 IsCommutable; 1745 1746class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1747 IsCommutable; 1748class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1749 IsCommutable; 1750 1751class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1752 MSA128WOpnd>; 1753class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1754 MSA128DOpnd>; 1755 1756class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1757class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1758 1759class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1760class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1761 1762class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1763 IsCommutable; 1764class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1765 IsCommutable; 1766 1767class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1768 IsCommutable; 1769class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1770 IsCommutable; 1771 1772class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1773 IsCommutable; 1774class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1775 IsCommutable; 1776 1777class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1778 IsCommutable; 1779class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1780 IsCommutable; 1781 1782class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1783 IsCommutable; 1784class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1785 IsCommutable; 1786 1787class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1788 IsCommutable; 1789class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1790 IsCommutable; 1791 1792class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1793 IsCommutable; 1794class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1795 IsCommutable; 1796 1797class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1798class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1799 1800class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1801 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1802class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1803 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1804 1805class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1806 MSA128WOpnd>; 1807class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1808 MSA128DOpnd>; 1809 1810class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1811 MSA128WOpnd, MSA128HOpnd>; 1812class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1813 MSA128DOpnd, MSA128WOpnd>; 1814 1815class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1816 MSA128WOpnd, MSA128HOpnd>; 1817class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1818 MSA128DOpnd, MSA128WOpnd>; 1819 1820class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1821class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1822 1823class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1824class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1825 1826class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1827 MSA128WOpnd, MSA128HOpnd>; 1828class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1829 MSA128DOpnd, MSA128WOpnd>; 1830 1831class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1832 MSA128WOpnd, MSA128HOpnd>; 1833class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1834 MSA128DOpnd, MSA128WOpnd>; 1835 1836class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1837 MSA128BOpnd, GPR32Opnd>; 1838class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1839 MSA128HOpnd, GPR32Opnd>; 1840class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1841 MSA128WOpnd, GPR32Opnd>; 1842 1843class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W, 1844 FGR32>; 1845class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D, 1846 FGR64>; 1847 1848class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1849class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1850 1851class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1852class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1853 1854class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1855class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1856 1857class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1858 MSA128WOpnd>; 1859class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1860 MSA128DOpnd>; 1861 1862class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1863class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1864 1865class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1866 MSA128WOpnd>; 1867class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1868 MSA128DOpnd>; 1869 1870class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1871class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1872 1873class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1874class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1875 1876class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1877class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1878 1879class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1880class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1881 1882class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1883 MSA128WOpnd>; 1884class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1885 MSA128DOpnd>; 1886 1887class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1888class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1889 1890class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1891class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1892 1893class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1894class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1895 1896class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1897class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1898 1899class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1900class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1901 1902class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1903class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1904 1905class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1906class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1907 1908class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1909class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1910 1911class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1912 MSA128WOpnd>; 1913class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1914 MSA128DOpnd>; 1915 1916class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1917 MSA128WOpnd>; 1918class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1919 MSA128DOpnd>; 1920 1921class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1922 MSA128WOpnd>; 1923class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1924 MSA128DOpnd>; 1925 1926class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1927 MSA128WOpnd>; 1928class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1929 MSA128DOpnd>; 1930 1931class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1932 MSA128WOpnd>; 1933class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1934 MSA128DOpnd>; 1935 1936class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1937 MSA128WOpnd>; 1938class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1939 MSA128DOpnd>; 1940 1941class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1942 MSA128WOpnd>; 1943class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1944 MSA128DOpnd>; 1945 1946class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1947 MSA128WOpnd>; 1948class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1949 MSA128DOpnd>; 1950 1951class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1952 MSA128WOpnd>; 1953class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1954 MSA128DOpnd>; 1955 1956class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1957 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1958class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1959 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1960 1961class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1962 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1963class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1964 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1965class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1966 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1967 1968class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1969 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1970class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1971 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1972class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1973 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1974 1975class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1976 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1977class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1978 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1979class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1980 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1981 1982class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1983 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1984class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1985 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1986class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1987 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1988 1989class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1990class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1991class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1992class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1993 1994class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1995class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1996class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1997class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1998 1999class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 2000class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 2001class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 2002class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 2003 2004class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 2005class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 2006class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 2007class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 2008 2009class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 2010 MSA128BOpnd, GPR32Opnd>; 2011class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 2012 MSA128HOpnd, GPR32Opnd>; 2013class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 2014 MSA128WOpnd, GPR32Opnd>; 2015 2016class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2017 MSA128WOpnd, FGR32Opnd>; 2018class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2019 MSA128DOpnd, FGR64Opnd>; 2020 2021class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2022 MSA128BOpnd>; 2023class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2024 MSA128HOpnd>; 2025class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2026 MSA128WOpnd>; 2027class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2028 MSA128DOpnd>; 2029 2030class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2031 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2032 ComplexPattern Addr = addrRegImm, 2033 InstrItinClass itin = NoItinerary> { 2034 dag OutOperandList = (outs RCWD:$wd); 2035 dag InOperandList = (ins MemOpnd:$addr); 2036 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2037 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2038 InstrItinClass Itinerary = itin; 2039} 2040 2041class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 2042class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 2043class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 2044class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 2045 2046class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 2047class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 2048class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 2049class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 2050 2051class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2052 ValueType TyNode, RegisterClass RCWD, 2053 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2054 InstrItinClass itin = NoItinerary> { 2055 dag OutOperandList = (outs RCWD:$wd); 2056 dag InOperandList = (ins MemOpnd:$addr); 2057 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2058 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2059 InstrItinClass Itinerary = itin; 2060} 2061 2062class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 2063class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 2064class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 2065class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 2066 2067class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2068 MSA128HOpnd>; 2069class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2070 MSA128WOpnd>; 2071 2072class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2073 MSA128HOpnd>; 2074class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2075 MSA128WOpnd>; 2076 2077class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2078class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2079class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2080class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2081 2082class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2083class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2084class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2085class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2086 2087class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2088class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2089class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2090class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2091 2092class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2093class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2094class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2095class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2096 2097class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2098 MSA128BOpnd>; 2099class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2100 MSA128HOpnd>; 2101class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2102 MSA128WOpnd>; 2103class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2104 MSA128DOpnd>; 2105 2106class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2107 MSA128BOpnd>; 2108class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2109 MSA128HOpnd>; 2110class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2111 MSA128WOpnd>; 2112class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2113 MSA128DOpnd>; 2114 2115class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2116class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2117class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2118class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2119 2120class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2121class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2122class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2123class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2124 2125class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2126class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2127class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2128class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2129 2130class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2131 MSA128BOpnd>; 2132class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2133 MSA128HOpnd>; 2134class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2135 MSA128WOpnd>; 2136class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2137 MSA128DOpnd>; 2138 2139class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2140 MSA128BOpnd>; 2141class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2142 MSA128HOpnd>; 2143class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2144 MSA128WOpnd>; 2145class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2146 MSA128DOpnd>; 2147 2148class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2149class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2150class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2151class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2152 2153class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2154class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2155class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2156class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2157 2158class MOVE_V_DESC { 2159 dag OutOperandList = (outs MSA128B:$wd); 2160 dag InOperandList = (ins MSA128B:$ws); 2161 string AsmString = "move.v\t$wd, $ws"; 2162 list<dag> Pattern = []; 2163 InstrItinClass Itinerary = NoItinerary; 2164} 2165 2166class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2167 MSA128HOpnd>; 2168class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2169 MSA128WOpnd>; 2170 2171class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2172 MSA128HOpnd>; 2173class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2174 MSA128WOpnd>; 2175 2176class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2177class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2178class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2179class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2180 2181class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2182 MSA128HOpnd>; 2183class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2184 MSA128WOpnd>; 2185 2186class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2187 MSA128HOpnd>; 2188class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2189 MSA128WOpnd>; 2190 2191class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2192class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2193class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2194class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2195 2196class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2197class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2198class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2199class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2200 2201class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2202class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2203class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2204class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2205 2206class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2207class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2208class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2209class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2210 2211class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2212 MSA128BOpnd>; 2213 2214class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2215class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2216class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2217class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2218 2219class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2220 2221class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2222class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2223class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2224class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2225 2226class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2227class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2228class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2229class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2230 2231class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2232class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2233class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2234class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2235 2236class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2237 MSA128BOpnd>; 2238class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2239 MSA128HOpnd>; 2240class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2241 MSA128WOpnd>; 2242class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2243 MSA128DOpnd>; 2244 2245class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2246 MSA128BOpnd>; 2247class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2248 MSA128HOpnd>; 2249class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2250 MSA128WOpnd>; 2251class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2252 MSA128DOpnd>; 2253 2254class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2255class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2256class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2257 2258class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2259class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2260class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2261class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2262 2263class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2264class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2265class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2266class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2267 2268class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2269class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2270class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2271class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2272 2273class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2274 MSA128BOpnd>; 2275class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2276 MSA128HOpnd>; 2277class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2278 MSA128WOpnd>; 2279class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2280 MSA128DOpnd>; 2281 2282class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2283 MSA128BOpnd, GPR32Opnd>; 2284class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2285 MSA128HOpnd, GPR32Opnd>; 2286class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2287 MSA128WOpnd, GPR32Opnd>; 2288class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2289 MSA128DOpnd, GPR32Opnd>; 2290 2291class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2292 MSA128BOpnd>; 2293class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2294 MSA128HOpnd>; 2295class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2296 MSA128WOpnd>; 2297class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2298 MSA128DOpnd>; 2299 2300class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2301class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2302class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2303class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2304 2305class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2306 MSA128BOpnd>; 2307class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2308 MSA128HOpnd>; 2309class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2310 MSA128WOpnd>; 2311class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2312 MSA128DOpnd>; 2313 2314class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2315class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2316class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2317class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2318 2319class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2320 MSA128BOpnd>; 2321class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2322 MSA128HOpnd>; 2323class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2324 MSA128WOpnd>; 2325class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2326 MSA128DOpnd>; 2327 2328class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2329class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2330class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2331class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2332 2333class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2334 MSA128BOpnd>; 2335class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2336 MSA128HOpnd>; 2337class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2338 MSA128WOpnd>; 2339class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2340 MSA128DOpnd>; 2341 2342class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2343class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2344class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2345class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2346 2347class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2348 MSA128BOpnd>; 2349class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2350 MSA128HOpnd>; 2351class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2352 MSA128WOpnd>; 2353class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2354 MSA128DOpnd>; 2355 2356class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2357 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2358 ComplexPattern Addr = addrRegImm, 2359 InstrItinClass itin = NoItinerary> { 2360 dag OutOperandList = (outs); 2361 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2362 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2363 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2364 InstrItinClass Itinerary = itin; 2365} 2366 2367class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2368class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2369class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2370class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2371 2372class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2373 ValueType TyNode, RegisterClass RCWD, 2374 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2375 InstrItinClass itin = NoItinerary> { 2376 dag OutOperandList = (outs); 2377 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2378 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2379 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2380 InstrItinClass Itinerary = itin; 2381} 2382 2383class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2384class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2385class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2386class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2387 2388class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2389 MSA128BOpnd>; 2390class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2391 MSA128HOpnd>; 2392class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2393 MSA128WOpnd>; 2394class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2395 MSA128DOpnd>; 2396 2397class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2398 MSA128BOpnd>; 2399class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2400 MSA128HOpnd>; 2401class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2402 MSA128WOpnd>; 2403class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2404 MSA128DOpnd>; 2405 2406class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2407 MSA128BOpnd>; 2408class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2409 MSA128HOpnd>; 2410class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2411 MSA128WOpnd>; 2412class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2413 MSA128DOpnd>; 2414 2415class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2416 MSA128BOpnd>; 2417class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2418 MSA128HOpnd>; 2419class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2420 MSA128WOpnd>; 2421class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2422 MSA128DOpnd>; 2423 2424class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2425class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2426class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2427class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2428 2429class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2430 MSA128BOpnd>; 2431class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2432 MSA128HOpnd>; 2433class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2434 MSA128WOpnd>; 2435class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2436 MSA128DOpnd>; 2437 2438class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2439class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2440class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2441class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2442 2443class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2444class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2445class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2446class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2447 2448class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2449 MSA128BOpnd>; 2450 2451// Instruction defs. 2452def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2453def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2454def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2455def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2456 2457def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2458def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2459def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2460def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2461 2462def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2463def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2464def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2465def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2466 2467def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2468def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2469def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2470def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2471 2472def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2473def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2474def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2475def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2476 2477def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2478def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2479def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2480def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2481 2482def AND_V : AND_V_ENC, AND_V_DESC; 2483def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2484 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2485 MSA128BOpnd:$ws, 2486 MSA128BOpnd:$wt)>; 2487def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2488 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2489 MSA128BOpnd:$ws, 2490 MSA128BOpnd:$wt)>; 2491def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2492 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2493 MSA128BOpnd:$ws, 2494 MSA128BOpnd:$wt)>; 2495 2496def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2497 2498def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2499def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2500def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2501def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2502 2503def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2504def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2505def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2506def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2507 2508def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2509def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2510def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2511def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2512 2513def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2514def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2515def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2516def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2517 2518def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2519def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2520def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2521def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2522 2523def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2524def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2525def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2526def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2527 2528def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2529def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2530def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2531def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2532 2533def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2534def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2535def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2536def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2537 2538def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2539def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2540def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2541def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2542 2543def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2544def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2545def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2546def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2547 2548def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2549def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2550def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2551def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2552 2553def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2554def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2555def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2556def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2557 2558def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2559 2560def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2561 2562def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2563 2564def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2565 2566def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2567def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2568def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2569def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2570 2571def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2572def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2573def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2574def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2575 2576def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2577def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2578def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2579def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2580 2581def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2582 2583def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2584 2585class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2586 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2587 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2588 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2589 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2590 let Constraints = "$wd_in = $wd"; 2591} 2592 2593def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2594def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2595def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2596def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2597def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2598 2599def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2600 2601def BSET_B : BSET_B_ENC, BSET_B_DESC; 2602def BSET_H : BSET_H_ENC, BSET_H_DESC; 2603def BSET_W : BSET_W_ENC, BSET_W_DESC; 2604def BSET_D : BSET_D_ENC, BSET_D_DESC; 2605 2606def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2607def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2608def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2609def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2610 2611def BZ_B : BZ_B_ENC, BZ_B_DESC; 2612def BZ_H : BZ_H_ENC, BZ_H_DESC; 2613def BZ_W : BZ_W_ENC, BZ_W_DESC; 2614def BZ_D : BZ_D_ENC, BZ_D_DESC; 2615 2616def BZ_V : BZ_V_ENC, BZ_V_DESC; 2617 2618def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2619def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2620def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2621def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2622 2623def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2624def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2625def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2626def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2627 2628def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2629 2630def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2631def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2632def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2633def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2634 2635def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2636def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2637def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2638def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2639 2640def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2641def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2642def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2643def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2644 2645def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2646def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2647def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2648def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2649 2650def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2651def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2652def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2653def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2654 2655def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2656def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2657def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2658def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2659 2660def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2661def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2662def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2663def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2664 2665def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2666def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2667def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2668def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2669 2670def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2671def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2672def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2673 2674def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2675def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2676def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2677 2678def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2679def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2680 2681def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2682 2683def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2684def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2685def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2686def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2687 2688def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2689def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2690def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2691def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2692 2693def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2694def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2695def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2696 2697def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2698def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2699def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2700 2701def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2702def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2703def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2704 2705def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2706def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2707def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2708 2709def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2710def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2711def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2712 2713def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2714def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2715def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2716 2717def FADD_W : FADD_W_ENC, FADD_W_DESC; 2718def FADD_D : FADD_D_ENC, FADD_D_DESC; 2719 2720def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2721def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2722 2723def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2724def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2725 2726def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2727def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2728 2729def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2730def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2731 2732def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2733def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2734 2735def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2736def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2737 2738def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2739def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2740 2741def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2742def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2743 2744def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2745def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2746 2747def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2748def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2749 2750def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2751def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2752 2753def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2754def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2755 2756def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2757def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2758 2759def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2760def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2761 2762def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2763def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2764 2765def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2766def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2767 2768def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2769def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2770 2771def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2772def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2773 2774def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2775def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2776 2777def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2778def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2779 2780def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2781def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2782 2783def FILL_B : FILL_B_ENC, FILL_B_DESC; 2784def FILL_H : FILL_H_ENC, FILL_H_DESC; 2785def FILL_W : FILL_W_ENC, FILL_W_DESC; 2786def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC; 2787def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC; 2788 2789def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2790def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2791 2792def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2793def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2794 2795def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2796def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2797 2798def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2799def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2800 2801def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2802def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2803 2804def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2805def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2806 2807def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2808def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2809 2810def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2811def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2812 2813def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2814def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2815 2816def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2817def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2818 2819def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2820def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2821 2822def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2823def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2824 2825def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2826def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2827 2828def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2829def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2830 2831def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2832def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2833 2834def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2835def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2836 2837def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2838def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2839 2840def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2841def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2842 2843def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2844def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2845 2846def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2847def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2848 2849def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2850def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2851 2852def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2853def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2854 2855def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2856def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2857 2858def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2859def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2860 2861def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2862def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2863 2864def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2865def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2866 2867def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2868def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2869 2870def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2871def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2872 2873def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2874def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2875 2876def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2877def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2878def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2879 2880def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2881def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2882def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2883 2884def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2885def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2886def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2887 2888def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2889def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2890def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2891 2892def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2893def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2894def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2895def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2896 2897def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2898def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2899def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2900def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2901 2902def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2903def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2904def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2905def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2906 2907def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2908def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2909def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2910def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2911 2912def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2913def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2914def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2915 2916// INSERT_FW_PSEUDO defined after INSVE_W 2917// INSERT_FD_PSEUDO defined after INSVE_D 2918 2919def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2920def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2921def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2922def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2923 2924def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2925def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2926 2927def LD_B: LD_B_ENC, LD_B_DESC; 2928def LD_H: LD_H_ENC, LD_H_DESC; 2929def LD_W: LD_W_ENC, LD_W_DESC; 2930def LD_D: LD_D_ENC, LD_D_DESC; 2931 2932def LDI_B : LDI_B_ENC, LDI_B_DESC; 2933def LDI_H : LDI_H_ENC, LDI_H_DESC; 2934def LDI_W : LDI_W_ENC, LDI_W_DESC; 2935def LDI_D : LDI_D_ENC, LDI_D_DESC; 2936 2937def LDX_B: LDX_B_ENC, LDX_B_DESC; 2938def LDX_H: LDX_H_ENC, LDX_H_DESC; 2939def LDX_W: LDX_W_ENC, LDX_W_DESC; 2940def LDX_D: LDX_D_ENC, LDX_D_DESC; 2941 2942def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2943def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2944 2945def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2946def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2947 2948def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2949def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2950def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2951def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2952 2953def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2954def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2955def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2956def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2957 2958def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2959def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2960def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2961def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2962 2963def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2964def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2965def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2966def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2967 2968def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2969def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2970def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2971def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2972 2973def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2974def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2975def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2976def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2977 2978def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2979def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2980def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2981def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2982 2983def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2984def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2985def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2986def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2987 2988def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2989def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2990def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2991def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2992 2993def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2994def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2995def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2996def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2997 2998def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2999def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 3000def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 3001def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 3002 3003def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 3004def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 3005def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 3006def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 3007 3008def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 3009def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 3010def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 3011def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 3012 3013def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 3014 3015def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 3016def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 3017 3018def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 3019def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 3020 3021def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 3022def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 3023def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 3024def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 3025 3026def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 3027def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3028 3029def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3030def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3031 3032def MULV_B : MULV_B_ENC, MULV_B_DESC; 3033def MULV_H : MULV_H_ENC, MULV_H_DESC; 3034def MULV_W : MULV_W_ENC, MULV_W_DESC; 3035def MULV_D : MULV_D_ENC, MULV_D_DESC; 3036 3037def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3038def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3039def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3040def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3041 3042def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3043def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3044def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3045def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3046 3047def NOR_V : NOR_V_ENC, NOR_V_DESC; 3048def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3049 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3050 MSA128BOpnd:$ws, 3051 MSA128BOpnd:$wt)>; 3052def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3053 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3054 MSA128BOpnd:$ws, 3055 MSA128BOpnd:$wt)>; 3056def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3057 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3058 MSA128BOpnd:$ws, 3059 MSA128BOpnd:$wt)>; 3060 3061def NORI_B : NORI_B_ENC, NORI_B_DESC; 3062 3063def OR_V : OR_V_ENC, OR_V_DESC; 3064def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3065 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3066 MSA128BOpnd:$ws, 3067 MSA128BOpnd:$wt)>; 3068def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3069 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3070 MSA128BOpnd:$ws, 3071 MSA128BOpnd:$wt)>; 3072def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3073 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3074 MSA128BOpnd:$ws, 3075 MSA128BOpnd:$wt)>; 3076 3077def ORI_B : ORI_B_ENC, ORI_B_DESC; 3078 3079def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3080def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3081def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3082def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3083 3084def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3085def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3086def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3087def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3088 3089def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3090def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3091def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3092def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3093 3094def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3095def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3096def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3097def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3098 3099def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3100def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3101def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3102def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3103 3104def SHF_B : SHF_B_ENC, SHF_B_DESC; 3105def SHF_H : SHF_H_ENC, SHF_H_DESC; 3106def SHF_W : SHF_W_ENC, SHF_W_DESC; 3107 3108def SLD_B : SLD_B_ENC, SLD_B_DESC; 3109def SLD_H : SLD_H_ENC, SLD_H_DESC; 3110def SLD_W : SLD_W_ENC, SLD_W_DESC; 3111def SLD_D : SLD_D_ENC, SLD_D_DESC; 3112 3113def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3114def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3115def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3116def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3117 3118def SLL_B : SLL_B_ENC, SLL_B_DESC; 3119def SLL_H : SLL_H_ENC, SLL_H_DESC; 3120def SLL_W : SLL_W_ENC, SLL_W_DESC; 3121def SLL_D : SLL_D_ENC, SLL_D_DESC; 3122 3123def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3124def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3125def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3126def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3127 3128def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3129def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3130def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3131def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3132 3133def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3134def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3135def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3136def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3137 3138def SRA_B : SRA_B_ENC, SRA_B_DESC; 3139def SRA_H : SRA_H_ENC, SRA_H_DESC; 3140def SRA_W : SRA_W_ENC, SRA_W_DESC; 3141def SRA_D : SRA_D_ENC, SRA_D_DESC; 3142 3143def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3144def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3145def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3146def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3147 3148def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3149def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3150def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3151def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3152 3153def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3154def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3155def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3156def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3157 3158def SRL_B : SRL_B_ENC, SRL_B_DESC; 3159def SRL_H : SRL_H_ENC, SRL_H_DESC; 3160def SRL_W : SRL_W_ENC, SRL_W_DESC; 3161def SRL_D : SRL_D_ENC, SRL_D_DESC; 3162 3163def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3164def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3165def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3166def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3167 3168def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3169def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3170def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3171def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3172 3173def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3174def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3175def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3176def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3177 3178def ST_B: ST_B_ENC, ST_B_DESC; 3179def ST_H: ST_H_ENC, ST_H_DESC; 3180def ST_W: ST_W_ENC, ST_W_DESC; 3181def ST_D: ST_D_ENC, ST_D_DESC; 3182 3183def STX_B: STX_B_ENC, STX_B_DESC; 3184def STX_H: STX_H_ENC, STX_H_DESC; 3185def STX_W: STX_W_ENC, STX_W_DESC; 3186def STX_D: STX_D_ENC, STX_D_DESC; 3187 3188def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3189def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3190def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3191def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3192 3193def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3194def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3195def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3196def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3197 3198def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3199def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3200def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3201def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3202 3203def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3204def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3205def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3206def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3207 3208def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3209def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3210def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3211def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3212 3213def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3214def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3215def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3216def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3217 3218def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3219def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3220def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3221def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3222 3223def XOR_V : XOR_V_ENC, XOR_V_DESC; 3224def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3225 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3226 MSA128BOpnd:$ws, 3227 MSA128BOpnd:$wt)>; 3228def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3229 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3230 MSA128BOpnd:$ws, 3231 MSA128BOpnd:$wt)>; 3232def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3233 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3234 MSA128BOpnd:$ws, 3235 MSA128BOpnd:$wt)>; 3236 3237def XORI_B : XORI_B_ENC, XORI_B_DESC; 3238 3239// Patterns. 3240class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3241 Pat<pattern, result>, Requires<pred>; 3242 3243def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3244 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3245 3246def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3247def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3248def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3249def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3250def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3251def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3252def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3253 3254def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3255def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3256def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3257 3258def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3259 (ST_B MSA128B:$ws, addr:$addr)>; 3260def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3261 (ST_H MSA128H:$ws, addr:$addr)>; 3262def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3263 (ST_W MSA128W:$ws, addr:$addr)>; 3264def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3265 (ST_D MSA128D:$ws, addr:$addr)>; 3266def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3267 (ST_H MSA128H:$ws, addr:$addr)>; 3268def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3269 (ST_W MSA128W:$ws, addr:$addr)>; 3270def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3271 (ST_D MSA128D:$ws, addr:$addr)>; 3272 3273def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3274 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3275def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3276 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3277def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3278 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3279 3280class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3281 RegisterOperand ROWS = ROWD, 3282 InstrItinClass itin = NoItinerary> : 3283 MipsPseudo<(outs ROWD:$wd), 3284 (ins ROWS:$ws), 3285 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3286 InstrItinClass Itinerary = itin; 3287} 3288def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3289 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3290 MSA128WOpnd:$ws)>; 3291def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3292 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3293 MSA128DOpnd:$ws)>; 3294 3295class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3296 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3297 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3298 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3299 3300// These are endian-independant because the element size doesnt change 3301def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3302def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3303def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3304def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3305def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3306def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3307 3308// Little endian bitcasts are always no-ops 3309def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3310def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3311def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3312def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3313def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3314def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3315 3316def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3317def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3318def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3319def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3320def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3321 3322def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3323def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3324def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3325def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3326def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3327 3328def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3329def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3330def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3331def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3332def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3333 3334def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3335def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3336def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3337def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3338def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3339 3340def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3341def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3342def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3343def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3344def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3345 3346// Big endian bitcasts expand to shuffle instructions. 3347// This is because bitcast is defined to be a store/load sequence and the 3348// vector store/load instructions are mixed-endian with respect to the vector 3349// as a whole (little endian with respect to element order, but big endian 3350// elements). 3351 3352class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3353 RegisterClass DstRC, MSAInst Insn, 3354 RegisterClass ViaRC> : 3355 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3356 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3357 DstRC), 3358 [HasMSA, IsBE]>; 3359 3360class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3361 RegisterClass DstRC, MSAInst Insn, 3362 RegisterClass ViaRC> : 3363 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3364 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3365 DstRC), 3366 [HasMSA, IsBE]>; 3367 3368class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3369 RegisterClass DstRC> : 3370 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3371 3372class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3373 RegisterClass DstRC> : 3374 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3375 3376class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3377 RegisterClass DstRC> : 3378 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3379 (COPY_TO_REGCLASS 3380 (SHF_W 3381 (COPY_TO_REGCLASS 3382 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3383 MSA128W), 177), 3384 DstRC), 3385 [HasMSA, IsBE]>; 3386 3387class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3388 RegisterClass DstRC> : 3389 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3390 3391class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3392 RegisterClass DstRC> : 3393 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3394 3395class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3396 RegisterClass DstRC> : 3397 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3398 3399def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3400def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3401def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3402def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3403def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3404def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3405 3406def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3407def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3408def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3409def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3410def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3411 3412def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3413def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3414def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3415def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3416def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3417 3418def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3419def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3420def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3421def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3422def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3423 3424def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3425def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3426def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3427def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3428def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3429 3430def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3431def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3432def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3433def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3434def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3435 3436def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3437def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3438def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3439def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3440def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3441 3442// Pseudos used to implement BNZ.df, and BZ.df 3443 3444class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3445 RegisterClass RCWS, 3446 InstrItinClass itin = NoItinerary> : 3447 MipsPseudo<(outs GPR32:$dst), 3448 (ins RCWS:$ws), 3449 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3450 bit usesCustomInserter = 1; 3451} 3452 3453def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3454 MSA128B, NoItinerary>; 3455def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3456 MSA128H, NoItinerary>; 3457def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3458 MSA128W, NoItinerary>; 3459def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3460 MSA128D, NoItinerary>; 3461def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3462 MSA128B, NoItinerary>; 3463 3464def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3465 MSA128B, NoItinerary>; 3466def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3467 MSA128H, NoItinerary>; 3468def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3469 MSA128W, NoItinerary>; 3470def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3471 MSA128D, NoItinerary>; 3472def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3473 MSA128B, NoItinerary>; 3474