MipsMSAInstrInfo.td revision 89d13c1b380218d381be035eb5e4d83dcbc391cc
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>; 15def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 16def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 17 SDTCisInt<1>, 18 SDTCisSameAs<1, 2>, 19 SDTCisVT<3, OtherVT>]>; 20def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 21 SDTCisFP<1>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, OtherVT>]>; 24 25def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 26def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 27def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 28def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 29def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 30 [SDNPCommutative, SDNPAssociative]>; 31def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 32 [SDNPCommutative, SDNPAssociative]>; 33def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 34 [SDNPCommutative, SDNPAssociative]>; 35def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>; 38def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>; 39def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41 42def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 43def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 44 45def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 46 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 47def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 48 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 49 50// Pattern fragments 51def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 52 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 53def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 54 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 55def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 56 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 57 58def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 59 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 60def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 61 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 62def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 63 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 64 65def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 66 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 67def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 68 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 69def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 70 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 71 72class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 73 PatFrag<(ops node:$lhs, node:$rhs), 74 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 75 76// ISD::SETFALSE cannot occur 77def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 78def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 79def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 80def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 81def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 82def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 83def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 84def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 85def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 86def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 87def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 88def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 89def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 90def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 91def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 92def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 93def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 94def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 95def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 96def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 97def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 98def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 99def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 100def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 101def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 102def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 103def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 104def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 105// ISD::SETTRUE cannot occur 106// ISD::SETFALSE2 cannot occur 107// ISD::SETTRUE2 cannot occur 108 109class vsetcc_type<ValueType ResTy, CondCode CC> : 110 PatFrag<(ops node:$lhs, node:$rhs), 111 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 112 113def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 114def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 115def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 116def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 117def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 118def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 119def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 120def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 121def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 122def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 123def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 124def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 125def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 126def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 127def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 128def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 129def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 130def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 131def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 132def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 133 134def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>; 135def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>; 136def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>; 137def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>; 138 139// Immediates 140def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 141def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 142 143def uimm3 : Operand<i32> { 144 let PrintMethod = "printUnsignedImm"; 145} 146 147def uimm4 : Operand<i32> { 148 let PrintMethod = "printUnsignedImm"; 149} 150 151def uimm8 : Operand<i32> { 152 let PrintMethod = "printUnsignedImm"; 153} 154 155def simm5 : Operand<i32>; 156 157def simm10 : Operand<i32>; 158 159// Instruction encoding. 160class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 161class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 162class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 163class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 164 165class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 166class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 167class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 168class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 169 170class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 171class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 172class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 173class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 174 175class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 176class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 177class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 178class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 179 180class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 181class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 182class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 183class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 184 185class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 186class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 187class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 188class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 189 190class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 191 192class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 193 194class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 195class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 196class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 197class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 198 199class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 200class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 201class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 202class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 203 204class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 205class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 206class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 207class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 208 209class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 210class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 211class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 212class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 213 214class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 215class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 216class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 217class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 218 219class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 220class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 221class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 222class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 223 224class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 225class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 226class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 227class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 228 229class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 230class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 231class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 232class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 233 234class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 235class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 236class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 237class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 238 239class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 240class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 241class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 242class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 243 244class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 245class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 246class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 247class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 248 249class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 250class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 251class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 252class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 253 254class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 255 256class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 257 258class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 259 260class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 261 262class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 263class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 264class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 265class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 266 267class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 268class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 269class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 270class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 271 272class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 273class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 274class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 275class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 276 277class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 278 279class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 280 281class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 282 283class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 284class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 285class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 286class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 287 288class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 289class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 290class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 291class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 292 293class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 294class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 295class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 296class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 297 298class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 299 300class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 301class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 302class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 303class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 304 305class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 306class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 307class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 308class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 309 310class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 311 312class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 313class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 314class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 315class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 316 317class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 318class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 319class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 320class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 321 322class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 323class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 324class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 325class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 326 327class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 328class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 329class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 330class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 331 332class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 333class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 334class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 335class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 336 337class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 338class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 339class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 340class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 341 342class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 343class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 344class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 345class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 346 347class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 348class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 349class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 350class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 351 352class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 353class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 354class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 355 356class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 357class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 358class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 359 360class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 361 362class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 363class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 364class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 365class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 366 367class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 368class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 369class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 370class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 371 372class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 373class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 374class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 375 376class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 377class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 378class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 379 380class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 381class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 382class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 383 384class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 385class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 386class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 387 388class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 389class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 390class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 391 392class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 393class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 394class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 395 396class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 397class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 398 399class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 400class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 401 402class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 403class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 404 405class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 406class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 407 408class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 409class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 410 411class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 412class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 413 414class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 415class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 416 417class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 418class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 419 420class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 421class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 422 423class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 424class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 425 426class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 427class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 428 429class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 430class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 431 432class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 433class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 434 435class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 436class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 437 438class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 439class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 440 441class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 442class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 443 444class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 445class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 446 447class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 448class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 449 450class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 451class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 452 453class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 454class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 455 456class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 457class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 458 459class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 460class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 461 462class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 463class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 464class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 465 466class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 467class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 468 469class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 470class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 471 472class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 473class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 474 475class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 476class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 477 478class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 479class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 480 481class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 482class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 483 484class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 485class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 486 487class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 488class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 489 490class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 491class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 492 493class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 494class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 495 496class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 497class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 498 499class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 500class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 501 502class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 503class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 504 505class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 506class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 507 508class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 509class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 510 511class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 512class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 513 514class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 515class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 516 517class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 518class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 519 520class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 521class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 522 523class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 524class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 525 526class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 527class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 528 529class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 530class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 531 532class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 533class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 534 535class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 536class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 537 538class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 539class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 540 541class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 542class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 543 544class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 545class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 546 547class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 548class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 549 550class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 551class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 552 553class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 554class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 555class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 556 557class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 558class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 559class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 560 561class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 562class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 563class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 564 565class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 566class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 567class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 568 569class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 570class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 571class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 572class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 573 574class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 575class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 576class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 577class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 578 579class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 580class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 581class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 582class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 583 584class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 585class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 586class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 587class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 588 589class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 590class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 591class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 592 593class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 594class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 595class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 596class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 597 598class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 599class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 600class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 601class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 602 603class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 604class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 605class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 606class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 607 608class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 609class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 610class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 611class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 612 613class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 614class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 615 616class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 617class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 618 619class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 620class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 621class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 622class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 623 624class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 625class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 626class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 627class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 628 629class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 630class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 631class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 632class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 633 634class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 635class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 636class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 637class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 638 639class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 640class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 641class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 642class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 643 644class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 645class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 646class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 647class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 648 649class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 650class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 651class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 652class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 653 654class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 655class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 656class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 657class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 658 659class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 660class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 661class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 662class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 663 664class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 665class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 666class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 667class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 668 669class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 670class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 671class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 672class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 673 674class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 675class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 676class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 677class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 678 679class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 680class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 681class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 682class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 683 684class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 685 686class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 687class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 688 689class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 690class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 691 692class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 693class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 694class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 695class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 696 697class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 698class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 699 700class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 701class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 702 703class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 704class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 705class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 706class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 707 708class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 709class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 710class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 711class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 712 713class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 714class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 715class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 716class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 717 718class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 719 720class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 721 722class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 723 724class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 725 726class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 727class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 728class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 729class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 730 731class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 732class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 733class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 734class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 735 736class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 737class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 738class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 739class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 740 741class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 742class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 743class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 744class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 745 746class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 747class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 748class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 749class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 750 751class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 752class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 753class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 754 755class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 756class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 757class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 758class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 759 760class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 761class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 762class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 763class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 764 765class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 766class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 767class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 768class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 769 770class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 771class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 772class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 773class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 774 775class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 776class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 777class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 778class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 779 780class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 781class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 782class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 783class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 784 785class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 786class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 787class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 788class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 789 790class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 791class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 792class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 793class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 794 795class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 796class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 797class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 798class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 799 800class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 801class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 802class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 803class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 804 805class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 806class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 807class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 808class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 809 810class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 811class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 812class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 813class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 814 815class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 816class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 817class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 818class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 819 820class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 821class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 822class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 823class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 824 825class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 826class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 827class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 828class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 829 830class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 831class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 832class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 833class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 834 835class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 836class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 837class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 838class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 839 840class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 841class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 842class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 843class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 844 845class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 846class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 847class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 848class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 849 850class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 851class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 852class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 853class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 854 855class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 856class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 857class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 858class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 859 860class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 861class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 862class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 863class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 864 865class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 866class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 867class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 868class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 869 870class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 871 872class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 873 874// Instruction desc. 875class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 876 RegisterClass RCWD, RegisterClass RCWS = RCWD, 877 InstrItinClass itin = NoItinerary> { 878 dag OutOperandList = (outs RCWD:$wd); 879 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 880 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 881 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 882 InstrItinClass Itinerary = itin; 883} 884 885class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 886 RegisterClass RCWD, RegisterClass RCWS = RCWD, 887 InstrItinClass itin = NoItinerary> { 888 dag OutOperandList = (outs RCWD:$wd); 889 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 890 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 891 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 892 InstrItinClass Itinerary = itin; 893} 894 895class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 896 RegisterClass RCWD, RegisterClass RCWS = RCWD, 897 InstrItinClass itin = NoItinerary> { 898 dag OutOperandList = (outs RCWD:$wd); 899 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 900 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 901 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 902 InstrItinClass Itinerary = itin; 903} 904 905class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 906 RegisterClass RCWD, RegisterClass RCWS = RCWD, 907 InstrItinClass itin = NoItinerary> { 908 dag OutOperandList = (outs RCWD:$wd); 909 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 910 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 911 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 912 InstrItinClass Itinerary = itin; 913} 914 915class MSA_BIT_SPLATB_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 916 RegisterClass RCWD, RegisterClass RCWS = RCWD, 917 InstrItinClass itin = NoItinerary> { 918 dag OutOperandList = (outs RCWD:$wd); 919 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 920 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 921 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 922 (vsplati8 immZExt3:$u3)))]; 923 InstrItinClass Itinerary = itin; 924} 925 926class MSA_BIT_SPLATH_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 927 RegisterClass RCWD, RegisterClass RCWS = RCWD, 928 InstrItinClass itin = NoItinerary> { 929 dag OutOperandList = (outs RCWD:$wd); 930 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 931 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 932 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 933 (vsplati16 immZExt4:$u4)))]; 934 InstrItinClass Itinerary = itin; 935} 936 937class MSA_BIT_SPLATW_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 938 RegisterClass RCWD, RegisterClass RCWS = RCWD, 939 InstrItinClass itin = NoItinerary> { 940 dag OutOperandList = (outs RCWD:$wd); 941 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 942 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 943 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 944 (vsplati32 immZExt5:$u5)))]; 945 InstrItinClass Itinerary = itin; 946} 947 948class MSA_BIT_SPLATD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 949 RegisterClass RCWD, RegisterClass RCWS = RCWD, 950 InstrItinClass itin = NoItinerary> { 951 dag OutOperandList = (outs RCWD:$wd); 952 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 953 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 954 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 955 (vsplati64 immZExt6:$u6)))]; 956 InstrItinClass Itinerary = itin; 957} 958 959class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 960 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 961 InstrItinClass itin = NoItinerary> { 962 dag OutOperandList = (outs RCD:$rd); 963 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 964 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 965 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 966 InstrItinClass Itinerary = itin; 967} 968 969class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 970 SDPatternOperator SplatNode, RegisterClass RCWD, 971 RegisterClass RCWS = RCWD, 972 InstrItinClass itin = NoItinerary> { 973 dag OutOperandList = (outs RCWD:$wd); 974 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 975 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 976 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 977 (SplatNode immZExt5:$u5)))]; 978 InstrItinClass Itinerary = itin; 979} 980 981class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 982 SDPatternOperator SplatNode, RegisterClass RCWD, 983 RegisterClass RCWS = RCWD, 984 InstrItinClass itin = NoItinerary> { 985 dag OutOperandList = (outs RCWD:$wd); 986 dag InOperandList = (ins RCWS:$ws, simm5:$s5); 987 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5"); 988 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 989 (SplatNode immSExt5:$s5)))]; 990 InstrItinClass Itinerary = itin; 991} 992 993class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 994 RegisterClass RCWD, RegisterClass RCWS = RCWD, 995 InstrItinClass itin = NoItinerary> { 996 dag OutOperandList = (outs RCWD:$wd); 997 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 998 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 999 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1000 InstrItinClass Itinerary = itin; 1001} 1002 1003class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1004 RegisterClass RCWD, 1005 InstrItinClass itin = NoItinerary> { 1006 dag OutOperandList = (outs RCWD:$wd); 1007 dag InOperandList = (ins simm10:$i10); 1008 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1009 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))]; 1010 InstrItinClass Itinerary = itin; 1011} 1012 1013class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1014 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1015 InstrItinClass itin = NoItinerary> { 1016 dag OutOperandList = (outs RCWD:$wd); 1017 dag InOperandList = (ins RCWS:$ws); 1018 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1019 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1020 InstrItinClass Itinerary = itin; 1021} 1022 1023class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1024 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1025 InstrItinClass itin = NoItinerary> : 1026 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 1027 1028 1029class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1030 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1031 RegisterClass RCWT = RCWD, 1032 InstrItinClass itin = NoItinerary> { 1033 dag OutOperandList = (outs RCWD:$wd); 1034 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1035 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1036 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1037 InstrItinClass Itinerary = itin; 1038} 1039 1040class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1041 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1042 RegisterClass RCWT = RCWD, 1043 InstrItinClass itin = NoItinerary> { 1044 dag OutOperandList = (outs RCWD:$wd); 1045 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1046 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1047 list<dag> Pattern = [(set RCWD:$wd, 1048 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 1049 InstrItinClass Itinerary = itin; 1050 string Constraints = "$wd = $wd_in"; 1051} 1052 1053class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1054 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1055 RegisterClass RCWT = RCWD, 1056 InstrItinClass itin = NoItinerary> : 1057 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1058 1059class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1060 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1061 RegisterClass RCWT = RCWD, 1062 InstrItinClass itin = NoItinerary> : 1063 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1064 1065class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1066 dag OutOperandList = (outs); 1067 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1068 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1069 list<dag> Pattern = []; 1070 InstrItinClass Itinerary = IIBranch; 1071 bit isBranch = 1; 1072 bit isTerminator = 1; 1073 bit hasDelaySlot = 1; 1074 list<Register> Defs = [AT]; 1075} 1076 1077class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1078 RegisterClass RCD, RegisterClass RCWS, 1079 InstrItinClass itin = NoItinerary> { 1080 dag OutOperandList = (outs RCD:$wd); 1081 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1082 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1083 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1084 RCWS:$rs, 1085 immZExt6:$n))]; 1086 InstrItinClass Itinerary = itin; 1087 string Constraints = "$wd = $wd_in"; 1088} 1089 1090class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1091 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1092 InstrItinClass itin = NoItinerary> { 1093 dag OutOperandList = (outs RCWD:$wd); 1094 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1095 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1096 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1097 immZExt6:$n, 1098 RCWS:$ws))]; 1099 InstrItinClass Itinerary = itin; 1100 string Constraints = "$wd = $wd_in"; 1101} 1102 1103class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1104 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1105 RegisterClass RCWT = RCWD, 1106 InstrItinClass itin = NoItinerary> { 1107 dag OutOperandList = (outs RCWD:$wd); 1108 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1109 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1110 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1111 InstrItinClass Itinerary = itin; 1112} 1113 1114class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1115 RegisterClass RCWS = RCWD, 1116 RegisterClass RCWT = RCWD> : 1117 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1118 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1119 1120class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 1121 IsCommutable; 1122class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 1123 IsCommutable; 1124class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 1125 IsCommutable; 1126class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 1127 IsCommutable; 1128 1129class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 1130 IsCommutable; 1131class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 1132 IsCommutable; 1133class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 1134 IsCommutable; 1135class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 1136 IsCommutable; 1137 1138class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 1139 IsCommutable; 1140class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 1141 IsCommutable; 1142class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 1143 IsCommutable; 1144class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 1145 IsCommutable; 1146 1147class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 1148 IsCommutable; 1149class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 1150 IsCommutable; 1151class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 1152 IsCommutable; 1153class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 1154 IsCommutable; 1155 1156class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 1157class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1158class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1159class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1160 1161class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8, MSA128B>; 1162class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16, MSA128H>; 1163class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32, MSA128W>; 1164class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64, MSA128D>; 1165 1166class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1167class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1168class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1169class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1170 1171class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>; 1172 1173class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1174class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1175class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1176class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1177 1178class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1179class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1180class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1181class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1182 1183class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1184 IsCommutable; 1185class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1186 IsCommutable; 1187class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1188 IsCommutable; 1189class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1190 IsCommutable; 1191 1192class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1193 IsCommutable; 1194class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1195 IsCommutable; 1196class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1197 IsCommutable; 1198class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1199 IsCommutable; 1200 1201class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1202 IsCommutable; 1203class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1204 IsCommutable; 1205class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1206 IsCommutable; 1207class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1208 IsCommutable; 1209 1210class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1211 IsCommutable; 1212class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1213 IsCommutable; 1214class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1215 IsCommutable; 1216class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1217 IsCommutable; 1218 1219class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1220class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1221class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1222class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1223 1224class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1225class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1226class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1227class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1228 1229class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1230class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1231class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1232class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1233 1234class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1235 MSA128B>; 1236class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1237 MSA128H>; 1238class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1239 MSA128W>; 1240class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1241 MSA128D>; 1242 1243class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1244class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1245class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1246class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1247 1248class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1249 MSA128B>; 1250class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1251 MSA128H>; 1252class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1253 MSA128W>; 1254class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1255 MSA128D>; 1256 1257class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1258 1259class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1260 1261class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1262 1263class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1264 1265class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1266class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1267class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1268class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1269 1270class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1271class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1272class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1273class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1274 1275class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1276class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1277class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1278class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1279 1280class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1281 1282class BSEL_V_DESC { 1283 dag OutOperandList = (outs MSA128B:$wd); 1284 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1285 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1286 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1287 MSA128B:$wt))]; 1288 InstrItinClass Itinerary = NoItinerary; 1289 string Constraints = "$wd = $wd_in"; 1290} 1291 1292class BSELI_B_DESC { 1293 dag OutOperandList = (outs MSA128B:$wd); 1294 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, uimm8:$u8); 1295 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1296 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, 1297 MSA128B:$ws, 1298 (vsplati8 immZExt8:$u8)))]; 1299 InstrItinClass Itinerary = NoItinerary; 1300 string Constraints = "$wd = $wd_in"; 1301} 1302 1303class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1304class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1305class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1306class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1307 1308class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1309class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1310class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1311class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1312 1313class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1314class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1315class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1316class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1317 1318class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1319 1320class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>, 1321 IsCommutable; 1322class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>, 1323 IsCommutable; 1324class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>, 1325 IsCommutable; 1326class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>, 1327 IsCommutable; 1328 1329class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8, 1330 MSA128B>; 1331class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16, 1332 MSA128H>; 1333class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32, 1334 MSA128W>; 1335class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64, 1336 MSA128D>; 1337 1338class CFCMSA_DESC { 1339 dag OutOperandList = (outs GPR32:$rd); 1340 dag InOperandList = (ins MSACtrl:$cs); 1341 string AsmString = "cfcmsa\t$rd, $cs"; 1342 InstrItinClass Itinerary = NoItinerary; 1343 bit hasSideEffects = 1; 1344} 1345 1346class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>; 1347class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>; 1348class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>; 1349class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>; 1350 1351class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>; 1352class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>; 1353class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>; 1354class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>; 1355 1356class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", vsetle_v16i8, vsplati8, 1357 MSA128B>; 1358class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", vsetle_v8i16, vsplati16, 1359 MSA128H>; 1360class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", vsetle_v4i32, vsplati32, 1361 MSA128W>; 1362class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", vsetle_v2i64, vsplati64, 1363 MSA128D>; 1364 1365class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, vsplati8, 1366 MSA128B>; 1367class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, vsplati16, 1368 MSA128H>; 1369class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, vsplati32, 1370 MSA128W>; 1371class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, vsplati64, 1372 MSA128D>; 1373 1374class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>; 1375class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>; 1376class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>; 1377class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>; 1378 1379class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>; 1380class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>; 1381class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>; 1382class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>; 1383 1384class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", vsetlt_v16i8, vsplati8, 1385 MSA128B>; 1386class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", vsetlt_v8i16, vsplati16, 1387 MSA128H>; 1388class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", vsetlt_v4i32, vsplati32, 1389 MSA128W>; 1390class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", vsetlt_v2i64, vsplati64, 1391 MSA128D>; 1392 1393class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, vsplati8, 1394 MSA128B>; 1395class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, vsplati16, 1396 MSA128H>; 1397class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, vsplati32, 1398 MSA128W>; 1399class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, vsplati64, 1400 MSA128D>; 1401 1402class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1403 GPR32, MSA128B>; 1404class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1405 GPR32, MSA128H>; 1406class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1407 GPR32, MSA128W>; 1408 1409class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1410 GPR32, MSA128B>; 1411class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1412 GPR32, MSA128H>; 1413class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1414 GPR32, MSA128W>; 1415 1416class CTCMSA_DESC { 1417 dag OutOperandList = (outs); 1418 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1419 string AsmString = "ctcmsa\t$cd, $rs"; 1420 InstrItinClass Itinerary = NoItinerary; 1421 bit hasSideEffects = 1; 1422} 1423 1424class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1425class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1426class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1427class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1428 1429class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1430class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1431class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1432class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1433 1434class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1435 MSA128B, MSA128B>, IsCommutable; 1436class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1437 MSA128H, MSA128H>, IsCommutable; 1438class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1439 MSA128W, MSA128W>, IsCommutable; 1440 1441class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1442 MSA128B, MSA128B>, IsCommutable; 1443class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1444 MSA128H, MSA128H>, IsCommutable; 1445class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1446 MSA128W, MSA128W>, IsCommutable; 1447 1448class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1449 MSA128H, MSA128B, MSA128B>, 1450 IsCommutable; 1451class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1452 MSA128W, MSA128H, MSA128H>, 1453 IsCommutable; 1454class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1455 MSA128D, MSA128W, MSA128W>, 1456 IsCommutable; 1457 1458class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1459 MSA128H, MSA128B, MSA128B>, 1460 IsCommutable; 1461class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1462 MSA128W, MSA128H, MSA128H>, 1463 IsCommutable; 1464class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1465 MSA128D, MSA128W, MSA128W>, 1466 IsCommutable; 1467 1468class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1469 MSA128H, MSA128B, MSA128B>; 1470class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1471 MSA128W, MSA128H, MSA128H>; 1472class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1473 MSA128D, MSA128W, MSA128W>; 1474 1475class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1476 MSA128H, MSA128B, MSA128B>; 1477class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1478 MSA128W, MSA128H, MSA128H>; 1479class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1480 MSA128D, MSA128W, MSA128W>; 1481 1482class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1483class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1484 1485class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1486 IsCommutable; 1487class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1488 IsCommutable; 1489 1490class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>, 1491 IsCommutable; 1492class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>, 1493 IsCommutable; 1494 1495class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1496 MSA128W>; 1497class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1498 MSA128D>; 1499 1500class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>; 1501class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>; 1502 1503class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>; 1504class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>; 1505 1506class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>, 1507 IsCommutable; 1508class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>, 1509 IsCommutable; 1510 1511class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>, 1512 IsCommutable; 1513class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>, 1514 IsCommutable; 1515 1516class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>, 1517 IsCommutable; 1518class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>, 1519 IsCommutable; 1520 1521class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>, 1522 IsCommutable; 1523class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>, 1524 IsCommutable; 1525 1526class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>, 1527 IsCommutable; 1528class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>, 1529 IsCommutable; 1530 1531class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>, 1532 IsCommutable; 1533class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>, 1534 IsCommutable; 1535 1536class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>, 1537 IsCommutable; 1538class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>, 1539 IsCommutable; 1540 1541class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1542class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1543 1544class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1545 MSA128H, MSA128W, MSA128W>; 1546class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1547 MSA128W, MSA128D, MSA128D>; 1548 1549class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1550class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1551 1552class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1553 MSA128W, MSA128H>; 1554class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1555 MSA128D, MSA128W>; 1556 1557class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1558 MSA128W, MSA128H>; 1559class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1560 MSA128D, MSA128W>; 1561 1562class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1563 MSA128W>; 1564class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1565 MSA128D>; 1566 1567class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1568 MSA128W>; 1569class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1570 MSA128D>; 1571 1572class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1573 MSA128W, MSA128H>; 1574class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1575 MSA128D, MSA128W>; 1576 1577class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1578 MSA128W, MSA128H>; 1579class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1580 MSA128D, MSA128W>; 1581 1582class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>; 1583class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>; 1584class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>; 1585 1586class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1587class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1588 1589class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1590 MSA128W>; 1591class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1592 MSA128D>; 1593 1594class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1595class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1596 1597class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1598 MSA128W>; 1599class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1600 MSA128D>; 1601 1602class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1603class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1604 1605class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1606 MSA128W>; 1607class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1608 MSA128D>; 1609 1610class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1611 MSA128W>; 1612class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1613 MSA128D>; 1614 1615class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1616class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1617 1618class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1619class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1620 1621class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1622class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1623 1624class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1625 MSA128W>; 1626class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1627 MSA128D>; 1628 1629class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1630class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1631 1632class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1633class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1634 1635class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1636class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1637 1638class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1639class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1640 1641class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1642class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1643 1644class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1645class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1646 1647class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1648class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1649 1650class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1651class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1652 1653class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1654class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1655 1656class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1657class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1658 1659class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1660class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1661 1662class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1663class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1664 1665class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1666class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1667 1668class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1669 MSA128W>; 1670class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1671 MSA128D>; 1672 1673class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1674 MSA128W>; 1675class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1676 MSA128D>; 1677 1678class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1679 MSA128W>; 1680class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1681 MSA128D>; 1682 1683class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1684 MSA128W>; 1685class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1686 MSA128D>; 1687 1688class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1689 MSA128H, MSA128W, MSA128W>; 1690class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1691 MSA128W, MSA128D, MSA128D>; 1692 1693class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1694 MSA128B, MSA128B>; 1695class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1696 MSA128H, MSA128H>; 1697class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1698 MSA128W, MSA128W>; 1699 1700class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1701 MSA128B, MSA128B>; 1702class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1703 MSA128H, MSA128H>; 1704class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1705 MSA128W, MSA128W>; 1706 1707class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1708 MSA128B, MSA128B>; 1709class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1710 MSA128H, MSA128H>; 1711class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1712 MSA128W, MSA128W>; 1713 1714class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1715 MSA128B, MSA128B>; 1716class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1717 MSA128H, MSA128H>; 1718class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1719 MSA128W, MSA128W>; 1720 1721class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1722class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1723class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1724class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1725 1726class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1727class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1728class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1729class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1730 1731class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1732class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1733class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1734class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1735 1736class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1737class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1738class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1739class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1740 1741class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1742 GPR32>; 1743class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1744 GPR32>; 1745class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1746 GPR32>; 1747 1748class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1749class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1750class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1751class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1752 1753class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1754 ValueType TyNode, RegisterClass RCWD, 1755 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1756 InstrItinClass itin = NoItinerary> { 1757 dag OutOperandList = (outs RCWD:$wd); 1758 dag InOperandList = (ins MemOpnd:$addr); 1759 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1760 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1761 InstrItinClass Itinerary = itin; 1762} 1763 1764class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1765class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1766class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1767class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1768 1769class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>; 1770class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>; 1771class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>; 1772class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>; 1773 1774class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1775 ValueType TyNode, RegisterClass RCWD, 1776 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1777 InstrItinClass itin = NoItinerary> { 1778 dag OutOperandList = (outs RCWD:$wd); 1779 dag InOperandList = (ins MemOpnd:$addr); 1780 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1781 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1782 InstrItinClass Itinerary = itin; 1783} 1784 1785class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1786class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1787class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1788class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1789 1790class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1791 MSA128H>; 1792class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1793 MSA128W>; 1794 1795class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1796 MSA128H>; 1797class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1798 MSA128W>; 1799 1800class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1801class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1802class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1803class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1804 1805class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1806class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1807class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1808class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1809 1810class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>; 1811class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>; 1812class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>; 1813class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>; 1814 1815class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>; 1816class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>; 1817class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>; 1818class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>; 1819 1820class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8, 1821 MSA128B>; 1822class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16, 1823 MSA128H>; 1824class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32, 1825 MSA128W>; 1826class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64, 1827 MSA128D>; 1828 1829class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8, 1830 MSA128B>; 1831class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16, 1832 MSA128H>; 1833class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32, 1834 MSA128W>; 1835class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64, 1836 MSA128D>; 1837 1838class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1839class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1840class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1841class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1842 1843class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>; 1844class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>; 1845class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>; 1846class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>; 1847 1848class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>; 1849class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>; 1850class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>; 1851class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>; 1852 1853class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8, 1854 MSA128B>; 1855class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16, 1856 MSA128H>; 1857class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32, 1858 MSA128W>; 1859class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64, 1860 MSA128D>; 1861 1862class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8, 1863 MSA128B>; 1864class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16, 1865 MSA128H>; 1866class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32, 1867 MSA128W>; 1868class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64, 1869 MSA128D>; 1870 1871class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1872class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1873class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1874class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1875 1876class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1877class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1878class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1879class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1880 1881class MOVE_V_DESC { 1882 dag OutOperandList = (outs MSA128B:$wd); 1883 dag InOperandList = (ins MSA128B:$ws); 1884 string AsmString = "move.v\t$wd, $ws"; 1885 list<dag> Pattern = []; 1886 InstrItinClass Itinerary = NoItinerary; 1887} 1888 1889class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 1890 MSA128H>; 1891class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 1892 MSA128W>; 1893 1894class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 1895 MSA128H>; 1896class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 1897 MSA128W>; 1898 1899class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 1900class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 1901class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 1902class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 1903 1904class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 1905class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 1906 1907class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 1908 MSA128H>; 1909class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 1910 MSA128W>; 1911 1912class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 1913class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 1914class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 1915class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 1916 1917class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 1918class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 1919class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 1920class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 1921 1922class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 1923class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 1924class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 1925class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 1926 1927class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 1928class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 1929class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 1930class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 1931 1932class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>; 1933 1934class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 1935class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 1936class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 1937class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 1938 1939class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>; 1940 1941class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 1942class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 1943class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 1944class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 1945 1946class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 1947class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 1948class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 1949class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 1950 1951class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 1952class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 1953class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 1954class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 1955 1956class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 1957class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 1958class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 1959class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 1960 1961class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 1962class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 1963class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 1964class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 1965 1966class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>; 1967class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>; 1968class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>; 1969 1970class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 1971class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 1972class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 1973class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 1974 1975class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 1976class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 1977class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 1978class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 1979 1980class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 1981class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 1982class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 1983class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 1984 1985class SLLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"slli.b", shl, MSA128B>; 1986class SLLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"slli.h", shl, MSA128H>; 1987class SLLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"slli.w", shl, MSA128W>; 1988class SLLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"slli.d", shl, MSA128D>; 1989 1990class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 1991 MSA128B, GPR32>; 1992class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 1993 MSA128H, GPR32>; 1994class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 1995 MSA128W, GPR32>; 1996class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 1997 MSA128D, GPR32>; 1998 1999class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 2000 MSA128B>; 2001class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 2002 MSA128H>; 2003class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 2004 MSA128W>; 2005class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 2006 MSA128D>; 2007 2008class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 2009class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 2010class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 2011class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 2012 2013class SRAI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srai.b", sra, MSA128B>; 2014class SRAI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srai.h", sra, MSA128H>; 2015class SRAI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srai.w", sra, MSA128W>; 2016class SRAI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srai.d", sra, MSA128D>; 2017 2018class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 2019class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 2020class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 2021class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 2022 2023class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2024class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2025class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2026class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2027 2028class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 2029class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 2030class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 2031class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 2032 2033class SRLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srli.b", srl, MSA128B>; 2034class SRLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srli.h", srl, MSA128H>; 2035class SRLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srli.w", srl, MSA128W>; 2036class SRLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srli.d", srl, MSA128D>; 2037 2038class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 2039class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 2040class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 2041class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 2042 2043class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2044class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2045class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2046class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2047 2048class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2049 ValueType TyNode, RegisterClass RCWD, 2050 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2051 InstrItinClass itin = NoItinerary> { 2052 dag OutOperandList = (outs); 2053 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2054 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2055 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2056 InstrItinClass Itinerary = itin; 2057} 2058 2059class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2060class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2061class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2062class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2063 2064class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2065 ValueType TyNode, RegisterClass RCWD, 2066 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2067 InstrItinClass itin = NoItinerary> { 2068 dag OutOperandList = (outs); 2069 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2070 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2071 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2072 InstrItinClass Itinerary = itin; 2073} 2074 2075class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2076class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2077class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2078class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2079 2080class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 2081class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 2082class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 2083class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 2084 2085class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 2086class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 2087class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 2088class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 2089 2090class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2091 MSA128B>; 2092class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2093 MSA128H>; 2094class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2095 MSA128W>; 2096class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2097 MSA128D>; 2098 2099class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2100 MSA128B>; 2101class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2102 MSA128H>; 2103class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2104 MSA128W>; 2105class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2106 MSA128D>; 2107 2108class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 2109class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 2110class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 2111class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 2112 2113class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8, MSA128B>; 2114class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16, MSA128H>; 2115class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32, MSA128W>; 2116class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64, MSA128D>; 2117 2118class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>; 2119class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>; 2120class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>; 2121class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>; 2122 2123class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2124class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2125class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2126class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2127 2128class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>; 2129 2130// Instruction defs. 2131def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2132def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2133def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2134def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2135 2136def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2137def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2138def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2139def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2140 2141def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2142def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2143def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2144def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2145 2146def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2147def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2148def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2149def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2150 2151def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2152def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2153def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2154def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2155 2156def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2157def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2158def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2159def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2160 2161def AND_V : AND_V_ENC, AND_V_DESC; 2162def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2163 PseudoInstExpansion<(AND_V MSA128B:$wd, 2164 MSA128B:$ws, MSA128B:$wt)>; 2165def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2166 PseudoInstExpansion<(AND_V MSA128B:$wd, 2167 MSA128B:$ws, MSA128B:$wt)>; 2168def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2169 PseudoInstExpansion<(AND_V MSA128B:$wd, 2170 MSA128B:$ws, MSA128B:$wt)>; 2171 2172def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2173 2174def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2175def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2176def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2177def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2178 2179def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2180def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2181def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2182def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2183 2184def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2185def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2186def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2187def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2188 2189def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2190def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2191def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2192def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2193 2194def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2195def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2196def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2197def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2198 2199def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2200def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2201def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2202def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2203 2204def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2205def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2206def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2207def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2208 2209def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2210def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2211def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2212def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2213 2214def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2215def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2216def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2217def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2218 2219def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2220def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2221def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2222def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2223 2224def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2225def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2226def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2227def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2228 2229def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2230def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2231def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2232def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2233 2234def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2235 2236def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2237 2238def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2239 2240def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2241 2242def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2243def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2244def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2245def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2246 2247def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2248def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2249def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2250def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2251 2252def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2253def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2254def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2255def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2256 2257def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2258 2259def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2260 2261class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2262 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2263 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2264 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2265 MSA128B:$wt)> { 2266 let Constraints = "$wd_in = $wd"; 2267} 2268 2269def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2270def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2271def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2272def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2273def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2274 2275def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2276 2277def BSET_B : BSET_B_ENC, BSET_B_DESC; 2278def BSET_H : BSET_H_ENC, BSET_H_DESC; 2279def BSET_W : BSET_W_ENC, BSET_W_DESC; 2280def BSET_D : BSET_D_ENC, BSET_D_DESC; 2281 2282def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2283def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2284def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2285def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2286 2287def BZ_B : BZ_B_ENC, BZ_B_DESC; 2288def BZ_H : BZ_H_ENC, BZ_H_DESC; 2289def BZ_W : BZ_W_ENC, BZ_W_DESC; 2290def BZ_D : BZ_D_ENC, BZ_D_DESC; 2291 2292def BZ_V : BZ_V_ENC, BZ_V_DESC; 2293 2294def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2295def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2296def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2297def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2298 2299def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2300def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2301def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2302def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2303 2304def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2305 2306def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2307def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2308def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2309def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2310 2311def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2312def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2313def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2314def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2315 2316def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2317def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2318def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2319def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2320 2321def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2322def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2323def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2324def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2325 2326def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2327def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2328def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2329def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2330 2331def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2332def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2333def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2334def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2335 2336def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2337def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2338def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2339def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2340 2341def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2342def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2343def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2344def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2345 2346def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2347def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2348def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2349 2350def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2351def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2352def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2353 2354def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2355 2356def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2357def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2358def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2359def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2360 2361def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2362def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2363def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2364def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2365 2366def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2367def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2368def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2369 2370def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2371def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2372def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2373 2374def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2375def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2376def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2377 2378def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2379def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2380def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2381 2382def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2383def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2384def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2385 2386def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2387def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2388def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2389 2390def FADD_W : FADD_W_ENC, FADD_W_DESC; 2391def FADD_D : FADD_D_ENC, FADD_D_DESC; 2392 2393def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2394def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2395 2396def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2397def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2398 2399def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2400def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2401 2402def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2403def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2404 2405def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2406def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2407 2408def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2409def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2410 2411def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2412def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2413 2414def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2415def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2416 2417def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2418def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2419 2420def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2421def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2422 2423def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2424def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2425 2426def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2427def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2428 2429def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2430def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2431 2432def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2433def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2434 2435def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2436def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2437 2438def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2439def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2440 2441def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2442def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2443 2444def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2445def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2446 2447def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2448def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2449 2450def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2451def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2452 2453def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2454def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2455 2456def FILL_B : FILL_B_ENC, FILL_B_DESC; 2457def FILL_H : FILL_H_ENC, FILL_H_DESC; 2458def FILL_W : FILL_W_ENC, FILL_W_DESC; 2459 2460def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2461def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2462 2463def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2464def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2465 2466def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2467def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2468 2469def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2470def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2471 2472def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2473def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2474 2475def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2476def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2477 2478def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2479def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2480 2481def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2482def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2483 2484def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2485def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2486 2487def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2488def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2489 2490def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2491def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2492 2493def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2494def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2495 2496def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2497def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2498 2499def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2500def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2501 2502def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2503def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2504 2505def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2506def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2507 2508def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2509def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2510 2511def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2512def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2513 2514def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2515def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2516 2517def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2518def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2519 2520def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2521def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2522 2523def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2524def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2525 2526def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2527def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2528 2529def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2530def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2531 2532def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2533def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2534 2535def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2536def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2537 2538def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2539def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2540 2541def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2542def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2543 2544def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2545def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2546 2547def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2548def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2549def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2550 2551def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2552def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2553def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2554 2555def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2556def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2557def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2558 2559def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2560def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2561def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2562 2563def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2564def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2565def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2566def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2567 2568def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2569def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2570def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2571def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2572 2573def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2574def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2575def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2576def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2577 2578def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2579def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2580def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2581def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2582 2583def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2584def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2585def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2586 2587def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2588def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2589def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2590def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2591 2592def LD_B: LD_B_ENC, LD_B_DESC; 2593def LD_H: LD_H_ENC, LD_H_DESC; 2594def LD_W: LD_W_ENC, LD_W_DESC; 2595def LD_D: LD_D_ENC, LD_D_DESC; 2596 2597def LDI_B : LDI_B_ENC, LDI_B_DESC; 2598def LDI_H : LDI_H_ENC, LDI_H_DESC; 2599def LDI_W : LDI_W_ENC, LDI_W_DESC; 2600def LDI_D : LDI_D_ENC, LDI_D_DESC; 2601 2602def LDX_B: LDX_B_ENC, LDX_B_DESC; 2603def LDX_H: LDX_H_ENC, LDX_H_DESC; 2604def LDX_W: LDX_W_ENC, LDX_W_DESC; 2605def LDX_D: LDX_D_ENC, LDX_D_DESC; 2606 2607def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2608def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2609 2610def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2611def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2612 2613def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2614def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2615def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2616def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2617 2618def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2619def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2620def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2621def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2622 2623def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2624def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2625def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2626def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2627 2628def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2629def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2630def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2631def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2632 2633def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2634def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2635def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2636def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2637 2638def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2639def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2640def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2641def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2642 2643def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2644def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2645def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2646def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2647 2648def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2649def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2650def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2651def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2652 2653def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2654def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2655def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2656def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2657 2658def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2659def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2660def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2661def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2662 2663def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2664def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2665def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2666def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2667 2668def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2669def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2670def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2671def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2672 2673def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2674def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2675def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2676def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2677 2678def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2679 2680def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2681def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2682 2683def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2684def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2685 2686def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2687def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2688def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2689def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2690 2691def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2692def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2693 2694def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2695def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2696 2697def MULV_B : MULV_B_ENC, MULV_B_DESC; 2698def MULV_H : MULV_H_ENC, MULV_H_DESC; 2699def MULV_W : MULV_W_ENC, MULV_W_DESC; 2700def MULV_D : MULV_D_ENC, MULV_D_DESC; 2701 2702def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2703def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2704def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2705def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2706 2707def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2708def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2709def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2710def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2711 2712def NOR_V : NOR_V_ENC, NOR_V_DESC; 2713def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2714 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2715 MSA128B:$ws, MSA128B:$wt)>; 2716def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2717 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2718 MSA128B:$ws, MSA128B:$wt)>; 2719def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2720 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2721 MSA128B:$ws, MSA128B:$wt)>; 2722 2723def NORI_B : NORI_B_ENC, NORI_B_DESC; 2724 2725def OR_V : OR_V_ENC, OR_V_DESC; 2726def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2727 PseudoInstExpansion<(OR_V MSA128B:$wd, 2728 MSA128B:$ws, MSA128B:$wt)>; 2729def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2730 PseudoInstExpansion<(OR_V MSA128B:$wd, 2731 MSA128B:$ws, MSA128B:$wt)>; 2732def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2733 PseudoInstExpansion<(OR_V MSA128B:$wd, 2734 MSA128B:$ws, MSA128B:$wt)>; 2735 2736def ORI_B : ORI_B_ENC, ORI_B_DESC; 2737 2738def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2739def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2740def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2741def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2742 2743def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2744def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2745def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2746def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2747 2748def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2749def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2750def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2751def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2752 2753def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2754def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2755def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2756def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2757 2758def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2759def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2760def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2761def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2762 2763def SHF_B : SHF_B_ENC, SHF_B_DESC; 2764def SHF_H : SHF_H_ENC, SHF_H_DESC; 2765def SHF_W : SHF_W_ENC, SHF_W_DESC; 2766 2767def SLD_B : SLD_B_ENC, SLD_B_DESC; 2768def SLD_H : SLD_H_ENC, SLD_H_DESC; 2769def SLD_W : SLD_W_ENC, SLD_W_DESC; 2770def SLD_D : SLD_D_ENC, SLD_D_DESC; 2771 2772def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2773def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2774def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2775def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2776 2777def SLL_B : SLL_B_ENC, SLL_B_DESC; 2778def SLL_H : SLL_H_ENC, SLL_H_DESC; 2779def SLL_W : SLL_W_ENC, SLL_W_DESC; 2780def SLL_D : SLL_D_ENC, SLL_D_DESC; 2781 2782def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2783def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2784def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2785def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2786 2787def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2788def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2789def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2790def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2791 2792def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2793def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2794def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2795def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2796 2797def SRA_B : SRA_B_ENC, SRA_B_DESC; 2798def SRA_H : SRA_H_ENC, SRA_H_DESC; 2799def SRA_W : SRA_W_ENC, SRA_W_DESC; 2800def SRA_D : SRA_D_ENC, SRA_D_DESC; 2801 2802def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2803def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2804def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2805def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2806 2807def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2808def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2809def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2810def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2811 2812def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2813def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2814def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2815def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2816 2817def SRL_B : SRL_B_ENC, SRL_B_DESC; 2818def SRL_H : SRL_H_ENC, SRL_H_DESC; 2819def SRL_W : SRL_W_ENC, SRL_W_DESC; 2820def SRL_D : SRL_D_ENC, SRL_D_DESC; 2821 2822def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2823def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2824def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2825def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2826 2827def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2828def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2829def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2830def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2831 2832def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2833def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2834def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2835def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2836 2837def ST_B: ST_B_ENC, ST_B_DESC; 2838def ST_H: ST_H_ENC, ST_H_DESC; 2839def ST_W: ST_W_ENC, ST_W_DESC; 2840def ST_D: ST_D_ENC, ST_D_DESC; 2841 2842def STX_B: STX_B_ENC, STX_B_DESC; 2843def STX_H: STX_H_ENC, STX_H_DESC; 2844def STX_W: STX_W_ENC, STX_W_DESC; 2845def STX_D: STX_D_ENC, STX_D_DESC; 2846 2847def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2848def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2849def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2850def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2851 2852def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2853def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2854def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2855def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2856 2857def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2858def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2859def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2860def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2861 2862def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2863def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2864def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2865def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2866 2867def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2868def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2869def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2870def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2871 2872def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 2873def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 2874def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 2875def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 2876 2877def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 2878def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 2879def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 2880def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 2881 2882def XOR_V : XOR_V_ENC, XOR_V_DESC; 2883def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 2884 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2885 MSA128B:$ws, MSA128B:$wt)>; 2886def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 2887 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2888 MSA128B:$ws, MSA128B:$wt)>; 2889def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 2890 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2891 MSA128B:$ws, MSA128B:$wt)>; 2892 2893def XORI_B : XORI_B_ENC, XORI_B_DESC; 2894 2895// Patterns. 2896class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 2897 Pat<pattern, result>, Requires<pred>; 2898 2899def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 2900 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 2901 2902def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 2903def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 2904def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 2905def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 2906def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 2907def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 2908def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 2909 2910def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 2911def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 2912def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 2913 2914def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 2915 (ST_B MSA128B:$ws, addr:$addr)>; 2916def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 2917 (ST_H MSA128H:$ws, addr:$addr)>; 2918def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 2919 (ST_W MSA128W:$ws, addr:$addr)>; 2920def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 2921 (ST_D MSA128D:$ws, addr:$addr)>; 2922def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 2923 (ST_H MSA128H:$ws, addr:$addr)>; 2924def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 2925 (ST_W MSA128W:$ws, addr:$addr)>; 2926def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 2927 (ST_D MSA128D:$ws, addr:$addr)>; 2928 2929def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 2930 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 2931def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 2932 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 2933def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 2934 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 2935 2936class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 2937 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 2938 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2939 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 2940 2941// These are endian-independant because the element size doesnt change 2942def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 2943def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 2944def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 2945def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 2946def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 2947def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 2948 2949// Little endian bitcasts are always no-ops 2950def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 2951def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 2952def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 2953def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 2954def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 2955def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 2956 2957def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 2958def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 2959def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 2960def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 2961def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 2962 2963def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 2964def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 2965def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 2966def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 2967def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 2968 2969def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 2970def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 2971def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 2972def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 2973def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 2974 2975def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 2976def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 2977def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 2978def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 2979def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 2980 2981def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 2982def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 2983def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 2984def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 2985def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 2986 2987// Big endian bitcasts expand to shuffle instructions. 2988// This is because bitcast is defined to be a store/load sequence and the 2989// vector store/load instructions are mixed-endian with respect to the vector 2990// as a whole (little endian with respect to element order, but big endian 2991// elements). 2992 2993class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 2994 RegisterClass DstRC, MSAInst Insn, 2995 RegisterClass ViaRC> : 2996 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2997 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 2998 DstRC), 2999 [HasMSA, IsBE]>; 3000 3001class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3002 RegisterClass DstRC, MSAInst Insn, 3003 RegisterClass ViaRC> : 3004 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3005 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3006 DstRC), 3007 [HasMSA, IsBE]>; 3008 3009class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3010 RegisterClass DstRC> : 3011 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3012 3013class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3014 RegisterClass DstRC> : 3015 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3016 3017class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3018 RegisterClass DstRC> : 3019 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3020 (COPY_TO_REGCLASS 3021 (SHF_W 3022 (COPY_TO_REGCLASS 3023 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3024 MSA128W), 177), 3025 DstRC), 3026 [HasMSA, IsBE]>; 3027 3028class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3029 RegisterClass DstRC> : 3030 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3031 3032class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3033 RegisterClass DstRC> : 3034 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3035 3036class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3037 RegisterClass DstRC> : 3038 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3039 3040def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3041def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3042def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3043def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3044def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3045def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3046 3047def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3048def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3049def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3050def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3051def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3052 3053def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3054def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3055def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3056def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3057def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3058 3059def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3060def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3061def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3062def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3063def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3064 3065def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3066def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3067def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3068def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3069def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3070 3071def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3072def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3073def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3074def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3075def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3076 3077def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3078def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3079def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3080def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3081def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3082 3083// Pseudos used to implement BNZ.df, and BZ.df 3084 3085class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3086 RegisterClass RCWS, 3087 InstrItinClass itin = NoItinerary> : 3088 MipsPseudo<(outs GPR32:$dst), 3089 (ins RCWS:$ws), 3090 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3091 bit usesCustomInserter = 1; 3092} 3093 3094def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3095 MSA128B, NoItinerary>; 3096def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3097 MSA128H, NoItinerary>; 3098def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3099 MSA128W, NoItinerary>; 3100def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3101 MSA128D, NoItinerary>; 3102def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3103 MSA128B, NoItinerary>; 3104 3105def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3106 MSA128B, NoItinerary>; 3107def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3108 MSA128H, NoItinerary>; 3109def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3110 MSA128W, NoItinerary>; 3111def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3112 MSA128D, NoItinerary>; 3113def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3114 MSA128B, NoItinerary>; 3115