MipsMSAInstrInfo.td revision 930f2b51084c6dac1238b8b0f8dd11f40f619694
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>; 15def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 16def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 17 SDTCisInt<1>, 18 SDTCisSameAs<1, 2>, 19 SDTCisVT<3, OtherVT>]>; 20def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 21 SDTCisFP<1>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, OtherVT>]>; 24 25def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 26def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 27def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 28def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 29def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 30 [SDNPCommutative, SDNPAssociative]>; 31def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 32 [SDNPCommutative, SDNPAssociative]>; 33def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 34 [SDNPCommutative, SDNPAssociative]>; 35def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>; 38def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>; 39def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41 42def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 43def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 44 45def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 46 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 47def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 48 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 49 50// Pattern fragments 51def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 52 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 53def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 54 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 55def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 56 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 57 58def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 59 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 60def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 61 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 62def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 63 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 64 65def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 66 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 67def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 68 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 69def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 70 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 71 72class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 73 PatFrag<(ops node:$lhs, node:$rhs), 74 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 75 76// ISD::SETFALSE cannot occur 77def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 78def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 79def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 80def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 81def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 82def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 83def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 84def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 85def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 86def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 87def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 88def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 89def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 90def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 91def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 92def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 93def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 94def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 95def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 96def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 97def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 98def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 99def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 100def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 101def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 102def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 103def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 104def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 105// ISD::SETTRUE cannot occur 106// ISD::SETFALSE2 cannot occur 107// ISD::SETTRUE2 cannot occur 108 109class vsetcc_type<ValueType ResTy, CondCode CC> : 110 PatFrag<(ops node:$lhs, node:$rhs), 111 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 112 113def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 114def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 115def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 116def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 117def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 118def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 119def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 120def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 121def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 122def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 123def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 124def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 125def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 126def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 127def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 128def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 129def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 130def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 131def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 132def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 133 134def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>; 135def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>; 136def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>; 137def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>; 138 139// Immediates 140def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 141def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 142 143def uimm3 : Operand<i32> { 144 let PrintMethod = "printUnsignedImm"; 145} 146 147def uimm4 : Operand<i32> { 148 let PrintMethod = "printUnsignedImm"; 149} 150 151def uimm8 : Operand<i32> { 152 let PrintMethod = "printUnsignedImm"; 153} 154 155def simm5 : Operand<i32>; 156 157def simm10 : Operand<i32>; 158 159// Instruction encoding. 160class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 161class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 162class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 163class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 164 165class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 166class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 167class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 168class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 169 170class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 171class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 172class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 173class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 174 175class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 176class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 177class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 178class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 179 180class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 181class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 182class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 183class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 184 185class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 186class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 187class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 188class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 189 190class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 191 192class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 193 194class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 195class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 196class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 197class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 198 199class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 200class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 201class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 202class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 203 204class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 205class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 206class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 207class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 208 209class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 210class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 211class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 212class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 213 214class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 215class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 216class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 217class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 218 219class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 220class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 221class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 222class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 223 224class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 225class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 226class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 227class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 228 229class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 230class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 231class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 232class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 233 234class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 235class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 236class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 237class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 238 239class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 240class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 241class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 242class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 243 244class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 245class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 246class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 247class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 248 249class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 250class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 251class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 252class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 253 254class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 255 256class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 257 258class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 259 260class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 261 262class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 263class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 264class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 265class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 266 267class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 268class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 269class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 270class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 271 272class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 273class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 274class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 275class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 276 277class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 278 279class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 280 281class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 282 283class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 284class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 285class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 286class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 287 288class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 289class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 290class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 291class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 292 293class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 294class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 295class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 296class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 297 298class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 299 300class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 301class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 302class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 303class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 304 305class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 306class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 307class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 308class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 309 310class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 311 312class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 313class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 314class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 315class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 316 317class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 318class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 319class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 320class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 321 322class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 323class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 324class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 325class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 326 327class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 328class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 329class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 330class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 331 332class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 333class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 334class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 335class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 336 337class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 338class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 339class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 340class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 341 342class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 343class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 344class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 345class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 346 347class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 348class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 349class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 350class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 351 352class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 353class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 354class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 355 356class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 357class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 358class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 359 360class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 361 362class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 363class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 364class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 365class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 366 367class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 368class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 369class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 370class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 371 372class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 373class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 374class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 375 376class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 377class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 378class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 379 380class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 381class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 382class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 383 384class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 385class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 386class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 387 388class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 389class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 390class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 391 392class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 393class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 394class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 395 396class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 397class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 398 399class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 400class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 401 402class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 403class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 404 405class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 406class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 407 408class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 409class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 410 411class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 412class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 413 414class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 415class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 416 417class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 418class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 419 420class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 421class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 422 423class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 424class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 425 426class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 427class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 428 429class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 430class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 431 432class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 433class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 434 435class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 436class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 437 438class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 439class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 440 441class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 442class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 443 444class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 445class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 446 447class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 448class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 449 450class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 451class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 452 453class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 454class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 455 456class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 457class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 458 459class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 460class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 461 462class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 463class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 464class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 465 466class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 467class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 468 469class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 470class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 471 472class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 473class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 474 475class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 476class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 477 478class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 479class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 480 481class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 482class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 483 484class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 485class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 486 487class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 488class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 489 490class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 491class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 492 493class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 494class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 495 496class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 497class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 498 499class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 500class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 501 502class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 503class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 504 505class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 506class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 507 508class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 509class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 510 511class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 512class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 513 514class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 515class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 516 517class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 518class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 519 520class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 521class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 522 523class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 524class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 525 526class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 527class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 528 529class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 530class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 531 532class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 533class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 534 535class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 536class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 537 538class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 539class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 540 541class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 542class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 543 544class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 545class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 546 547class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 548class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 549 550class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 551class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 552 553class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 554class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 555class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 556 557class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 558class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 559class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 560 561class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 562class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 563class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 564 565class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 566class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 567class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 568 569class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 570class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 571class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 572class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 573 574class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 575class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 576class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 577class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 578 579class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 580class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 581class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 582class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 583 584class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 585class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 586class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 587class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 588 589class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 590class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 591class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 592 593class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 594class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 595class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 596class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 597 598class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 599class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 600class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 601class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 602 603class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 604class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 605class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 606class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 607 608class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 609class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 610class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 611class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 612 613class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 614class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 615 616class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 617class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 618 619class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 620class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 621class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 622class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 623 624class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 625class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 626class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 627class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 628 629class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 630class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 631class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 632class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 633 634class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 635class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 636class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 637class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 638 639class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 640class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 641class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 642class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 643 644class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 645class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 646class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 647class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 648 649class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 650class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 651class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 652class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 653 654class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 655class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 656class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 657class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 658 659class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 660class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 661class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 662class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 663 664class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 665class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 666class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 667class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 668 669class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 670class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 671class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 672class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 673 674class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 675class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 676class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 677class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 678 679class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 680class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 681class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 682class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 683 684class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 685 686class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 687class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 688 689class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 690class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 691 692class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 693class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 694class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 695class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 696 697class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 698class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 699 700class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 701class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 702 703class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 704class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 705class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 706class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 707 708class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 709class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 710class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 711class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 712 713class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 714class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 715class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 716class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 717 718class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 719 720class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 721 722class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 723 724class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 725 726class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 727class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 728class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 729class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 730 731class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 732class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 733class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 734class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 735 736class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 737class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 738class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 739class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 740 741class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 742class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 743class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 744class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 745 746class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 747class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 748class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 749class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 750 751class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 752class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 753class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 754 755class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 756class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 757class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 758class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 759 760class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 761class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 762class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 763class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 764 765class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 766class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 767class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 768class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 769 770class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 771class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 772class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 773class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 774 775class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 776class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 777class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 778class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 779 780class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 781class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 782class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 783class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 784 785class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 786class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 787class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 788class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 789 790class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 791class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 792class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 793class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 794 795class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 796class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 797class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 798class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 799 800class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 801class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 802class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 803class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 804 805class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 806class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 807class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 808class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 809 810class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 811class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 812class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 813class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 814 815class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 816class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 817class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 818class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 819 820class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 821class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 822class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 823class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 824 825class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 826class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 827class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 828class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 829 830class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 831class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 832class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 833class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 834 835class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 836class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 837class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 838class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 839 840class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 841class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 842class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 843class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 844 845class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 846class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 847class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 848class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 849 850class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 851class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 852class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 853class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 854 855class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 856class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 857class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 858class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 859 860class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 861class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 862class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 863class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 864 865class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 866class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 867class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 868class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 869 870class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 871 872class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 873 874// Instruction desc. 875class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 876 RegisterClass RCWD, RegisterClass RCWS = RCWD, 877 InstrItinClass itin = NoItinerary> { 878 dag OutOperandList = (outs RCWD:$wd); 879 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 880 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 881 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 882 InstrItinClass Itinerary = itin; 883} 884 885class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 886 RegisterClass RCWD, RegisterClass RCWS = RCWD, 887 InstrItinClass itin = NoItinerary> { 888 dag OutOperandList = (outs RCWD:$wd); 889 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 890 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 891 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 892 InstrItinClass Itinerary = itin; 893} 894 895class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 896 RegisterClass RCWD, RegisterClass RCWS = RCWD, 897 InstrItinClass itin = NoItinerary> { 898 dag OutOperandList = (outs RCWD:$wd); 899 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 900 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 901 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 902 InstrItinClass Itinerary = itin; 903} 904 905class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 906 RegisterClass RCWD, RegisterClass RCWS = RCWD, 907 InstrItinClass itin = NoItinerary> { 908 dag OutOperandList = (outs RCWD:$wd); 909 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 910 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 911 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 912 InstrItinClass Itinerary = itin; 913} 914 915class MSA_BIT_SPLATB_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 916 RegisterClass RCWD, RegisterClass RCWS = RCWD, 917 InstrItinClass itin = NoItinerary> { 918 dag OutOperandList = (outs RCWD:$wd); 919 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 920 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 921 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 922 (vsplati8 immZExt3:$u3)))]; 923 InstrItinClass Itinerary = itin; 924} 925 926class MSA_BIT_SPLATH_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 927 RegisterClass RCWD, RegisterClass RCWS = RCWD, 928 InstrItinClass itin = NoItinerary> { 929 dag OutOperandList = (outs RCWD:$wd); 930 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 931 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 932 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 933 (vsplati16 immZExt4:$u4)))]; 934 InstrItinClass Itinerary = itin; 935} 936 937class MSA_BIT_SPLATW_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 938 RegisterClass RCWD, RegisterClass RCWS = RCWD, 939 InstrItinClass itin = NoItinerary> { 940 dag OutOperandList = (outs RCWD:$wd); 941 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 942 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 943 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 944 (vsplati32 immZExt5:$u5)))]; 945 InstrItinClass Itinerary = itin; 946} 947 948class MSA_BIT_SPLATD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 949 RegisterClass RCWD, RegisterClass RCWS = RCWD, 950 InstrItinClass itin = NoItinerary> { 951 dag OutOperandList = (outs RCWD:$wd); 952 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 953 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 954 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 955 (vsplati64 immZExt6:$u6)))]; 956 InstrItinClass Itinerary = itin; 957} 958 959class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 960 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 961 InstrItinClass itin = NoItinerary> { 962 dag OutOperandList = (outs RCD:$rd); 963 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 964 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 965 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 966 InstrItinClass Itinerary = itin; 967} 968 969class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 970 SDPatternOperator SplatNode, RegisterClass RCWD, 971 RegisterClass RCWS = RCWD, 972 InstrItinClass itin = NoItinerary> { 973 dag OutOperandList = (outs RCWD:$wd); 974 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 975 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 976 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 977 (SplatNode immZExt5:$u5)))]; 978 InstrItinClass Itinerary = itin; 979} 980 981class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 982 SDPatternOperator SplatNode, RegisterClass RCWD, 983 RegisterClass RCWS = RCWD, 984 InstrItinClass itin = NoItinerary> { 985 dag OutOperandList = (outs RCWD:$wd); 986 dag InOperandList = (ins RCWS:$ws, simm5:$s5); 987 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5"); 988 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 989 (SplatNode immSExt5:$s5)))]; 990 InstrItinClass Itinerary = itin; 991} 992 993class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 994 SDPatternOperator SplatNode, RegisterClass RCWD, 995 RegisterClass RCWS = RCWD, 996 InstrItinClass itin = NoItinerary> { 997 dag OutOperandList = (outs RCWD:$wd); 998 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 999 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1000 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 1001 (SplatNode immZExt8:$u8)))]; 1002 InstrItinClass Itinerary = itin; 1003} 1004 1005// This class is deprecated and will be removed in the next few patches 1006class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1007 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1008 InstrItinClass itin = NoItinerary> { 1009 dag OutOperandList = (outs RCWD:$wd); 1010 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1011 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1012 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1013 InstrItinClass Itinerary = itin; 1014} 1015 1016class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1017 RegisterClass RCWD, 1018 InstrItinClass itin = NoItinerary> { 1019 dag OutOperandList = (outs RCWD:$wd); 1020 dag InOperandList = (ins simm10:$i10); 1021 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1022 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))]; 1023 InstrItinClass Itinerary = itin; 1024} 1025 1026class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1027 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1028 InstrItinClass itin = NoItinerary> { 1029 dag OutOperandList = (outs RCWD:$wd); 1030 dag InOperandList = (ins RCWS:$ws); 1031 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1032 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1033 InstrItinClass Itinerary = itin; 1034} 1035 1036class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1037 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1038 InstrItinClass itin = NoItinerary> : 1039 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 1040 1041 1042class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1043 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1044 RegisterClass RCWT = RCWD, 1045 InstrItinClass itin = NoItinerary> { 1046 dag OutOperandList = (outs RCWD:$wd); 1047 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1048 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1049 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1050 InstrItinClass Itinerary = itin; 1051} 1052 1053class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1054 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1055 RegisterClass RCWT = RCWD, 1056 InstrItinClass itin = NoItinerary> { 1057 dag OutOperandList = (outs RCWD:$wd); 1058 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1059 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1060 list<dag> Pattern = [(set RCWD:$wd, 1061 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 1062 InstrItinClass Itinerary = itin; 1063 string Constraints = "$wd = $wd_in"; 1064} 1065 1066class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1067 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1068 RegisterClass RCWT = RCWD, 1069 InstrItinClass itin = NoItinerary> : 1070 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1071 1072class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1073 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1074 RegisterClass RCWT = RCWD, 1075 InstrItinClass itin = NoItinerary> : 1076 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1077 1078class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1079 dag OutOperandList = (outs); 1080 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1081 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1082 list<dag> Pattern = []; 1083 InstrItinClass Itinerary = IIBranch; 1084 bit isBranch = 1; 1085 bit isTerminator = 1; 1086 bit hasDelaySlot = 1; 1087 list<Register> Defs = [AT]; 1088} 1089 1090class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1091 RegisterClass RCD, RegisterClass RCWS, 1092 InstrItinClass itin = NoItinerary> { 1093 dag OutOperandList = (outs RCD:$wd); 1094 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1095 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1096 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1097 RCWS:$rs, 1098 immZExt6:$n))]; 1099 InstrItinClass Itinerary = itin; 1100 string Constraints = "$wd = $wd_in"; 1101} 1102 1103class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1104 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1105 InstrItinClass itin = NoItinerary> { 1106 dag OutOperandList = (outs RCWD:$wd); 1107 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1108 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1109 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1110 immZExt6:$n, 1111 RCWS:$ws))]; 1112 InstrItinClass Itinerary = itin; 1113 string Constraints = "$wd = $wd_in"; 1114} 1115 1116class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1117 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1118 RegisterClass RCWT = RCWD, 1119 InstrItinClass itin = NoItinerary> { 1120 dag OutOperandList = (outs RCWD:$wd); 1121 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1122 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1123 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1124 InstrItinClass Itinerary = itin; 1125} 1126 1127class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1128 RegisterClass RCWS = RCWD, 1129 RegisterClass RCWT = RCWD> : 1130 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1131 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1132 1133class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 1134 IsCommutable; 1135class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 1136 IsCommutable; 1137class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 1138 IsCommutable; 1139class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 1140 IsCommutable; 1141 1142class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 1143 IsCommutable; 1144class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 1145 IsCommutable; 1146class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 1147 IsCommutable; 1148class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 1149 IsCommutable; 1150 1151class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 1152 IsCommutable; 1153class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 1154 IsCommutable; 1155class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 1156 IsCommutable; 1157class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 1158 IsCommutable; 1159 1160class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 1161 IsCommutable; 1162class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 1163 IsCommutable; 1164class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 1165 IsCommutable; 1166class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 1167 IsCommutable; 1168 1169class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 1170class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1171class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1172class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1173 1174class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8, MSA128B>; 1175class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16, MSA128H>; 1176class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32, MSA128W>; 1177class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64, MSA128D>; 1178 1179class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1180class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1181class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1182class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1183 1184class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8, MSA128B>; 1185 1186class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1187class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1188class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1189class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1190 1191class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1192class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1193class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1194class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1195 1196class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1197 IsCommutable; 1198class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1199 IsCommutable; 1200class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1201 IsCommutable; 1202class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1203 IsCommutable; 1204 1205class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1206 IsCommutable; 1207class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1208 IsCommutable; 1209class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1210 IsCommutable; 1211class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1212 IsCommutable; 1213 1214class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1215 IsCommutable; 1216class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1217 IsCommutable; 1218class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1219 IsCommutable; 1220class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1221 IsCommutable; 1222 1223class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1224 IsCommutable; 1225class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1226 IsCommutable; 1227class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1228 IsCommutable; 1229class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1230 IsCommutable; 1231 1232class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1233class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1234class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1235class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1236 1237class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1238class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1239class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1240class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1241 1242class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1243class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1244class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1245class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1246 1247class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1248 MSA128B>; 1249class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1250 MSA128H>; 1251class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1252 MSA128W>; 1253class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1254 MSA128D>; 1255 1256class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1257class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1258class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1259class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1260 1261class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1262 MSA128B>; 1263class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1264 MSA128H>; 1265class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1266 MSA128W>; 1267class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1268 MSA128D>; 1269 1270class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1271 1272class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1273 1274class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1275 1276class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1277 1278class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1279class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1280class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1281class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1282 1283class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1284class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1285class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1286class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1287 1288class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1289class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1290class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1291class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1292 1293class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1294 1295class BSEL_V_DESC { 1296 dag OutOperandList = (outs MSA128B:$wd); 1297 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1298 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1299 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1300 MSA128B:$wt))]; 1301 InstrItinClass Itinerary = NoItinerary; 1302 string Constraints = "$wd = $wd_in"; 1303} 1304 1305class BSELI_B_DESC { 1306 dag OutOperandList = (outs MSA128B:$wd); 1307 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, uimm8:$u8); 1308 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1309 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, 1310 MSA128B:$ws, 1311 (vsplati8 immZExt8:$u8)))]; 1312 InstrItinClass Itinerary = NoItinerary; 1313 string Constraints = "$wd = $wd_in"; 1314} 1315 1316class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1317class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1318class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1319class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1320 1321class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1322class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1323class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1324class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1325 1326class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1327class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1328class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1329class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1330 1331class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1332 1333class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>, 1334 IsCommutable; 1335class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>, 1336 IsCommutable; 1337class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>, 1338 IsCommutable; 1339class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>, 1340 IsCommutable; 1341 1342class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8, 1343 MSA128B>; 1344class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16, 1345 MSA128H>; 1346class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32, 1347 MSA128W>; 1348class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64, 1349 MSA128D>; 1350 1351class CFCMSA_DESC { 1352 dag OutOperandList = (outs GPR32:$rd); 1353 dag InOperandList = (ins MSACtrl:$cs); 1354 string AsmString = "cfcmsa\t$rd, $cs"; 1355 InstrItinClass Itinerary = NoItinerary; 1356 bit hasSideEffects = 1; 1357} 1358 1359class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>; 1360class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>; 1361class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>; 1362class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>; 1363 1364class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>; 1365class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>; 1366class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>; 1367class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>; 1368 1369class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", vsetle_v16i8, vsplati8, 1370 MSA128B>; 1371class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", vsetle_v8i16, vsplati16, 1372 MSA128H>; 1373class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", vsetle_v4i32, vsplati32, 1374 MSA128W>; 1375class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", vsetle_v2i64, vsplati64, 1376 MSA128D>; 1377 1378class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, vsplati8, 1379 MSA128B>; 1380class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, vsplati16, 1381 MSA128H>; 1382class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, vsplati32, 1383 MSA128W>; 1384class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, vsplati64, 1385 MSA128D>; 1386 1387class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>; 1388class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>; 1389class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>; 1390class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>; 1391 1392class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>; 1393class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>; 1394class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>; 1395class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>; 1396 1397class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", vsetlt_v16i8, vsplati8, 1398 MSA128B>; 1399class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", vsetlt_v8i16, vsplati16, 1400 MSA128H>; 1401class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", vsetlt_v4i32, vsplati32, 1402 MSA128W>; 1403class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", vsetlt_v2i64, vsplati64, 1404 MSA128D>; 1405 1406class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, vsplati8, 1407 MSA128B>; 1408class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, vsplati16, 1409 MSA128H>; 1410class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, vsplati32, 1411 MSA128W>; 1412class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, vsplati64, 1413 MSA128D>; 1414 1415class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1416 GPR32, MSA128B>; 1417class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1418 GPR32, MSA128H>; 1419class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1420 GPR32, MSA128W>; 1421 1422class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1423 GPR32, MSA128B>; 1424class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1425 GPR32, MSA128H>; 1426class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1427 GPR32, MSA128W>; 1428 1429class CTCMSA_DESC { 1430 dag OutOperandList = (outs); 1431 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1432 string AsmString = "ctcmsa\t$cd, $rs"; 1433 InstrItinClass Itinerary = NoItinerary; 1434 bit hasSideEffects = 1; 1435} 1436 1437class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1438class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1439class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1440class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1441 1442class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1443class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1444class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1445class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1446 1447class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1448 MSA128B, MSA128B>, IsCommutable; 1449class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1450 MSA128H, MSA128H>, IsCommutable; 1451class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1452 MSA128W, MSA128W>, IsCommutable; 1453 1454class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1455 MSA128B, MSA128B>, IsCommutable; 1456class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1457 MSA128H, MSA128H>, IsCommutable; 1458class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1459 MSA128W, MSA128W>, IsCommutable; 1460 1461class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1462 MSA128H, MSA128B, MSA128B>, 1463 IsCommutable; 1464class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1465 MSA128W, MSA128H, MSA128H>, 1466 IsCommutable; 1467class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1468 MSA128D, MSA128W, MSA128W>, 1469 IsCommutable; 1470 1471class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1472 MSA128H, MSA128B, MSA128B>, 1473 IsCommutable; 1474class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1475 MSA128W, MSA128H, MSA128H>, 1476 IsCommutable; 1477class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1478 MSA128D, MSA128W, MSA128W>, 1479 IsCommutable; 1480 1481class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1482 MSA128H, MSA128B, MSA128B>; 1483class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1484 MSA128W, MSA128H, MSA128H>; 1485class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1486 MSA128D, MSA128W, MSA128W>; 1487 1488class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1489 MSA128H, MSA128B, MSA128B>; 1490class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1491 MSA128W, MSA128H, MSA128H>; 1492class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1493 MSA128D, MSA128W, MSA128W>; 1494 1495class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1496class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1497 1498class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1499 IsCommutable; 1500class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1501 IsCommutable; 1502 1503class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>, 1504 IsCommutable; 1505class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>, 1506 IsCommutable; 1507 1508class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1509 MSA128W>; 1510class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1511 MSA128D>; 1512 1513class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>; 1514class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>; 1515 1516class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>; 1517class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>; 1518 1519class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>, 1520 IsCommutable; 1521class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>, 1522 IsCommutable; 1523 1524class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>, 1525 IsCommutable; 1526class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>, 1527 IsCommutable; 1528 1529class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>, 1530 IsCommutable; 1531class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>, 1532 IsCommutable; 1533 1534class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>, 1535 IsCommutable; 1536class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>, 1537 IsCommutable; 1538 1539class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>, 1540 IsCommutable; 1541class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>, 1542 IsCommutable; 1543 1544class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>, 1545 IsCommutable; 1546class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>, 1547 IsCommutable; 1548 1549class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>, 1550 IsCommutable; 1551class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>, 1552 IsCommutable; 1553 1554class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1555class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1556 1557class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1558 MSA128H, MSA128W, MSA128W>; 1559class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1560 MSA128W, MSA128D, MSA128D>; 1561 1562class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1563class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1564 1565class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1566 MSA128W, MSA128H>; 1567class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1568 MSA128D, MSA128W>; 1569 1570class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1571 MSA128W, MSA128H>; 1572class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1573 MSA128D, MSA128W>; 1574 1575class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1576 MSA128W>; 1577class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1578 MSA128D>; 1579 1580class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1581 MSA128W>; 1582class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1583 MSA128D>; 1584 1585class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1586 MSA128W, MSA128H>; 1587class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1588 MSA128D, MSA128W>; 1589 1590class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1591 MSA128W, MSA128H>; 1592class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1593 MSA128D, MSA128W>; 1594 1595class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>; 1596class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>; 1597class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>; 1598 1599class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1600class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1601 1602class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1603 MSA128W>; 1604class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1605 MSA128D>; 1606 1607class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1608class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1609 1610class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1611 MSA128W>; 1612class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1613 MSA128D>; 1614 1615class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1616class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1617 1618class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1619 MSA128W>; 1620class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1621 MSA128D>; 1622 1623class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1624 MSA128W>; 1625class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1626 MSA128D>; 1627 1628class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1629class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1630 1631class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1632class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1633 1634class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1635class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1636 1637class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1638 MSA128W>; 1639class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1640 MSA128D>; 1641 1642class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1643class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1644 1645class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1646class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1647 1648class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1649class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1650 1651class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1652class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1653 1654class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1655class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1656 1657class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1658class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1659 1660class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1661class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1662 1663class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1664class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1665 1666class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1667class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1668 1669class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1670class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1671 1672class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1673class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1674 1675class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1676class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1677 1678class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1679class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1680 1681class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1682 MSA128W>; 1683class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1684 MSA128D>; 1685 1686class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1687 MSA128W>; 1688class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1689 MSA128D>; 1690 1691class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1692 MSA128W>; 1693class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1694 MSA128D>; 1695 1696class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1697 MSA128W>; 1698class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1699 MSA128D>; 1700 1701class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1702 MSA128H, MSA128W, MSA128W>; 1703class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1704 MSA128W, MSA128D, MSA128D>; 1705 1706class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1707 MSA128B, MSA128B>; 1708class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1709 MSA128H, MSA128H>; 1710class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1711 MSA128W, MSA128W>; 1712 1713class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1714 MSA128B, MSA128B>; 1715class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1716 MSA128H, MSA128H>; 1717class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1718 MSA128W, MSA128W>; 1719 1720class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1721 MSA128B, MSA128B>; 1722class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1723 MSA128H, MSA128H>; 1724class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1725 MSA128W, MSA128W>; 1726 1727class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1728 MSA128B, MSA128B>; 1729class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1730 MSA128H, MSA128H>; 1731class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1732 MSA128W, MSA128W>; 1733 1734class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1735class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1736class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1737class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1738 1739class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1740class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1741class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1742class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1743 1744class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1745class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1746class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1747class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1748 1749class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1750class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1751class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1752class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1753 1754class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1755 GPR32>; 1756class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1757 GPR32>; 1758class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1759 GPR32>; 1760 1761class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1762class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1763class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1764class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1765 1766class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1767 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1768 ComplexPattern Addr = addrRegImm, 1769 InstrItinClass itin = NoItinerary> { 1770 dag OutOperandList = (outs RCWD:$wd); 1771 dag InOperandList = (ins MemOpnd:$addr); 1772 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1773 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1774 InstrItinClass Itinerary = itin; 1775} 1776 1777class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1778class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1779class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1780class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1781 1782class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>; 1783class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>; 1784class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>; 1785class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>; 1786 1787class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1788 ValueType TyNode, RegisterClass RCWD, 1789 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1790 InstrItinClass itin = NoItinerary> { 1791 dag OutOperandList = (outs RCWD:$wd); 1792 dag InOperandList = (ins MemOpnd:$addr); 1793 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1794 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1795 InstrItinClass Itinerary = itin; 1796} 1797 1798class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1799class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1800class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1801class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1802 1803class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1804 MSA128H>; 1805class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1806 MSA128W>; 1807 1808class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1809 MSA128H>; 1810class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1811 MSA128W>; 1812 1813class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1814class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1815class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1816class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1817 1818class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1819class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1820class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1821class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1822 1823class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>; 1824class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>; 1825class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>; 1826class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>; 1827 1828class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>; 1829class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>; 1830class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>; 1831class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>; 1832 1833class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8, 1834 MSA128B>; 1835class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16, 1836 MSA128H>; 1837class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32, 1838 MSA128W>; 1839class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64, 1840 MSA128D>; 1841 1842class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8, 1843 MSA128B>; 1844class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16, 1845 MSA128H>; 1846class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32, 1847 MSA128W>; 1848class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64, 1849 MSA128D>; 1850 1851class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1852class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1853class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1854class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1855 1856class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>; 1857class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>; 1858class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>; 1859class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>; 1860 1861class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>; 1862class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>; 1863class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>; 1864class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>; 1865 1866class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8, 1867 MSA128B>; 1868class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16, 1869 MSA128H>; 1870class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32, 1871 MSA128W>; 1872class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64, 1873 MSA128D>; 1874 1875class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8, 1876 MSA128B>; 1877class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16, 1878 MSA128H>; 1879class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32, 1880 MSA128W>; 1881class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64, 1882 MSA128D>; 1883 1884class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1885class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1886class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1887class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1888 1889class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1890class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1891class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1892class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1893 1894class MOVE_V_DESC { 1895 dag OutOperandList = (outs MSA128B:$wd); 1896 dag InOperandList = (ins MSA128B:$ws); 1897 string AsmString = "move.v\t$wd, $ws"; 1898 list<dag> Pattern = []; 1899 InstrItinClass Itinerary = NoItinerary; 1900} 1901 1902class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 1903 MSA128H>; 1904class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 1905 MSA128W>; 1906 1907class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 1908 MSA128H>; 1909class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 1910 MSA128W>; 1911 1912class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 1913class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 1914class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 1915class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 1916 1917class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 1918class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 1919 1920class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 1921 MSA128H>; 1922class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 1923 MSA128W>; 1924 1925class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 1926class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 1927class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 1928class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 1929 1930class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 1931class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 1932class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 1933class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 1934 1935class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 1936class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 1937class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 1938class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 1939 1940class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 1941class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 1942class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 1943class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 1944 1945class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8, MSA128B>; 1946 1947class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 1948class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 1949class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 1950class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 1951 1952class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8, MSA128B>; 1953 1954class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 1955class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 1956class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 1957class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 1958 1959class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 1960class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 1961class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 1962class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 1963 1964class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 1965class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 1966class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 1967class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 1968 1969class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 1970class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 1971class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 1972class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 1973 1974class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 1975class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 1976class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 1977class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 1978 1979class SHF_B_DESC : MSA_I8_X_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>; 1980class SHF_H_DESC : MSA_I8_X_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>; 1981class SHF_W_DESC : MSA_I8_X_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>; 1982 1983class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 1984class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 1985class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 1986class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 1987 1988class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 1989class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 1990class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 1991class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 1992 1993class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 1994class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 1995class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 1996class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 1997 1998class SLLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"slli.b", shl, MSA128B>; 1999class SLLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"slli.h", shl, MSA128H>; 2000class SLLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"slli.w", shl, MSA128W>; 2001class SLLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"slli.d", shl, MSA128D>; 2002 2003class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 2004 MSA128B, GPR32>; 2005class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 2006 MSA128H, GPR32>; 2007class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 2008 MSA128W, GPR32>; 2009class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 2010 MSA128D, GPR32>; 2011 2012class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 2013 MSA128B>; 2014class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 2015 MSA128H>; 2016class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 2017 MSA128W>; 2018class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 2019 MSA128D>; 2020 2021class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 2022class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 2023class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 2024class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 2025 2026class SRAI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srai.b", sra, MSA128B>; 2027class SRAI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srai.h", sra, MSA128H>; 2028class SRAI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srai.w", sra, MSA128W>; 2029class SRAI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srai.d", sra, MSA128D>; 2030 2031class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 2032class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 2033class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 2034class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 2035 2036class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2037class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2038class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2039class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2040 2041class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 2042class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 2043class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 2044class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 2045 2046class SRLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srli.b", srl, MSA128B>; 2047class SRLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srli.h", srl, MSA128H>; 2048class SRLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srli.w", srl, MSA128W>; 2049class SRLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srli.d", srl, MSA128D>; 2050 2051class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 2052class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 2053class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 2054class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 2055 2056class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2057class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2058class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2059class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2060 2061class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2062 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2063 ComplexPattern Addr = addrRegImm, 2064 InstrItinClass itin = NoItinerary> { 2065 dag OutOperandList = (outs); 2066 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2067 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2068 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2069 InstrItinClass Itinerary = itin; 2070} 2071 2072class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2073class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2074class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2075class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2076 2077class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2078 ValueType TyNode, RegisterClass RCWD, 2079 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2080 InstrItinClass itin = NoItinerary> { 2081 dag OutOperandList = (outs); 2082 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2083 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2084 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2085 InstrItinClass Itinerary = itin; 2086} 2087 2088class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2089class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2090class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2091class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2092 2093class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 2094class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 2095class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 2096class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 2097 2098class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 2099class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 2100class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 2101class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 2102 2103class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2104 MSA128B>; 2105class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2106 MSA128H>; 2107class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2108 MSA128W>; 2109class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2110 MSA128D>; 2111 2112class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2113 MSA128B>; 2114class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2115 MSA128H>; 2116class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2117 MSA128W>; 2118class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2119 MSA128D>; 2120 2121class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 2122class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 2123class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 2124class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 2125 2126class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8, MSA128B>; 2127class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16, MSA128H>; 2128class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32, MSA128W>; 2129class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64, MSA128D>; 2130 2131class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>; 2132class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>; 2133class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>; 2134class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>; 2135 2136class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2137class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2138class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2139class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2140 2141class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8, MSA128B>; 2142 2143// Instruction defs. 2144def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2145def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2146def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2147def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2148 2149def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2150def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2151def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2152def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2153 2154def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2155def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2156def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2157def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2158 2159def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2160def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2161def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2162def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2163 2164def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2165def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2166def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2167def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2168 2169def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2170def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2171def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2172def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2173 2174def AND_V : AND_V_ENC, AND_V_DESC; 2175def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2176 PseudoInstExpansion<(AND_V MSA128B:$wd, 2177 MSA128B:$ws, MSA128B:$wt)>; 2178def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2179 PseudoInstExpansion<(AND_V MSA128B:$wd, 2180 MSA128B:$ws, MSA128B:$wt)>; 2181def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2182 PseudoInstExpansion<(AND_V MSA128B:$wd, 2183 MSA128B:$ws, MSA128B:$wt)>; 2184 2185def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2186 2187def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2188def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2189def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2190def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2191 2192def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2193def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2194def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2195def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2196 2197def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2198def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2199def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2200def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2201 2202def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2203def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2204def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2205def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2206 2207def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2208def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2209def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2210def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2211 2212def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2213def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2214def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2215def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2216 2217def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2218def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2219def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2220def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2221 2222def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2223def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2224def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2225def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2226 2227def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2228def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2229def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2230def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2231 2232def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2233def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2234def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2235def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2236 2237def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2238def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2239def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2240def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2241 2242def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2243def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2244def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2245def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2246 2247def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2248 2249def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2250 2251def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2252 2253def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2254 2255def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2256def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2257def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2258def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2259 2260def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2261def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2262def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2263def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2264 2265def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2266def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2267def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2268def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2269 2270def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2271 2272def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2273 2274class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2275 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2276 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2277 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2278 MSA128B:$wt)> { 2279 let Constraints = "$wd_in = $wd"; 2280} 2281 2282def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2283def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2284def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2285def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2286def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2287 2288def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2289 2290def BSET_B : BSET_B_ENC, BSET_B_DESC; 2291def BSET_H : BSET_H_ENC, BSET_H_DESC; 2292def BSET_W : BSET_W_ENC, BSET_W_DESC; 2293def BSET_D : BSET_D_ENC, BSET_D_DESC; 2294 2295def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2296def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2297def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2298def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2299 2300def BZ_B : BZ_B_ENC, BZ_B_DESC; 2301def BZ_H : BZ_H_ENC, BZ_H_DESC; 2302def BZ_W : BZ_W_ENC, BZ_W_DESC; 2303def BZ_D : BZ_D_ENC, BZ_D_DESC; 2304 2305def BZ_V : BZ_V_ENC, BZ_V_DESC; 2306 2307def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2308def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2309def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2310def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2311 2312def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2313def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2314def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2315def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2316 2317def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2318 2319def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2320def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2321def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2322def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2323 2324def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2325def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2326def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2327def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2328 2329def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2330def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2331def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2332def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2333 2334def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2335def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2336def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2337def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2338 2339def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2340def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2341def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2342def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2343 2344def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2345def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2346def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2347def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2348 2349def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2350def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2351def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2352def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2353 2354def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2355def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2356def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2357def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2358 2359def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2360def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2361def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2362 2363def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2364def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2365def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2366 2367def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2368 2369def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2370def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2371def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2372def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2373 2374def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2375def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2376def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2377def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2378 2379def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2380def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2381def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2382 2383def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2384def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2385def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2386 2387def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2388def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2389def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2390 2391def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2392def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2393def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2394 2395def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2396def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2397def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2398 2399def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2400def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2401def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2402 2403def FADD_W : FADD_W_ENC, FADD_W_DESC; 2404def FADD_D : FADD_D_ENC, FADD_D_DESC; 2405 2406def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2407def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2408 2409def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2410def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2411 2412def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2413def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2414 2415def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2416def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2417 2418def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2419def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2420 2421def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2422def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2423 2424def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2425def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2426 2427def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2428def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2429 2430def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2431def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2432 2433def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2434def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2435 2436def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2437def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2438 2439def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2440def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2441 2442def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2443def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2444 2445def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2446def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2447 2448def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2449def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2450 2451def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2452def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2453 2454def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2455def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2456 2457def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2458def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2459 2460def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2461def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2462 2463def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2464def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2465 2466def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2467def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2468 2469def FILL_B : FILL_B_ENC, FILL_B_DESC; 2470def FILL_H : FILL_H_ENC, FILL_H_DESC; 2471def FILL_W : FILL_W_ENC, FILL_W_DESC; 2472 2473def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2474def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2475 2476def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2477def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2478 2479def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2480def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2481 2482def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2483def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2484 2485def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2486def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2487 2488def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2489def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2490 2491def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2492def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2493 2494def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2495def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2496 2497def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2498def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2499 2500def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2501def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2502 2503def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2504def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2505 2506def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2507def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2508 2509def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2510def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2511 2512def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2513def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2514 2515def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2516def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2517 2518def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2519def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2520 2521def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2522def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2523 2524def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2525def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2526 2527def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2528def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2529 2530def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2531def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2532 2533def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2534def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2535 2536def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2537def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2538 2539def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2540def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2541 2542def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2543def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2544 2545def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2546def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2547 2548def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2549def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2550 2551def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2552def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2553 2554def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2555def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2556 2557def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2558def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2559 2560def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2561def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2562def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2563 2564def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2565def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2566def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2567 2568def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2569def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2570def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2571 2572def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2573def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2574def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2575 2576def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2577def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2578def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2579def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2580 2581def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2582def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2583def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2584def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2585 2586def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2587def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2588def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2589def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2590 2591def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2592def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2593def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2594def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2595 2596def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2597def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2598def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2599 2600def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2601def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2602def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2603def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2604 2605def LD_B: LD_B_ENC, LD_B_DESC; 2606def LD_H: LD_H_ENC, LD_H_DESC; 2607def LD_W: LD_W_ENC, LD_W_DESC; 2608def LD_D: LD_D_ENC, LD_D_DESC; 2609 2610def LDI_B : LDI_B_ENC, LDI_B_DESC; 2611def LDI_H : LDI_H_ENC, LDI_H_DESC; 2612def LDI_W : LDI_W_ENC, LDI_W_DESC; 2613def LDI_D : LDI_D_ENC, LDI_D_DESC; 2614 2615def LDX_B: LDX_B_ENC, LDX_B_DESC; 2616def LDX_H: LDX_H_ENC, LDX_H_DESC; 2617def LDX_W: LDX_W_ENC, LDX_W_DESC; 2618def LDX_D: LDX_D_ENC, LDX_D_DESC; 2619 2620def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2621def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2622 2623def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2624def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2625 2626def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2627def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2628def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2629def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2630 2631def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2632def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2633def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2634def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2635 2636def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2637def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2638def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2639def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2640 2641def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2642def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2643def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2644def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2645 2646def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2647def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2648def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2649def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2650 2651def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2652def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2653def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2654def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2655 2656def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2657def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2658def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2659def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2660 2661def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2662def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2663def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2664def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2665 2666def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2667def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2668def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2669def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2670 2671def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2672def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2673def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2674def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2675 2676def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2677def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2678def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2679def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2680 2681def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2682def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2683def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2684def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2685 2686def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2687def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2688def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2689def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2690 2691def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2692 2693def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2694def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2695 2696def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2697def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2698 2699def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2700def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2701def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2702def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2703 2704def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2705def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2706 2707def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2708def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2709 2710def MULV_B : MULV_B_ENC, MULV_B_DESC; 2711def MULV_H : MULV_H_ENC, MULV_H_DESC; 2712def MULV_W : MULV_W_ENC, MULV_W_DESC; 2713def MULV_D : MULV_D_ENC, MULV_D_DESC; 2714 2715def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2716def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2717def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2718def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2719 2720def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2721def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2722def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2723def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2724 2725def NOR_V : NOR_V_ENC, NOR_V_DESC; 2726def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2727 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2728 MSA128B:$ws, MSA128B:$wt)>; 2729def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2730 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2731 MSA128B:$ws, MSA128B:$wt)>; 2732def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2733 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2734 MSA128B:$ws, MSA128B:$wt)>; 2735 2736def NORI_B : NORI_B_ENC, NORI_B_DESC; 2737 2738def OR_V : OR_V_ENC, OR_V_DESC; 2739def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2740 PseudoInstExpansion<(OR_V MSA128B:$wd, 2741 MSA128B:$ws, MSA128B:$wt)>; 2742def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2743 PseudoInstExpansion<(OR_V MSA128B:$wd, 2744 MSA128B:$ws, MSA128B:$wt)>; 2745def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2746 PseudoInstExpansion<(OR_V MSA128B:$wd, 2747 MSA128B:$ws, MSA128B:$wt)>; 2748 2749def ORI_B : ORI_B_ENC, ORI_B_DESC; 2750 2751def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2752def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2753def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2754def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2755 2756def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2757def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2758def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2759def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2760 2761def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2762def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2763def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2764def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2765 2766def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2767def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2768def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2769def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2770 2771def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2772def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2773def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2774def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2775 2776def SHF_B : SHF_B_ENC, SHF_B_DESC; 2777def SHF_H : SHF_H_ENC, SHF_H_DESC; 2778def SHF_W : SHF_W_ENC, SHF_W_DESC; 2779 2780def SLD_B : SLD_B_ENC, SLD_B_DESC; 2781def SLD_H : SLD_H_ENC, SLD_H_DESC; 2782def SLD_W : SLD_W_ENC, SLD_W_DESC; 2783def SLD_D : SLD_D_ENC, SLD_D_DESC; 2784 2785def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2786def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2787def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2788def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2789 2790def SLL_B : SLL_B_ENC, SLL_B_DESC; 2791def SLL_H : SLL_H_ENC, SLL_H_DESC; 2792def SLL_W : SLL_W_ENC, SLL_W_DESC; 2793def SLL_D : SLL_D_ENC, SLL_D_DESC; 2794 2795def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2796def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2797def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2798def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2799 2800def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2801def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2802def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2803def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2804 2805def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2806def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2807def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2808def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2809 2810def SRA_B : SRA_B_ENC, SRA_B_DESC; 2811def SRA_H : SRA_H_ENC, SRA_H_DESC; 2812def SRA_W : SRA_W_ENC, SRA_W_DESC; 2813def SRA_D : SRA_D_ENC, SRA_D_DESC; 2814 2815def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2816def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2817def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2818def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2819 2820def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2821def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2822def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2823def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2824 2825def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2826def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2827def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2828def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2829 2830def SRL_B : SRL_B_ENC, SRL_B_DESC; 2831def SRL_H : SRL_H_ENC, SRL_H_DESC; 2832def SRL_W : SRL_W_ENC, SRL_W_DESC; 2833def SRL_D : SRL_D_ENC, SRL_D_DESC; 2834 2835def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2836def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2837def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2838def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2839 2840def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2841def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2842def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2843def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2844 2845def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2846def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2847def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2848def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2849 2850def ST_B: ST_B_ENC, ST_B_DESC; 2851def ST_H: ST_H_ENC, ST_H_DESC; 2852def ST_W: ST_W_ENC, ST_W_DESC; 2853def ST_D: ST_D_ENC, ST_D_DESC; 2854 2855def STX_B: STX_B_ENC, STX_B_DESC; 2856def STX_H: STX_H_ENC, STX_H_DESC; 2857def STX_W: STX_W_ENC, STX_W_DESC; 2858def STX_D: STX_D_ENC, STX_D_DESC; 2859 2860def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2861def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2862def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2863def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2864 2865def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2866def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2867def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2868def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2869 2870def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2871def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2872def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2873def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2874 2875def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2876def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2877def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2878def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2879 2880def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2881def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2882def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2883def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2884 2885def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 2886def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 2887def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 2888def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 2889 2890def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 2891def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 2892def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 2893def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 2894 2895def XOR_V : XOR_V_ENC, XOR_V_DESC; 2896def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 2897 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2898 MSA128B:$ws, MSA128B:$wt)>; 2899def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 2900 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2901 MSA128B:$ws, MSA128B:$wt)>; 2902def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 2903 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2904 MSA128B:$ws, MSA128B:$wt)>; 2905 2906def XORI_B : XORI_B_ENC, XORI_B_DESC; 2907 2908// Patterns. 2909class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 2910 Pat<pattern, result>, Requires<pred>; 2911 2912def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 2913 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 2914 2915def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 2916def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 2917def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 2918def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 2919def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 2920def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 2921def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 2922 2923def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 2924def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 2925def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 2926 2927def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 2928 (ST_B MSA128B:$ws, addr:$addr)>; 2929def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 2930 (ST_H MSA128H:$ws, addr:$addr)>; 2931def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 2932 (ST_W MSA128W:$ws, addr:$addr)>; 2933def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 2934 (ST_D MSA128D:$ws, addr:$addr)>; 2935def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 2936 (ST_H MSA128H:$ws, addr:$addr)>; 2937def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 2938 (ST_W MSA128W:$ws, addr:$addr)>; 2939def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 2940 (ST_D MSA128D:$ws, addr:$addr)>; 2941 2942def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 2943 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 2944def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 2945 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 2946def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 2947 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 2948 2949class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 2950 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 2951 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2952 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 2953 2954// These are endian-independant because the element size doesnt change 2955def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 2956def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 2957def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 2958def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 2959def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 2960def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 2961 2962// Little endian bitcasts are always no-ops 2963def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 2964def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 2965def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 2966def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 2967def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 2968def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 2969 2970def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 2971def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 2972def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 2973def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 2974def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 2975 2976def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 2977def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 2978def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 2979def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 2980def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 2981 2982def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 2983def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 2984def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 2985def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 2986def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 2987 2988def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 2989def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 2990def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 2991def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 2992def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 2993 2994def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 2995def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 2996def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 2997def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 2998def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 2999 3000// Big endian bitcasts expand to shuffle instructions. 3001// This is because bitcast is defined to be a store/load sequence and the 3002// vector store/load instructions are mixed-endian with respect to the vector 3003// as a whole (little endian with respect to element order, but big endian 3004// elements). 3005 3006class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3007 RegisterClass DstRC, MSAInst Insn, 3008 RegisterClass ViaRC> : 3009 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3010 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3011 DstRC), 3012 [HasMSA, IsBE]>; 3013 3014class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3015 RegisterClass DstRC, MSAInst Insn, 3016 RegisterClass ViaRC> : 3017 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3018 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3019 DstRC), 3020 [HasMSA, IsBE]>; 3021 3022class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3023 RegisterClass DstRC> : 3024 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3025 3026class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3027 RegisterClass DstRC> : 3028 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3029 3030class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3031 RegisterClass DstRC> : 3032 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3033 (COPY_TO_REGCLASS 3034 (SHF_W 3035 (COPY_TO_REGCLASS 3036 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3037 MSA128W), 177), 3038 DstRC), 3039 [HasMSA, IsBE]>; 3040 3041class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3042 RegisterClass DstRC> : 3043 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3044 3045class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3046 RegisterClass DstRC> : 3047 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3048 3049class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3050 RegisterClass DstRC> : 3051 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3052 3053def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3054def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3055def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3056def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3057def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3058def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3059 3060def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3061def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3062def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3063def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3064def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3065 3066def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3067def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3068def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3069def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3070def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3071 3072def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3073def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3074def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3075def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3076def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3077 3078def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3079def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3080def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3081def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3082def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3083 3084def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3085def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3086def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3087def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3088def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3089 3090def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3091def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3092def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3093def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3094def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3095 3096// Pseudos used to implement BNZ.df, and BZ.df 3097 3098class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3099 RegisterClass RCWS, 3100 InstrItinClass itin = NoItinerary> : 3101 MipsPseudo<(outs GPR32:$dst), 3102 (ins RCWS:$ws), 3103 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3104 bit usesCustomInserter = 1; 3105} 3106 3107def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3108 MSA128B, NoItinerary>; 3109def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3110 MSA128H, NoItinerary>; 3111def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3112 MSA128W, NoItinerary>; 3113def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3114 MSA128D, NoItinerary>; 3115def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3116 MSA128B, NoItinerary>; 3117 3118def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3119 MSA128B, NoItinerary>; 3120def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3121 MSA128H, NoItinerary>; 3122def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3123 MSA128W, NoItinerary>; 3124def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3125 MSA128D, NoItinerary>; 3126def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3127 MSA128B, NoItinerary>; 3128