MipsMSAInstrInfo.td revision 9672a89c71f7b368455ed193bc23566f3bd4ed2b
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>, 24 SDTCisInt<1>, SDTCisVec<1>, 25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>; 26def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>; 28def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>, 29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>; 30 31def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 32def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 33def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 34def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 35def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 36 [SDNPCommutative, SDNPAssociative]>; 37def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 38 [SDNPCommutative, SDNPAssociative]>; 39def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 40 [SDNPCommutative, SDNPAssociative]>; 41def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 42 [SDNPCommutative, SDNPAssociative]>; 43def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 44 [SDNPCommutative, SDNPAssociative]>; 45def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>; 46def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>; 47def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>; 48def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>; 49def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>; 50def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>; 51def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>; 52def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>; 53 54def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 55def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 56 57def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 59def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 61 62// Operands 63 64def uimm3 : Operand<i32> { 65 let PrintMethod = "printUnsignedImm"; 66} 67 68def uimm4 : Operand<i32> { 69 let PrintMethod = "printUnsignedImm"; 70} 71 72def uimm8 : Operand<i32> { 73 let PrintMethod = "printUnsignedImm"; 74} 75 76def simm5 : Operand<i32>; 77 78def simm10 : Operand<i32>; 79 80def vsplat_uimm1 : Operand<vAny> { 81 let PrintMethod = "printUnsignedImm8"; 82} 83 84def vsplat_uimm2 : Operand<vAny> { 85 let PrintMethod = "printUnsignedImm8"; 86} 87 88def vsplat_uimm3 : Operand<vAny> { 89 let PrintMethod = "printUnsignedImm"; 90} 91 92def vsplat_uimm4 : Operand<vAny> { 93 let PrintMethod = "printUnsignedImm"; 94} 95 96def vsplat_uimm5 : Operand<vAny> { 97 let PrintMethod = "printUnsignedImm"; 98} 99 100def vsplat_uimm6 : Operand<vAny> { 101 let PrintMethod = "printUnsignedImm"; 102} 103 104def vsplat_uimm8 : Operand<vAny> { 105 let PrintMethod = "printUnsignedImm"; 106} 107 108def vsplat_simm5 : Operand<vAny>; 109 110def vsplat_simm10 : Operand<vAny>; 111 112// Pattern fragments 113def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 114 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 115def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 116 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 117def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 118 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 119 120def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 121 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 122def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 123 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 124def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 125 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 126 127def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 129def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 131def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 133 134class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 135 PatFrag<(ops node:$lhs, node:$rhs), 136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 137 138// ISD::SETFALSE cannot occur 139def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 140def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 141def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 142def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 143def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 144def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 145def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 146def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 147def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 148def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 149def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 150def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 151def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 152def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 153def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 154def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 155def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 156def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 157def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 158def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 159def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 160def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 161def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 162def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 163def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 164def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 165def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 166def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 167// ISD::SETTRUE cannot occur 168// ISD::SETFALSE2 cannot occur 169// ISD::SETTRUE2 cannot occur 170 171class vsetcc_type<ValueType ResTy, CondCode CC> : 172 PatFrag<(ops node:$lhs, node:$rhs), 173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 174 175def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 176def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 177def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 178def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 179def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 180def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 181def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 182def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 183def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 184def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 185def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 186def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 187def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 188def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 189def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 190def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 191def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 192def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 193def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 194def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 195 196def vsplati8 : PatFrag<(ops node:$e0), 197 (v16i8 (build_vector node:$e0, node:$e0, 198 node:$e0, node:$e0, 199 node:$e0, node:$e0, 200 node:$e0, node:$e0, 201 node:$e0, node:$e0, 202 node:$e0, node:$e0, 203 node:$e0, node:$e0, 204 node:$e0, node:$e0))>; 205def vsplati16 : PatFrag<(ops node:$e0), 206 (v8i16 (build_vector node:$e0, node:$e0, 207 node:$e0, node:$e0, 208 node:$e0, node:$e0, 209 node:$e0, node:$e0))>; 210def vsplati32 : PatFrag<(ops node:$e0), 211 (v4i32 (build_vector node:$e0, node:$e0, 212 node:$e0, node:$e0))>; 213def vsplati64 : PatFrag<(ops node:$e0), 214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 215 216class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 217 SDNodeXForm xform = NOOP_SDNodeXForm> 218 : PatLeaf<frag, pred, xform> { 219 Operand OpClass = opclass; 220} 221 222class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 223 list<SDNode> roots = [], 224 list<SDNodeProperty> props = []> : 225 ComplexPattern<ty, numops, fn, roots, props> { 226 Operand OpClass = opclass; 227} 228 229def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 230 "selectVSplatUimm3", 231 [build_vector, bitconvert]>; 232 233def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1, 234 "selectVSplatUimm4", 235 [build_vector, bitconvert]>; 236 237def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 238 "selectVSplatUimm5", 239 [build_vector, bitconvert]>; 240 241def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 242 "selectVSplatUimm8", 243 [build_vector, bitconvert]>; 244 245def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 246 "selectVSplatSimm5", 247 [build_vector, bitconvert]>; 248 249def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1, 250 "selectVSplatUimm3", 251 [build_vector, bitconvert]>; 252 253def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 254 "selectVSplatUimm4", 255 [build_vector, bitconvert]>; 256 257def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 258 "selectVSplatUimm5", 259 [build_vector, bitconvert]>; 260 261def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 262 "selectVSplatSimm5", 263 [build_vector, bitconvert]>; 264 265def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1, 266 "selectVSplatUimm2", 267 [build_vector, bitconvert]>; 268 269def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 270 "selectVSplatUimm5", 271 [build_vector, bitconvert]>; 272 273def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 274 "selectVSplatSimm5", 275 [build_vector, bitconvert]>; 276 277def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1, 278 "selectVSplatUimm1", 279 [build_vector, bitconvert]>; 280 281def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 282 "selectVSplatUimm5", 283 [build_vector, bitconvert]>; 284 285def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 286 "selectVSplatUimm6", 287 [build_vector, bitconvert]>; 288 289def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 290 "selectVSplatSimm5", 291 [build_vector, bitconvert]>; 292 293// Any build_vector that is a constant splat with a value that is an exact 294// power of 2 295def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 296 [build_vector, bitconvert]>; 297 298def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt), 299 (fsub node:$wd, (fmul node:$ws, node:$wt))>; 300 301def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt), 302 (add node:$wd, (mul node:$ws, node:$wt))>; 303 304def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt), 305 (sub node:$wd, (mul node:$ws, node:$wt))>; 306 307// Immediates 308def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 309def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 310 311// Instruction encoding. 312class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 313class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 314class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 315class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 316 317class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 318class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 319class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 320class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 321 322class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 323class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 324class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 325class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 326 327class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 328class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 329class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 330class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 331 332class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 333class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 334class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 335class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 336 337class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 338class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 339class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 340class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 341 342class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 343 344class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 345 346class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 347class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 348class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 349class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 350 351class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 352class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 353class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 354class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 355 356class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 357class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 358class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 359class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 360 361class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 362class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 363class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 364class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 365 366class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 367class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 368class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 369class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 370 371class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 372class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 373class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 374class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 375 376class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 377class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 378class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 379class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 380 381class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 382class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 383class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 384class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 385 386class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 387class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 388class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 389class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 390 391class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 392class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 393class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 394class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 395 396class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 397class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 398class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 399class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 400 401class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 402class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 403class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 404class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 405 406class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 407 408class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 409 410class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 411 412class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 413 414class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 415class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 416class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 417class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 418 419class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 420class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 421class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 422class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 423 424class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 425class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 426class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 427class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 428 429class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 430 431class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>; 432 433class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 434 435class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 436class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 437class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 438class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 439 440class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 441class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 442class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 443class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 444 445class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 446class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 447class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 448class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 449 450class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 451 452class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 453class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 454class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 455class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 456 457class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 458class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 459class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 460class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 461 462class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 463 464class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 465class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 466class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 467class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 468 469class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 470class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 471class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 472class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 473 474class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 475class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 476class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 477class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 478 479class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 480class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 481class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 482class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 483 484class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 485class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 486class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 487class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 488 489class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 490class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 491class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 492class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 493 494class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 495class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 496class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 497class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 498 499class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 500class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 501class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 502class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 503 504class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; 505class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; 506class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; 507 508class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; 509class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; 510class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; 511 512class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 513 514class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 515class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 516class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 517class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 518 519class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 520class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 521class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 522class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 523 524class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 525class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 526class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 527 528class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 529class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 530class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 531 532class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 533class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 534class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 535 536class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 537class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 538class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 539 540class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 541class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 542class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 543 544class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 545class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 546class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 547 548class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 549class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 550 551class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 552class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 553 554class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 555class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 556 557class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 558class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 559 560class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 561class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 562 563class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 564class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 565 566class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 567class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 568 569class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 570class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 571 572class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 573class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 574 575class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 576class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 577 578class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 579class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 580 581class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 582class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 583 584class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 585class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 586 587class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 588class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 589 590class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 591class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 592 593class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 594class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 595 596class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 597class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 598 599class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 600class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 601 602class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 603class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 604 605class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 606class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 607 608class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 609class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 610 611class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 612class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 613 614class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>; 615class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>; 616class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>; 617 618class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 619class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 620 621class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 622class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 623 624class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 625class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 626 627class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 628class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 629 630class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 631class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 632 633class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 634class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 635 636class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 637class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 638 639class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 640class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 641 642class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 643class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 644 645class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 646class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 647 648class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 649class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 650 651class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 652class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 653 654class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 655class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 656 657class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 658class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 659 660class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 661class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 662 663class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 664class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 665 666class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 667class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 668 669class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 670class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 671 672class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 673class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 674 675class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 676class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 677 678class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 679class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 680 681class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 682class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 683 684class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 685class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 686 687class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 688class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 689 690class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>; 691class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>; 692 693class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>; 694class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>; 695 696class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 697class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 698 699class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 700class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 701 702class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 703class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 704 705class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 706class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 707class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 708 709class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 710class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 711class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 712 713class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 714class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 715class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 716 717class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 718class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 719class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 720 721class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 722class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 723class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 724class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 725 726class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 727class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 728class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 729class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 730 731class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 732class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 733class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 734class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 735 736class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 737class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 738class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 739class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 740 741class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>; 742class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>; 743class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>; 744 745class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 746class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 747class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 748class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 749 750class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 751class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 752class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 753class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 754 755class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 756class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 757class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 758class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 759 760class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 761class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 762class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 763class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 764 765class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 766class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 767 768class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 769class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 770 771class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 772class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 773class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 774class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 775 776class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 777class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 778class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 779class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 780 781class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 782class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 783class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 784class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 785 786class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 787class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 788class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 789class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 790 791class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 792class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 793class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 794class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 795 796class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 797class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 798class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 799class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 800 801class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 802class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 803class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 804class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 805 806class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 807class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 808class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 809class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 810 811class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 812class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 813class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 814class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 815 816class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 817class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 818class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 819class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 820 821class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 822class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 823class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 824class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 825 826class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 827class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 828class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 829class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 830 831class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 832class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 833class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 834class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 835 836class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 837 838class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 839class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 840 841class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 842class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 843 844class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 845class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 846class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 847class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 848 849class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>; 850class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>; 851 852class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 853class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 854 855class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 856class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 857class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 858class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 859 860class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 861class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 862class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 863class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 864 865class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 866class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 867class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 868class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 869 870class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 871 872class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 873 874class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 875 876class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 877 878class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 879class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 880class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 881class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 882 883class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 884class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 885class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 886class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 887 888class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 889class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 890class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 891class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 892 893class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 894class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 895class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 896class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 897 898class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 899class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 900class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 901class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 902 903class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 904class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 905class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 906 907class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 908class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 909class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 910class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 911 912class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 913class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 914class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 915class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 916 917class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 918class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 919class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 920class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 921 922class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 923class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 924class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 925class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 926 927class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 928class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 929class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 930class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 931 932class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 933class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 934class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 935class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 936 937class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 938class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 939class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 940class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 941 942class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 943class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 944class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 945class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 946 947class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 948class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 949class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 950class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 951 952class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 953class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 954class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 955class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 956 957class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 958class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 959class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 960class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 961 962class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 963class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 964class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 965class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 966 967class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 968class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 969class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 970class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 971 972class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 973class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 974class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 975class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 976 977class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 978class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 979class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 980class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 981 982class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 983class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 984class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 985class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 986 987class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 988class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 989class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 990class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 991 992class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 993class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 994class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 995class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 996 997class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 998class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 999class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 1000class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 1001 1002class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 1003class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 1004class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 1005class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 1006 1007class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 1008class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 1009class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 1010class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 1011 1012class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 1013class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 1014class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 1015class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 1016 1017class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 1018class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 1019class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 1020class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 1021 1022class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 1023 1024class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 1025 1026// Instruction desc. 1027class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1028 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1029 InstrItinClass itin = NoItinerary> { 1030 dag OutOperandList = (outs ROWD:$wd); 1031 dag InOperandList = (ins ROWS:$ws, uimm3:$m); 1032 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1033 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))]; 1034 InstrItinClass Itinerary = itin; 1035} 1036 1037class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1038 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1039 InstrItinClass itin = NoItinerary> { 1040 dag OutOperandList = (outs ROWD:$wd); 1041 dag InOperandList = (ins ROWS:$ws, uimm4:$m); 1042 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1043 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))]; 1044 InstrItinClass Itinerary = itin; 1045} 1046 1047class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1048 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1049 InstrItinClass itin = NoItinerary> { 1050 dag OutOperandList = (outs ROWD:$wd); 1051 dag InOperandList = (ins ROWS:$ws, uimm5:$m); 1052 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1053 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))]; 1054 InstrItinClass Itinerary = itin; 1055} 1056 1057class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1058 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1059 InstrItinClass itin = NoItinerary> { 1060 dag OutOperandList = (outs ROWD:$wd); 1061 dag InOperandList = (ins ROWS:$ws, uimm6:$m); 1062 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1063 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))]; 1064 InstrItinClass Itinerary = itin; 1065} 1066 1067class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1068 SplatComplexPattern SplatImm, 1069 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1070 InstrItinClass itin = NoItinerary> { 1071 dag OutOperandList = (outs ROWD:$wd); 1072 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m); 1073 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m"); 1074 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))]; 1075 InstrItinClass Itinerary = itin; 1076} 1077 1078class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1079 ValueType VecTy, RegisterOperand ROD, 1080 RegisterOperand ROWS, 1081 InstrItinClass itin = NoItinerary> { 1082 dag OutOperandList = (outs ROD:$rd); 1083 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1084 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1085 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; 1086 InstrItinClass Itinerary = itin; 1087} 1088 1089class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1090 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1091 InstrItinClass itin = NoItinerary> { 1092 dag OutOperandList = (outs ROWD:$wd); 1093 dag InOperandList = (ins ROWS:$ws, uimm4:$n); 1094 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1095 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; 1096 InstrItinClass Itinerary = itin; 1097} 1098 1099class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy, 1100 RegisterClass RCD, RegisterClass RCWS> : 1101 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n), 1102 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> { 1103 bit usesCustomInserter = 1; 1104} 1105 1106class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1107 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1108 RegisterOperand ROWS = ROWD, 1109 InstrItinClass itin = NoItinerary> { 1110 dag OutOperandList = (outs ROWD:$wd); 1111 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm); 1112 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1113 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))]; 1114 InstrItinClass Itinerary = itin; 1115} 1116 1117class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1118 SplatComplexPattern SplatImm, RegisterOperand ROWD, 1119 RegisterOperand ROWS = ROWD, 1120 InstrItinClass itin = NoItinerary> { 1121 dag OutOperandList = (outs ROWD:$wd); 1122 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8); 1123 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1124 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))]; 1125 InstrItinClass Itinerary = itin; 1126} 1127 1128// This class is deprecated and will be removed in the next few patches 1129class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1130 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1131 InstrItinClass itin = NoItinerary> { 1132 dag OutOperandList = (outs ROWD:$wd); 1133 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1134 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1135 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))]; 1136 InstrItinClass Itinerary = itin; 1137} 1138 1139class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1140 RegisterOperand ROWS = ROWD, 1141 InstrItinClass itin = NoItinerary> { 1142 dag OutOperandList = (outs ROWD:$wd); 1143 dag InOperandList = (ins ROWS:$ws, uimm8:$u8); 1144 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1145 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))]; 1146 InstrItinClass Itinerary = itin; 1147} 1148 1149class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1150 InstrItinClass itin = NoItinerary> { 1151 dag OutOperandList = (outs RCWD:$wd); 1152 dag InOperandList = (ins vsplat_simm10:$i10); 1153 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1154 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1155 list<dag> Pattern = []; 1156 bit hasSideEffects = 0; 1157 InstrItinClass Itinerary = itin; 1158} 1159 1160class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1161 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1162 InstrItinClass itin = NoItinerary> { 1163 dag OutOperandList = (outs ROWD:$wd); 1164 dag InOperandList = (ins ROWS:$ws); 1165 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1166 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1167 InstrItinClass Itinerary = itin; 1168} 1169 1170class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1171 SDPatternOperator OpNode, RegisterOperand ROWD, 1172 RegisterOperand ROWS = ROWD, 1173 InstrItinClass itin = NoItinerary> { 1174 dag OutOperandList = (outs ROWD:$wd); 1175 dag InOperandList = (ins ROWS:$rs); 1176 string AsmString = !strconcat(instr_asm, "\t$wd, $rs"); 1177 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROWS:$rs)))]; 1178 InstrItinClass Itinerary = itin; 1179} 1180 1181class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1182 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1183 InstrItinClass itin = NoItinerary> { 1184 dag OutOperandList = (outs ROWD:$wd); 1185 dag InOperandList = (ins ROWS:$ws); 1186 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1187 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; 1188 InstrItinClass Itinerary = itin; 1189} 1190 1191class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1192 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1193 RegisterOperand ROWT = ROWD, 1194 InstrItinClass itin = NoItinerary> { 1195 dag OutOperandList = (outs ROWD:$wd); 1196 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1197 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1198 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1199 InstrItinClass Itinerary = itin; 1200} 1201 1202class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD, 1203 RegisterOperand ROWS = ROWD, 1204 RegisterOperand ROWT = ROWD, 1205 InstrItinClass itin = NoItinerary> { 1206 dag OutOperandList = (outs ROWD:$wd); 1207 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1208 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1209 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws, 1210 ROWT:$wt))]; 1211 string Constraints = "$wd = $wd_in"; 1212 InstrItinClass Itinerary = itin; 1213} 1214 1215class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1216 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1217 RegisterOperand ROWT = ROWD, 1218 InstrItinClass itin = NoItinerary> { 1219 dag OutOperandList = (outs ROWD:$wd); 1220 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt); 1221 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1222 list<dag> Pattern = [(set ROWD:$wd, 1223 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))]; 1224 InstrItinClass Itinerary = itin; 1225 string Constraints = "$wd = $wd_in"; 1226} 1227 1228class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1229 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1230 RegisterOperand ROWT = ROWD, 1231 InstrItinClass itin = NoItinerary> : 1232 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1233 1234class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1235 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1236 RegisterOperand ROWT = ROWD, 1237 InstrItinClass itin = NoItinerary> : 1238 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>; 1239 1240class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1241 dag OutOperandList = (outs); 1242 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1243 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1244 list<dag> Pattern = []; 1245 InstrItinClass Itinerary = IIBranch; 1246 bit isBranch = 1; 1247 bit isTerminator = 1; 1248 bit hasDelaySlot = 1; 1249 list<Register> Defs = [AT]; 1250} 1251 1252class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1253 RegisterOperand ROWD, RegisterOperand ROS, 1254 InstrItinClass itin = NoItinerary> { 1255 dag OutOperandList = (outs ROWD:$wd); 1256 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n); 1257 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1258 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1259 ROS:$rs, 1260 immZExt6:$n))]; 1261 InstrItinClass Itinerary = itin; 1262 string Constraints = "$wd = $wd_in"; 1263} 1264 1265class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty, 1266 RegisterOperand ROWD, RegisterOperand ROFS> : 1267 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs), 1268 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs, 1269 immZExt6:$n))]> { 1270 bit usesCustomInserter = 1; 1271 string Constraints = "$wd = $wd_in"; 1272} 1273 1274class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1275 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1276 InstrItinClass itin = NoItinerary> { 1277 dag OutOperandList = (outs ROWD:$wd); 1278 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws); 1279 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1280 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in, 1281 immZExt6:$n, 1282 ROWS:$ws))]; 1283 InstrItinClass Itinerary = itin; 1284 string Constraints = "$wd = $wd_in"; 1285} 1286 1287class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1288 RegisterOperand ROWD, RegisterOperand ROWS = ROWD, 1289 RegisterOperand ROWT = ROWD, 1290 InstrItinClass itin = NoItinerary> { 1291 dag OutOperandList = (outs ROWD:$wd); 1292 dag InOperandList = (ins ROWS:$ws, ROWT:$wt); 1293 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1294 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]; 1295 InstrItinClass Itinerary = itin; 1296} 1297 1298class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm, 1299 RegisterOperand ROWD, 1300 RegisterOperand ROWS = ROWD, 1301 InstrItinClass itin = NoItinerary> { 1302 dag OutOperandList = (outs ROWD:$wd); 1303 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); 1304 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); 1305 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, 1306 ROWS:$ws))]; 1307 InstrItinClass Itinerary = itin; 1308} 1309 1310class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD, 1311 RegisterOperand ROWS = ROWD, 1312 RegisterOperand ROWT = ROWD> : 1313 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt), 1314 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>; 1315 1316class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>, 1317 IsCommutable; 1318class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>, 1319 IsCommutable; 1320class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>, 1321 IsCommutable; 1322class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>, 1323 IsCommutable; 1324 1325class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, 1326 MSA128BOpnd>, IsCommutable; 1327class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, 1328 MSA128HOpnd>, IsCommutable; 1329class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, 1330 MSA128WOpnd>, IsCommutable; 1331class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, 1332 MSA128DOpnd>, IsCommutable; 1333 1334class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, 1335 MSA128BOpnd>, IsCommutable; 1336class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, 1337 MSA128HOpnd>, IsCommutable; 1338class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, 1339 MSA128WOpnd>, IsCommutable; 1340class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, 1341 MSA128DOpnd>, IsCommutable; 1342 1343class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, 1344 MSA128BOpnd>, IsCommutable; 1345class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, 1346 MSA128HOpnd>, IsCommutable; 1347class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, 1348 MSA128WOpnd>, IsCommutable; 1349class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, 1350 MSA128DOpnd>, IsCommutable; 1351 1352class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable; 1353class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable; 1354class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable; 1355class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable; 1356 1357class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, 1358 MSA128BOpnd>; 1359class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, 1360 MSA128HOpnd>; 1361class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, 1362 MSA128WOpnd>; 1363class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, 1364 MSA128DOpnd>; 1365 1366class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>; 1367class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>; 1368class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>; 1369class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>; 1370 1371class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, 1372 MSA128BOpnd>; 1373 1374class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, 1375 MSA128BOpnd>; 1376class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, 1377 MSA128HOpnd>; 1378class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, 1379 MSA128WOpnd>; 1380class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, 1381 MSA128DOpnd>; 1382 1383class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, 1384 MSA128BOpnd>; 1385class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, 1386 MSA128HOpnd>; 1387class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, 1388 MSA128WOpnd>; 1389class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, 1390 MSA128DOpnd>; 1391 1392class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>, 1393 IsCommutable; 1394class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>, 1395 IsCommutable; 1396class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>, 1397 IsCommutable; 1398class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>, 1399 IsCommutable; 1400 1401class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>, 1402 IsCommutable; 1403class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>, 1404 IsCommutable; 1405class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>, 1406 IsCommutable; 1407class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>, 1408 IsCommutable; 1409 1410class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, 1411 MSA128BOpnd>, IsCommutable; 1412class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, 1413 MSA128HOpnd>, IsCommutable; 1414class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, 1415 MSA128WOpnd>, IsCommutable; 1416class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, 1417 MSA128DOpnd>, IsCommutable; 1418 1419class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, 1420 MSA128BOpnd>, IsCommutable; 1421class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, 1422 MSA128HOpnd>, IsCommutable; 1423class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, 1424 MSA128WOpnd>, IsCommutable; 1425class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, 1426 MSA128DOpnd>, IsCommutable; 1427 1428class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>; 1429class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>; 1430class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>; 1431class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>; 1432 1433class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, 1434 MSA128BOpnd>; 1435class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, 1436 MSA128HOpnd>; 1437class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, 1438 MSA128WOpnd>; 1439class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, 1440 MSA128DOpnd>; 1441 1442class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>; 1443class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>; 1444class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>; 1445class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>; 1446 1447class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1448 MSA128BOpnd>; 1449class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1450 MSA128HOpnd>; 1451class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1452 MSA128WOpnd>; 1453class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1454 MSA128DOpnd>; 1455 1456class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>; 1457class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>; 1458class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>; 1459class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>; 1460 1461class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1462 MSA128BOpnd>; 1463class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1464 MSA128HOpnd>; 1465class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1466 MSA128WOpnd>; 1467class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1468 MSA128DOpnd>; 1469 1470class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>; 1471 1472class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, 1473 MSA128BOpnd>; 1474 1475class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>; 1476 1477class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>; 1478 1479class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>; 1480class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>; 1481class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>; 1482class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>; 1483 1484class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, 1485 MSA128BOpnd>; 1486class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, 1487 MSA128HOpnd>; 1488class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, 1489 MSA128WOpnd>; 1490class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, 1491 MSA128DOpnd>; 1492 1493class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1494class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1495class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1496class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1497 1498class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1499 1500class BSEL_V_DESC { 1501 dag OutOperandList = (outs MSA128BOpnd:$wd); 1502 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1503 MSA128BOpnd:$wt); 1504 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1505 list<dag> Pattern = [(set MSA128BOpnd:$wd, 1506 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1507 MSA128BOpnd:$wt))]; 1508 InstrItinClass Itinerary = NoItinerary; 1509 string Constraints = "$wd = $wd_in"; 1510} 1511 1512class BSELI_B_DESC { 1513 dag OutOperandList = (outs MSA128BOpnd:$wd); 1514 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws, 1515 vsplat_uimm8:$u8); 1516 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1517 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in, 1518 MSA128BOpnd:$ws, 1519 vsplati8_uimm8:$u8))]; 1520 InstrItinClass Itinerary = NoItinerary; 1521 string Constraints = "$wd = $wd_in"; 1522} 1523 1524class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>; 1525class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>; 1526class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>; 1527class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>; 1528 1529class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, 1530 MSA128BOpnd>; 1531class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, 1532 MSA128HOpnd>; 1533class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, 1534 MSA128WOpnd>; 1535class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, 1536 MSA128DOpnd>; 1537 1538class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1539class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1540class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1541class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1542 1543class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1544 1545class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>, 1546 IsCommutable; 1547class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>, 1548 IsCommutable; 1549class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>, 1550 IsCommutable; 1551class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>, 1552 IsCommutable; 1553 1554class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1555 MSA128BOpnd>; 1556class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1557 MSA128HOpnd>; 1558class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1559 MSA128WOpnd>; 1560class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1561 MSA128DOpnd>; 1562 1563class CFCMSA_DESC { 1564 dag OutOperandList = (outs GPR32:$rd); 1565 dag InOperandList = (ins MSACtrl:$cs); 1566 string AsmString = "cfcmsa\t$rd, $cs"; 1567 InstrItinClass Itinerary = NoItinerary; 1568 bit hasSideEffects = 1; 1569} 1570 1571class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>; 1572class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>; 1573class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>; 1574class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>; 1575 1576class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>; 1577class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>; 1578class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>; 1579class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>; 1580 1581class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1582 vsplati8_simm5, MSA128BOpnd>; 1583class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1584 vsplati16_simm5, MSA128HOpnd>; 1585class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1586 vsplati32_simm5, MSA128WOpnd>; 1587class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1588 vsplati64_simm5, MSA128DOpnd>; 1589 1590class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1591 vsplati8_uimm5, MSA128BOpnd>; 1592class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1593 vsplati16_uimm5, MSA128HOpnd>; 1594class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1595 vsplati32_uimm5, MSA128WOpnd>; 1596class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1597 vsplati64_uimm5, MSA128DOpnd>; 1598 1599class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>; 1600class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>; 1601class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>; 1602class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>; 1603 1604class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>; 1605class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>; 1606class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>; 1607class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>; 1608 1609class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1610 vsplati8_simm5, MSA128BOpnd>; 1611class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1612 vsplati16_simm5, MSA128HOpnd>; 1613class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1614 vsplati32_simm5, MSA128WOpnd>; 1615class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1616 vsplati64_simm5, MSA128DOpnd>; 1617 1618class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1619 vsplati8_uimm5, MSA128BOpnd>; 1620class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1621 vsplati16_uimm5, MSA128HOpnd>; 1622class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1623 vsplati32_uimm5, MSA128WOpnd>; 1624class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1625 vsplati64_uimm5, MSA128DOpnd>; 1626 1627class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1628 GPR32Opnd, MSA128BOpnd>; 1629class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1630 GPR32Opnd, MSA128HOpnd>; 1631class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1632 GPR32Opnd, MSA128WOpnd>; 1633 1634class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1635 GPR32Opnd, MSA128BOpnd>; 1636class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1637 GPR32Opnd, MSA128HOpnd>; 1638class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1639 GPR32Opnd, MSA128WOpnd>; 1640 1641class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32, 1642 MSA128W>; 1643class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64, 1644 MSA128D>; 1645 1646class CTCMSA_DESC { 1647 dag OutOperandList = (outs); 1648 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1649 string AsmString = "ctcmsa\t$cd, $rs"; 1650 InstrItinClass Itinerary = NoItinerary; 1651 bit hasSideEffects = 1; 1652} 1653 1654class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>; 1655class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>; 1656class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>; 1657class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>; 1658 1659class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>; 1660class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>; 1661class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>; 1662class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>; 1663 1664class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, 1665 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1666 IsCommutable; 1667class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, 1668 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1669 IsCommutable; 1670class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, 1671 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1672 IsCommutable; 1673 1674class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, 1675 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>, 1676 IsCommutable; 1677class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, 1678 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>, 1679 IsCommutable; 1680class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, 1681 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>, 1682 IsCommutable; 1683 1684class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1685 MSA128HOpnd, MSA128BOpnd, 1686 MSA128BOpnd>, IsCommutable; 1687class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1688 MSA128WOpnd, MSA128HOpnd, 1689 MSA128HOpnd>, IsCommutable; 1690class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1691 MSA128DOpnd, MSA128WOpnd, 1692 MSA128WOpnd>, IsCommutable; 1693 1694class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1695 MSA128HOpnd, MSA128BOpnd, 1696 MSA128BOpnd>, IsCommutable; 1697class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1698 MSA128WOpnd, MSA128HOpnd, 1699 MSA128HOpnd>, IsCommutable; 1700class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1701 MSA128DOpnd, MSA128WOpnd, 1702 MSA128WOpnd>, IsCommutable; 1703 1704class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1705 MSA128HOpnd, MSA128BOpnd, 1706 MSA128BOpnd>; 1707class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1708 MSA128WOpnd, MSA128HOpnd, 1709 MSA128HOpnd>; 1710class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1711 MSA128DOpnd, MSA128WOpnd, 1712 MSA128WOpnd>; 1713 1714class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1715 MSA128HOpnd, MSA128BOpnd, 1716 MSA128BOpnd>; 1717class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1718 MSA128WOpnd, MSA128HOpnd, 1719 MSA128HOpnd>; 1720class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1721 MSA128DOpnd, MSA128WOpnd, 1722 MSA128WOpnd>; 1723 1724class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>, 1725 IsCommutable; 1726class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>, 1727 IsCommutable; 1728 1729class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>, 1730 IsCommutable; 1731class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>, 1732 IsCommutable; 1733 1734class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>, 1735 IsCommutable; 1736class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>, 1737 IsCommutable; 1738 1739class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1740 MSA128WOpnd>; 1741class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1742 MSA128DOpnd>; 1743 1744class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>; 1745class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>; 1746 1747class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>; 1748class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>; 1749 1750class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>, 1751 IsCommutable; 1752class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>, 1753 IsCommutable; 1754 1755class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>, 1756 IsCommutable; 1757class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>, 1758 IsCommutable; 1759 1760class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>, 1761 IsCommutable; 1762class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>, 1763 IsCommutable; 1764 1765class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>, 1766 IsCommutable; 1767class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>, 1768 IsCommutable; 1769 1770class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>, 1771 IsCommutable; 1772class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>, 1773 IsCommutable; 1774 1775class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>, 1776 IsCommutable; 1777class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>, 1778 IsCommutable; 1779 1780class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>, 1781 IsCommutable; 1782class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>, 1783 IsCommutable; 1784 1785class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>; 1786class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>; 1787 1788class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1789 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1790class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1791 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1792 1793class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, 1794 MSA128WOpnd>; 1795class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, 1796 MSA128DOpnd>; 1797 1798class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1799 MSA128WOpnd, MSA128HOpnd>; 1800class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1801 MSA128DOpnd, MSA128WOpnd>; 1802 1803class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1804 MSA128WOpnd, MSA128HOpnd>; 1805class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1806 MSA128DOpnd, MSA128WOpnd>; 1807 1808class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>; 1809class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>; 1810 1811class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>; 1812class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>; 1813 1814class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1815 MSA128WOpnd, MSA128HOpnd>; 1816class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1817 MSA128DOpnd, MSA128WOpnd>; 1818 1819class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1820 MSA128WOpnd, MSA128HOpnd>; 1821class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1822 MSA128DOpnd, MSA128WOpnd>; 1823 1824class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, 1825 MSA128BOpnd, GPR32Opnd>; 1826class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, 1827 MSA128HOpnd, GPR32Opnd>; 1828class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, 1829 MSA128WOpnd, GPR32Opnd>; 1830 1831class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>; 1832class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>; 1833 1834class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>; 1835class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>; 1836 1837class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>; 1838class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>; 1839 1840class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1841 MSA128WOpnd>; 1842class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1843 MSA128DOpnd>; 1844 1845class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>; 1846class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>; 1847 1848class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1849 MSA128WOpnd>; 1850class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1851 MSA128DOpnd>; 1852 1853class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>; 1854class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>; 1855 1856class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>; 1857class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>; 1858 1859class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>; 1860class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>; 1861 1862class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>; 1863class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>; 1864 1865class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1866 MSA128WOpnd>; 1867class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1868 MSA128DOpnd>; 1869 1870class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>; 1871class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>; 1872 1873class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>; 1874class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>; 1875 1876class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>; 1877class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>; 1878 1879class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>; 1880class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>; 1881 1882class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>; 1883class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>; 1884 1885class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>; 1886class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>; 1887 1888class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>; 1889class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>; 1890 1891class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>; 1892class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>; 1893 1894class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, 1895 MSA128WOpnd>; 1896class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, 1897 MSA128DOpnd>; 1898 1899class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, 1900 MSA128WOpnd>; 1901class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, 1902 MSA128DOpnd>; 1903 1904class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, 1905 MSA128WOpnd>; 1906class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, 1907 MSA128DOpnd>; 1908 1909class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, 1910 MSA128WOpnd>; 1911class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, 1912 MSA128DOpnd>; 1913 1914class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, 1915 MSA128WOpnd>; 1916class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, 1917 MSA128DOpnd>; 1918 1919class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint, 1920 MSA128WOpnd>; 1921class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint, 1922 MSA128DOpnd>; 1923 1924class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint, 1925 MSA128WOpnd>; 1926class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint, 1927 MSA128DOpnd>; 1928 1929class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1930 MSA128WOpnd>; 1931class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1932 MSA128DOpnd>; 1933 1934class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1935 MSA128WOpnd>; 1936class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1937 MSA128DOpnd>; 1938 1939class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1940 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>; 1941class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1942 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>; 1943 1944class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, 1945 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1946class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, 1947 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1948class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, 1949 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1950 1951class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, 1952 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1953class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, 1954 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1955class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, 1956 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1957 1958class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, 1959 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1960class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, 1961 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1962class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, 1963 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1964 1965class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, 1966 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>; 1967class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, 1968 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>; 1969class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, 1970 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>; 1971 1972class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>; 1973class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>; 1974class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>; 1975class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>; 1976 1977class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>; 1978class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>; 1979class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>; 1980class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>; 1981 1982class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>; 1983class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>; 1984class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>; 1985class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>; 1986 1987class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>; 1988class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>; 1989class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>; 1990class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>; 1991 1992class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, 1993 MSA128BOpnd, GPR32Opnd>; 1994class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, 1995 MSA128HOpnd, GPR32Opnd>; 1996class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, 1997 MSA128WOpnd, GPR32Opnd>; 1998 1999class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32, 2000 MSA128WOpnd, FGR32Opnd>; 2001class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64, 2002 MSA128DOpnd, FGR64Opnd>; 2003 2004class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, 2005 MSA128BOpnd>; 2006class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, 2007 MSA128HOpnd>; 2008class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, 2009 MSA128WOpnd>; 2010class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, 2011 MSA128DOpnd>; 2012 2013class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2014 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2015 ComplexPattern Addr = addrRegImm, 2016 InstrItinClass itin = NoItinerary> { 2017 dag OutOperandList = (outs RCWD:$wd); 2018 dag InOperandList = (ins MemOpnd:$addr); 2019 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2020 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2021 InstrItinClass Itinerary = itin; 2022} 2023 2024class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 2025class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 2026class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 2027class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 2028 2029class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 2030class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 2031class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 2032class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 2033 2034class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2035 ValueType TyNode, RegisterClass RCWD, 2036 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2037 InstrItinClass itin = NoItinerary> { 2038 dag OutOperandList = (outs RCWD:$wd); 2039 dag InOperandList = (ins MemOpnd:$addr); 2040 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2041 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 2042 InstrItinClass Itinerary = itin; 2043} 2044 2045class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 2046class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 2047class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 2048class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 2049 2050class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 2051 MSA128HOpnd>; 2052class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 2053 MSA128WOpnd>; 2054 2055class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 2056 MSA128HOpnd>; 2057class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 2058 MSA128WOpnd>; 2059 2060class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>; 2061class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>; 2062class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>; 2063class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>; 2064 2065class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>; 2066class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>; 2067class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>; 2068class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>; 2069 2070class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>; 2071class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>; 2072class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>; 2073class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>; 2074 2075class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>; 2076class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>; 2077class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>; 2078class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>; 2079 2080class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 2081 MSA128BOpnd>; 2082class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 2083 MSA128HOpnd>; 2084class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 2085 MSA128WOpnd>; 2086class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 2087 MSA128DOpnd>; 2088 2089class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 2090 MSA128BOpnd>; 2091class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 2092 MSA128HOpnd>; 2093class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 2094 MSA128WOpnd>; 2095class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 2096 MSA128DOpnd>; 2097 2098class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>; 2099class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>; 2100class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>; 2101class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>; 2102 2103class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>; 2104class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>; 2105class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>; 2106class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>; 2107 2108class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>; 2109class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>; 2110class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>; 2111class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>; 2112 2113class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 2114 MSA128BOpnd>; 2115class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 2116 MSA128HOpnd>; 2117class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 2118 MSA128WOpnd>; 2119class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 2120 MSA128DOpnd>; 2121 2122class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 2123 MSA128BOpnd>; 2124class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 2125 MSA128HOpnd>; 2126class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 2127 MSA128WOpnd>; 2128class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 2129 MSA128DOpnd>; 2130 2131class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>; 2132class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>; 2133class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>; 2134class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>; 2135 2136class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>; 2137class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>; 2138class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>; 2139class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>; 2140 2141class MOVE_V_DESC { 2142 dag OutOperandList = (outs MSA128B:$wd); 2143 dag InOperandList = (ins MSA128B:$ws); 2144 string AsmString = "move.v\t$wd, $ws"; 2145 list<dag> Pattern = []; 2146 InstrItinClass Itinerary = NoItinerary; 2147} 2148 2149class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 2150 MSA128HOpnd>; 2151class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 2152 MSA128WOpnd>; 2153 2154class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 2155 MSA128HOpnd>; 2156class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 2157 MSA128WOpnd>; 2158 2159class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>; 2160class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>; 2161class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>; 2162class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>; 2163 2164class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, 2165 MSA128HOpnd>; 2166class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, 2167 MSA128WOpnd>; 2168 2169class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 2170 MSA128HOpnd>; 2171class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 2172 MSA128WOpnd>; 2173 2174class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>; 2175class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; 2176class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; 2177class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; 2178 2179class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; 2180class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; 2181class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; 2182class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; 2183 2184class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; 2185class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; 2186class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; 2187class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; 2188 2189class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>; 2190class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>; 2191class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>; 2192class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>; 2193 2194class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2195 MSA128BOpnd>; 2196 2197class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>; 2198class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>; 2199class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>; 2200class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>; 2201 2202class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>; 2203 2204class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>; 2205class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>; 2206class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>; 2207class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>; 2208 2209class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>; 2210class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; 2211class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; 2212class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; 2213 2214class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; 2215class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; 2216class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; 2217class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; 2218 2219class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, 2220 MSA128BOpnd>; 2221class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, 2222 MSA128HOpnd>; 2223class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, 2224 MSA128WOpnd>; 2225class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, 2226 MSA128DOpnd>; 2227 2228class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, 2229 MSA128BOpnd>; 2230class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, 2231 MSA128HOpnd>; 2232class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, 2233 MSA128WOpnd>; 2234class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, 2235 MSA128DOpnd>; 2236 2237class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>; 2238class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>; 2239class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>; 2240 2241class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>; 2242class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; 2243class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; 2244class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; 2245 2246class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; 2247class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; 2248class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; 2249class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; 2250 2251class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; 2252class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; 2253class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>; 2254class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>; 2255 2256class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2257 MSA128BOpnd>; 2258class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2259 MSA128HOpnd>; 2260class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2261 MSA128WOpnd>; 2262class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2263 MSA128DOpnd>; 2264 2265class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd, 2266 MSA128BOpnd, GPR32Opnd>; 2267class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd, 2268 MSA128HOpnd, GPR32Opnd>; 2269class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd, 2270 MSA128WOpnd, GPR32Opnd>; 2271class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, 2272 MSA128DOpnd, GPR32Opnd>; 2273 2274class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, 2275 MSA128BOpnd>; 2276class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, 2277 MSA128HOpnd>; 2278class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, 2279 MSA128WOpnd>; 2280class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, 2281 MSA128DOpnd>; 2282 2283class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; 2284class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; 2285class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>; 2286class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>; 2287 2288class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2289 MSA128BOpnd>; 2290class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2291 MSA128HOpnd>; 2292class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2293 MSA128WOpnd>; 2294class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2295 MSA128DOpnd>; 2296 2297class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>; 2298class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>; 2299class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>; 2300class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>; 2301 2302class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, 2303 MSA128BOpnd>; 2304class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, 2305 MSA128HOpnd>; 2306class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, 2307 MSA128WOpnd>; 2308class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, 2309 MSA128DOpnd>; 2310 2311class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>; 2312class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>; 2313class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>; 2314class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>; 2315 2316class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2317 MSA128BOpnd>; 2318class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2319 MSA128HOpnd>; 2320class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2321 MSA128WOpnd>; 2322class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2323 MSA128DOpnd>; 2324 2325class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>; 2326class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>; 2327class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>; 2328class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>; 2329 2330class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, 2331 MSA128BOpnd>; 2332class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, 2333 MSA128HOpnd>; 2334class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, 2335 MSA128WOpnd>; 2336class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, 2337 MSA128DOpnd>; 2338 2339class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2340 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2341 ComplexPattern Addr = addrRegImm, 2342 InstrItinClass itin = NoItinerary> { 2343 dag OutOperandList = (outs); 2344 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2345 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2346 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2347 InstrItinClass Itinerary = itin; 2348} 2349 2350class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2351class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2352class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2353class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2354 2355class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2356 ValueType TyNode, RegisterClass RCWD, 2357 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2358 InstrItinClass itin = NoItinerary> { 2359 dag OutOperandList = (outs); 2360 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2361 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2362 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2363 InstrItinClass Itinerary = itin; 2364} 2365 2366class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2367class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2368class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2369class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2370 2371class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, 2372 MSA128BOpnd>; 2373class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, 2374 MSA128HOpnd>; 2375class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, 2376 MSA128WOpnd>; 2377class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, 2378 MSA128DOpnd>; 2379 2380class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, 2381 MSA128BOpnd>; 2382class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, 2383 MSA128HOpnd>; 2384class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, 2385 MSA128WOpnd>; 2386class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, 2387 MSA128DOpnd>; 2388 2389class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2390 MSA128BOpnd>; 2391class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2392 MSA128HOpnd>; 2393class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2394 MSA128WOpnd>; 2395class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2396 MSA128DOpnd>; 2397 2398class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2399 MSA128BOpnd>; 2400class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2401 MSA128HOpnd>; 2402class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2403 MSA128WOpnd>; 2404class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2405 MSA128DOpnd>; 2406 2407class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>; 2408class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>; 2409class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>; 2410class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>; 2411 2412class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, 2413 MSA128BOpnd>; 2414class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, 2415 MSA128HOpnd>; 2416class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, 2417 MSA128WOpnd>; 2418class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, 2419 MSA128DOpnd>; 2420 2421class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>; 2422class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>; 2423class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>; 2424class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>; 2425 2426class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>; 2427class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>; 2428class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>; 2429class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>; 2430 2431class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, 2432 MSA128BOpnd>; 2433 2434// Instruction defs. 2435def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2436def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2437def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2438def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2439 2440def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2441def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2442def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2443def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2444 2445def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2446def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2447def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2448def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2449 2450def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2451def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2452def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2453def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2454 2455def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2456def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2457def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2458def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2459 2460def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2461def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2462def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2463def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2464 2465def AND_V : AND_V_ENC, AND_V_DESC; 2466def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2467 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2468 MSA128BOpnd:$ws, 2469 MSA128BOpnd:$wt)>; 2470def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2471 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2472 MSA128BOpnd:$ws, 2473 MSA128BOpnd:$wt)>; 2474def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2475 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd, 2476 MSA128BOpnd:$ws, 2477 MSA128BOpnd:$wt)>; 2478 2479def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2480 2481def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2482def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2483def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2484def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2485 2486def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2487def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2488def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2489def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2490 2491def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2492def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2493def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2494def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2495 2496def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2497def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2498def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2499def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2500 2501def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2502def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2503def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2504def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2505 2506def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2507def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2508def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2509def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2510 2511def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2512def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2513def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2514def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2515 2516def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2517def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2518def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2519def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2520 2521def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2522def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2523def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2524def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2525 2526def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2527def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2528def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2529def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2530 2531def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2532def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2533def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2534def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2535 2536def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2537def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2538def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2539def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2540 2541def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2542 2543def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2544 2545def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2546 2547def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2548 2549def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2550def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2551def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2552def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2553 2554def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2555def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2556def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2557def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2558 2559def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2560def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2561def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2562def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2563 2564def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2565 2566def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2567 2568class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> : 2569 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt), 2570 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>, 2571 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in, 2572 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> { 2573 let Constraints = "$wd_in = $wd"; 2574} 2575 2576def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>; 2577def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>; 2578def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>; 2579def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>; 2580def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>; 2581 2582def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2583 2584def BSET_B : BSET_B_ENC, BSET_B_DESC; 2585def BSET_H : BSET_H_ENC, BSET_H_DESC; 2586def BSET_W : BSET_W_ENC, BSET_W_DESC; 2587def BSET_D : BSET_D_ENC, BSET_D_DESC; 2588 2589def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2590def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2591def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2592def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2593 2594def BZ_B : BZ_B_ENC, BZ_B_DESC; 2595def BZ_H : BZ_H_ENC, BZ_H_DESC; 2596def BZ_W : BZ_W_ENC, BZ_W_DESC; 2597def BZ_D : BZ_D_ENC, BZ_D_DESC; 2598 2599def BZ_V : BZ_V_ENC, BZ_V_DESC; 2600 2601def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2602def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2603def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2604def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2605 2606def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2607def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2608def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2609def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2610 2611def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2612 2613def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2614def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2615def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2616def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2617 2618def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2619def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2620def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2621def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2622 2623def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2624def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2625def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2626def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2627 2628def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2629def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2630def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2631def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2632 2633def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2634def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2635def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2636def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2637 2638def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2639def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2640def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2641def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2642 2643def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2644def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2645def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2646def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2647 2648def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2649def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2650def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2651def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2652 2653def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2654def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2655def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2656 2657def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2658def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2659def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2660 2661def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC; 2662def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC; 2663 2664def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2665 2666def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2667def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2668def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2669def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2670 2671def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2672def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2673def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2674def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2675 2676def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2677def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2678def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2679 2680def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2681def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2682def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2683 2684def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2685def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2686def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2687 2688def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2689def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2690def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2691 2692def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2693def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2694def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2695 2696def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2697def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2698def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2699 2700def FADD_W : FADD_W_ENC, FADD_W_DESC; 2701def FADD_D : FADD_D_ENC, FADD_D_DESC; 2702 2703def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2704def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2705 2706def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2707def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2708 2709def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2710def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2711 2712def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2713def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2714 2715def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2716def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2717 2718def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2719def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2720 2721def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2722def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2723 2724def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2725def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2726 2727def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2728def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2729 2730def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2731def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2732 2733def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2734def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2735 2736def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2737def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2738 2739def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2740def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2741 2742def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2743def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2744 2745def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2746def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2747 2748def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2749def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2750 2751def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2752def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2753 2754def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2755def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2756 2757def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2758def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2759 2760def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2761def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2762 2763def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2764def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2765 2766def FILL_B : FILL_B_ENC, FILL_B_DESC; 2767def FILL_H : FILL_H_ENC, FILL_H_DESC; 2768def FILL_W : FILL_W_ENC, FILL_W_DESC; 2769 2770def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2771def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2772 2773def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2774def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2775 2776def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2777def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2778 2779def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2780def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2781 2782def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2783def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2784 2785def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2786def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2787 2788def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2789def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2790 2791def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2792def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2793 2794def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2795def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2796 2797def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2798def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2799 2800def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2801def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2802 2803def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2804def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2805 2806def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2807def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2808 2809def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2810def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2811 2812def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2813def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2814 2815def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2816def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2817 2818def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2819def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2820 2821def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2822def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2823 2824def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2825def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2826 2827def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2828def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2829 2830def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2831def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2832 2833def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2834def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2835 2836def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2837def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2838 2839def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2840def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2841 2842def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2843def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2844 2845def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2846def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2847 2848def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2849def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2850 2851def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2852def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2853 2854def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2855def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2856 2857def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2858def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2859def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2860 2861def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2862def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2863def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2864 2865def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2866def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2867def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2868 2869def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2870def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2871def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2872 2873def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2874def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2875def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2876def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2877 2878def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2879def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2880def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2881def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2882 2883def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2884def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2885def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2886def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2887 2888def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2889def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2890def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2891def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2892 2893def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2894def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2895def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2896 2897// INSERT_FW_PSEUDO defined after INSVE_W 2898// INSERT_FD_PSEUDO defined after INSVE_D 2899 2900def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2901def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2902def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2903def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2904 2905def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC; 2906def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC; 2907 2908def LD_B: LD_B_ENC, LD_B_DESC; 2909def LD_H: LD_H_ENC, LD_H_DESC; 2910def LD_W: LD_W_ENC, LD_W_DESC; 2911def LD_D: LD_D_ENC, LD_D_DESC; 2912 2913def LDI_B : LDI_B_ENC, LDI_B_DESC; 2914def LDI_H : LDI_H_ENC, LDI_H_DESC; 2915def LDI_W : LDI_W_ENC, LDI_W_DESC; 2916def LDI_D : LDI_D_ENC, LDI_D_DESC; 2917 2918def LDX_B: LDX_B_ENC, LDX_B_DESC; 2919def LDX_H: LDX_H_ENC, LDX_H_DESC; 2920def LDX_W: LDX_W_ENC, LDX_W_DESC; 2921def LDX_D: LDX_D_ENC, LDX_D_DESC; 2922 2923def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2924def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2925 2926def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2927def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2928 2929def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2930def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2931def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2932def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2933 2934def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2935def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2936def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2937def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2938 2939def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2940def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2941def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2942def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2943 2944def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2945def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2946def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2947def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2948 2949def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2950def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2951def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2952def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2953 2954def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2955def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2956def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2957def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2958 2959def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2960def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2961def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2962def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2963 2964def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2965def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2966def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2967def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2968 2969def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2970def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2971def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2972def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2973 2974def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2975def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2976def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2977def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2978 2979def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2980def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2981def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2982def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2983 2984def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2985def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2986def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2987def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2988 2989def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2990def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2991def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2992def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2993 2994def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2995 2996def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2997def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2998 2999def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 3000def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 3001 3002def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 3003def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 3004def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 3005def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 3006 3007def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 3008def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 3009 3010def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 3011def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 3012 3013def MULV_B : MULV_B_ENC, MULV_B_DESC; 3014def MULV_H : MULV_H_ENC, MULV_H_DESC; 3015def MULV_W : MULV_W_ENC, MULV_W_DESC; 3016def MULV_D : MULV_D_ENC, MULV_D_DESC; 3017 3018def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 3019def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 3020def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 3021def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 3022 3023def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 3024def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 3025def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 3026def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 3027 3028def NOR_V : NOR_V_ENC, NOR_V_DESC; 3029def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 3030 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3031 MSA128BOpnd:$ws, 3032 MSA128BOpnd:$wt)>; 3033def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 3034 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3035 MSA128BOpnd:$ws, 3036 MSA128BOpnd:$wt)>; 3037def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 3038 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd, 3039 MSA128BOpnd:$ws, 3040 MSA128BOpnd:$wt)>; 3041 3042def NORI_B : NORI_B_ENC, NORI_B_DESC; 3043 3044def OR_V : OR_V_ENC, OR_V_DESC; 3045def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 3046 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3047 MSA128BOpnd:$ws, 3048 MSA128BOpnd:$wt)>; 3049def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 3050 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3051 MSA128BOpnd:$ws, 3052 MSA128BOpnd:$wt)>; 3053def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 3054 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd, 3055 MSA128BOpnd:$ws, 3056 MSA128BOpnd:$wt)>; 3057 3058def ORI_B : ORI_B_ENC, ORI_B_DESC; 3059 3060def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 3061def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 3062def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 3063def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 3064 3065def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 3066def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 3067def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 3068def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 3069 3070def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 3071def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 3072def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 3073def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 3074 3075def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 3076def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 3077def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 3078def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 3079 3080def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 3081def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 3082def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 3083def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 3084 3085def SHF_B : SHF_B_ENC, SHF_B_DESC; 3086def SHF_H : SHF_H_ENC, SHF_H_DESC; 3087def SHF_W : SHF_W_ENC, SHF_W_DESC; 3088 3089def SLD_B : SLD_B_ENC, SLD_B_DESC; 3090def SLD_H : SLD_H_ENC, SLD_H_DESC; 3091def SLD_W : SLD_W_ENC, SLD_W_DESC; 3092def SLD_D : SLD_D_ENC, SLD_D_DESC; 3093 3094def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 3095def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 3096def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 3097def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 3098 3099def SLL_B : SLL_B_ENC, SLL_B_DESC; 3100def SLL_H : SLL_H_ENC, SLL_H_DESC; 3101def SLL_W : SLL_W_ENC, SLL_W_DESC; 3102def SLL_D : SLL_D_ENC, SLL_D_DESC; 3103 3104def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 3105def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 3106def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 3107def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 3108 3109def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 3110def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 3111def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 3112def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 3113 3114def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 3115def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 3116def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 3117def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 3118 3119def SRA_B : SRA_B_ENC, SRA_B_DESC; 3120def SRA_H : SRA_H_ENC, SRA_H_DESC; 3121def SRA_W : SRA_W_ENC, SRA_W_DESC; 3122def SRA_D : SRA_D_ENC, SRA_D_DESC; 3123 3124def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 3125def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 3126def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 3127def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 3128 3129def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 3130def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 3131def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 3132def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 3133 3134def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 3135def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 3136def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 3137def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 3138 3139def SRL_B : SRL_B_ENC, SRL_B_DESC; 3140def SRL_H : SRL_H_ENC, SRL_H_DESC; 3141def SRL_W : SRL_W_ENC, SRL_W_DESC; 3142def SRL_D : SRL_D_ENC, SRL_D_DESC; 3143 3144def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 3145def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 3146def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 3147def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 3148 3149def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 3150def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 3151def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 3152def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 3153 3154def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 3155def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 3156def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 3157def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 3158 3159def ST_B: ST_B_ENC, ST_B_DESC; 3160def ST_H: ST_H_ENC, ST_H_DESC; 3161def ST_W: ST_W_ENC, ST_W_DESC; 3162def ST_D: ST_D_ENC, ST_D_DESC; 3163 3164def STX_B: STX_B_ENC, STX_B_DESC; 3165def STX_H: STX_H_ENC, STX_H_DESC; 3166def STX_W: STX_W_ENC, STX_W_DESC; 3167def STX_D: STX_D_ENC, STX_D_DESC; 3168 3169def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 3170def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 3171def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 3172def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 3173 3174def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 3175def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 3176def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 3177def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 3178 3179def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 3180def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 3181def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 3182def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 3183 3184def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 3185def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 3186def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 3187def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 3188 3189def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 3190def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 3191def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 3192def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 3193 3194def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 3195def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 3196def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 3197def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 3198 3199def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 3200def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 3201def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 3202def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 3203 3204def XOR_V : XOR_V_ENC, XOR_V_DESC; 3205def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 3206 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3207 MSA128BOpnd:$ws, 3208 MSA128BOpnd:$wt)>; 3209def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 3210 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3211 MSA128BOpnd:$ws, 3212 MSA128BOpnd:$wt)>; 3213def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 3214 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd, 3215 MSA128BOpnd:$ws, 3216 MSA128BOpnd:$wt)>; 3217 3218def XORI_B : XORI_B_ENC, XORI_B_DESC; 3219 3220// Patterns. 3221class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 3222 Pat<pattern, result>, Requires<pred>; 3223 3224def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 3225 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 3226 3227def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3228def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3229def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3230def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3231def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3232def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3233def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3234 3235def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3236def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3237def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3238 3239def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3240 (ST_B MSA128B:$ws, addr:$addr)>; 3241def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3242 (ST_H MSA128H:$ws, addr:$addr)>; 3243def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3244 (ST_W MSA128W:$ws, addr:$addr)>; 3245def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3246 (ST_D MSA128D:$ws, addr:$addr)>; 3247def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3248 (ST_H MSA128H:$ws, addr:$addr)>; 3249def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3250 (ST_W MSA128W:$ws, addr:$addr)>; 3251def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3252 (ST_D MSA128D:$ws, addr:$addr)>; 3253 3254def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3255 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3256def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3257 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3258def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3259 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3260 3261class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD, 3262 RegisterOperand ROWS = ROWD, 3263 InstrItinClass itin = NoItinerary> : 3264 MipsPseudo<(outs ROWD:$wd), 3265 (ins ROWS:$ws), 3266 [(set ROWD:$wd, (fabs ROWS:$ws))]> { 3267 InstrItinClass Itinerary = itin; 3268} 3269def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>, 3270 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws, 3271 MSA128WOpnd:$ws)>; 3272def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>, 3273 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws, 3274 MSA128DOpnd:$ws)>; 3275 3276class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3277 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3278 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3279 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3280 3281// These are endian-independant because the element size doesnt change 3282def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3283def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3284def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3285def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3286def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3287def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3288 3289// Little endian bitcasts are always no-ops 3290def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3291def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3292def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3293def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3294def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3295def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3296 3297def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3298def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3299def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3300def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3301def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3302 3303def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3304def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3305def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3306def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3307def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3308 3309def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3310def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3311def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3312def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3313def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3314 3315def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3316def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3317def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3318def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3319def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3320 3321def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3322def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3323def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3324def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3325def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3326 3327// Big endian bitcasts expand to shuffle instructions. 3328// This is because bitcast is defined to be a store/load sequence and the 3329// vector store/load instructions are mixed-endian with respect to the vector 3330// as a whole (little endian with respect to element order, but big endian 3331// elements). 3332 3333class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3334 RegisterClass DstRC, MSAInst Insn, 3335 RegisterClass ViaRC> : 3336 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3337 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3338 DstRC), 3339 [HasMSA, IsBE]>; 3340 3341class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3342 RegisterClass DstRC, MSAInst Insn, 3343 RegisterClass ViaRC> : 3344 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3345 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3346 DstRC), 3347 [HasMSA, IsBE]>; 3348 3349class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3350 RegisterClass DstRC> : 3351 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3352 3353class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3354 RegisterClass DstRC> : 3355 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3356 3357class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3358 RegisterClass DstRC> : 3359 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3360 (COPY_TO_REGCLASS 3361 (SHF_W 3362 (COPY_TO_REGCLASS 3363 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3364 MSA128W), 177), 3365 DstRC), 3366 [HasMSA, IsBE]>; 3367 3368class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3369 RegisterClass DstRC> : 3370 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3371 3372class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3373 RegisterClass DstRC> : 3374 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3375 3376class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3377 RegisterClass DstRC> : 3378 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3379 3380def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3381def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3382def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3383def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3384def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3385def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3386 3387def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3388def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3389def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3390def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3391def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3392 3393def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3394def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3395def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3396def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3397def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3398 3399def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3400def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3401def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3402def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3403def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3404 3405def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3406def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3407def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3408def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3409def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3410 3411def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3412def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3413def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3414def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3415def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3416 3417def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3418def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3419def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3420def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3421def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3422 3423// Pseudos used to implement BNZ.df, and BZ.df 3424 3425class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3426 RegisterClass RCWS, 3427 InstrItinClass itin = NoItinerary> : 3428 MipsPseudo<(outs GPR32:$dst), 3429 (ins RCWS:$ws), 3430 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3431 bit usesCustomInserter = 1; 3432} 3433 3434def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3435 MSA128B, NoItinerary>; 3436def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3437 MSA128H, NoItinerary>; 3438def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3439 MSA128W, NoItinerary>; 3440def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3441 MSA128D, NoItinerary>; 3442def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3443 MSA128B, NoItinerary>; 3444 3445def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3446 MSA128B, NoItinerary>; 3447def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3448 MSA128H, NoItinerary>; 3449def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3450 MSA128W, NoItinerary>; 3451def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3452 MSA128D, NoItinerary>; 3453def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3454 MSA128B, NoItinerary>; 3455