MipsMSAInstrInfo.td revision acfa5a203c01d99aac1bdc1e045c08153bcdbbf6
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 15def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 16 SDTCisInt<1>, 17 SDTCisSameAs<1, 2>, 18 SDTCisVT<3, OtherVT>]>; 19def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 20 SDTCisFP<1>, 21 SDTCisSameAs<1, 2>, 22 SDTCisVT<3, OtherVT>]>; 23 24def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 25def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 26def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 27def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 28def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp, 29 [SDNPCommutative, SDNPAssociative]>; 30def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp, 31 [SDNPCommutative, SDNPAssociative]>; 32def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp, 33 [SDNPCommutative, SDNPAssociative]>; 34def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp, 35 [SDNPCommutative, SDNPAssociative]>; 36def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 37 [SDNPCommutative, SDNPAssociative]>; 38 39def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 40def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 41 42def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 43 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 44def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 45 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 46 47// Operands 48 49def uimm3 : Operand<i32> { 50 let PrintMethod = "printUnsignedImm"; 51} 52 53def uimm4 : Operand<i32> { 54 let PrintMethod = "printUnsignedImm"; 55} 56 57def uimm8 : Operand<i32> { 58 let PrintMethod = "printUnsignedImm"; 59} 60 61def simm5 : Operand<i32>; 62 63def simm10 : Operand<i32>; 64 65def vsplat_uimm3 : Operand<vAny> { 66 let PrintMethod = "printUnsignedImm"; 67} 68 69def vsplat_uimm4 : Operand<vAny> { 70 let PrintMethod = "printUnsignedImm"; 71} 72 73def vsplat_uimm5 : Operand<vAny> { 74 let PrintMethod = "printUnsignedImm"; 75} 76 77def vsplat_uimm6 : Operand<vAny> { 78 let PrintMethod = "printUnsignedImm"; 79} 80 81def vsplat_uimm8 : Operand<vAny> { 82 let PrintMethod = "printUnsignedImm"; 83} 84 85def vsplat_simm5 : Operand<vAny>; 86 87def vsplat_simm10 : Operand<vAny>; 88 89// Pattern fragments 90def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 91 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 92def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 93 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 94def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 95 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 96 97def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 98 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 99def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 100 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 101def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 102 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 103 104def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 105 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 106def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 107 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 108def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 109 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 110 111class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 112 PatFrag<(ops node:$lhs, node:$rhs), 113 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 114 115// ISD::SETFALSE cannot occur 116def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 117def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 118def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 119def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 120def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 121def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 122def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 123def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 124def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 125def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 126def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 127def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 128def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 129def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 130def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 131def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 132def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 133def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 134def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 135def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 136def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 137def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 138def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 139def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 140def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 141def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 142def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 143def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 144// ISD::SETTRUE cannot occur 145// ISD::SETFALSE2 cannot occur 146// ISD::SETTRUE2 cannot occur 147 148class vsetcc_type<ValueType ResTy, CondCode CC> : 149 PatFrag<(ops node:$lhs, node:$rhs), 150 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 151 152def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 153def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 154def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 155def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 156def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 157def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 158def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 159def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 160def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 161def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 162def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 163def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 164def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 165def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 166def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 167def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 168def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 169def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 170def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 171def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 172 173def vsplati8 : PatFrag<(ops node:$e0), 174 (v16i8 (build_vector node:$e0, node:$e0, 175 node:$e0, node:$e0, 176 node:$e0, node:$e0, 177 node:$e0, node:$e0, 178 node:$e0, node:$e0, 179 node:$e0, node:$e0, 180 node:$e0, node:$e0, 181 node:$e0, node:$e0))>; 182def vsplati16 : PatFrag<(ops node:$e0), 183 (v8i16 (build_vector node:$e0, node:$e0, 184 node:$e0, node:$e0, 185 node:$e0, node:$e0, 186 node:$e0, node:$e0))>; 187def vsplati32 : PatFrag<(ops node:$e0), 188 (v4i32 (build_vector node:$e0, node:$e0, 189 node:$e0, node:$e0))>; 190def vsplati64 : PatFrag<(ops node:$e0), 191 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>; 192 193class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}], 194 SDNodeXForm xform = NOOP_SDNodeXForm> 195 : PatLeaf<frag, pred, xform> { 196 Operand OpClass = opclass; 197} 198 199class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn, 200 list<SDNode> roots = [], 201 list<SDNodeProperty> props = []> : 202 ComplexPattern<ty, numops, fn, roots, props> { 203 Operand OpClass = opclass; 204} 205 206def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1, 207 "selectVSplatUimm3", 208 [build_vector, bitconvert]>; 209 210def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1, 211 "selectVSplatUimm5", 212 [build_vector, bitconvert]>; 213 214def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1, 215 "selectVSplatUimm8", 216 [build_vector, bitconvert]>; 217 218def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1, 219 "selectVSplatSimm5", 220 [build_vector, bitconvert]>; 221 222def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1, 223 "selectVSplatUimm4", 224 [build_vector, bitconvert]>; 225 226def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1, 227 "selectVSplatUimm5", 228 [build_vector, bitconvert]>; 229 230def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1, 231 "selectVSplatSimm5", 232 [build_vector, bitconvert]>; 233 234def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1, 235 "selectVSplatUimm5", 236 [build_vector, bitconvert]>; 237 238def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1, 239 "selectVSplatSimm5", 240 [build_vector, bitconvert]>; 241 242def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1, 243 "selectVSplatUimm5", 244 [build_vector, bitconvert]>; 245 246def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1, 247 "selectVSplatUimm6", 248 [build_vector, bitconvert]>; 249 250def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1, 251 "selectVSplatSimm5", 252 [build_vector, bitconvert]>; 253 254// Any build_vector that is a constant splat with a value that is an exact 255// power of 2 256def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2", 257 [build_vector, bitconvert]>; 258 259// Immediates 260def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 261def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 262 263// Instruction encoding. 264class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 265class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 266class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 267class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 268 269class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 270class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 271class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 272class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 273 274class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 275class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 276class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 277class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 278 279class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 280class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 281class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 282class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 283 284class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 285class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 286class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 287class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 288 289class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 290class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 291class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 292class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 293 294class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 295 296class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 297 298class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 299class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 300class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 301class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 302 303class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 304class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 305class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 306class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 307 308class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 309class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 310class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 311class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 312 313class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 314class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 315class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 316class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 317 318class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 319class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 320class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 321class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 322 323class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 324class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 325class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 326class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 327 328class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 329class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 330class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 331class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 332 333class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 334class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 335class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 336class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 337 338class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 339class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 340class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 341class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 342 343class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 344class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 345class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 346class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 347 348class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 349class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 350class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 351class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 352 353class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 354class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 355class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 356class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 357 358class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 359 360class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 361 362class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 363 364class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 365 366class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 367class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 368class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 369class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 370 371class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 372class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 373class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 374class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 375 376class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 377class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 378class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 379class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 380 381class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 382 383class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 384 385class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 386 387class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 388class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 389class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 390class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 391 392class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 393class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 394class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 395class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 396 397class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 398class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 399class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 400class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 401 402class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 403 404class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 405class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 406class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 407class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 408 409class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 410class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 411class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 412class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 413 414class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 415 416class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 417class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 418class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 419class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 420 421class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 422class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 423class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 424class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 425 426class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 427class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 428class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 429class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 430 431class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 432class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 433class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 434class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 435 436class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 437class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 438class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 439class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 440 441class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 442class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 443class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 444class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 445 446class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 447class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 448class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 449class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 450 451class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 452class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 453class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 454class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 455 456class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 457class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 458class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 459 460class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 461class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 462class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 463 464class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 465 466class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 467class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 468class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 469class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 470 471class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 472class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 473class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 474class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 475 476class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 477class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 478class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 479 480class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 481class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 482class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 483 484class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 485class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 486class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 487 488class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 489class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 490class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 491 492class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 493class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 494class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 495 496class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 497class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 498class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 499 500class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 501class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 502 503class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 504class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 505 506class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 507class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 508 509class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 510class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 511 512class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 513class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 514 515class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 516class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 517 518class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 519class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 520 521class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 522class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 523 524class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 525class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 526 527class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 528class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 529 530class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 531class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 532 533class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 534class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 535 536class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 537class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 538 539class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 540class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 541 542class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 543class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 544 545class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 546class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 547 548class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 549class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 550 551class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 552class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 553 554class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 555class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 556 557class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 558class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 559 560class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 561class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 562 563class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 564class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 565 566class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 567class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 568class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 569 570class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 571class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 572 573class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 574class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 575 576class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 577class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 578 579class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 580class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 581 582class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 583class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 584 585class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 586class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 587 588class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 589class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 590 591class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 592class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 593 594class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 595class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 596 597class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 598class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 599 600class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 601class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 602 603class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 604class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 605 606class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 607class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 608 609class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 610class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 611 612class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 613class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 614 615class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 616class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 617 618class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 619class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 620 621class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 622class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 623 624class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 625class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 626 627class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 628class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 629 630class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 631class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 632 633class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 634class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 635 636class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 637class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 638 639class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 640class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 641 642class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 643class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 644 645class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 646class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 647 648class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 649class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 650 651class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 652class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 653 654class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 655class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 656 657class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 658class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 659class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 660 661class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 662class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 663class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 664 665class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 666class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 667class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 668 669class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 670class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 671class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 672 673class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 674class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 675class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 676class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 677 678class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 679class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 680class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 681class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 682 683class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 684class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 685class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 686class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 687 688class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 689class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 690class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 691class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 692 693class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 694class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 695class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 696 697class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 698class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 699class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 700class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 701 702class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 703class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 704class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 705class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 706 707class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 708class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 709class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 710class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 711 712class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 713class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 714class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 715class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 716 717class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 718class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 719 720class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 721class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 722 723class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 724class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 725class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 726class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 727 728class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 729class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 730class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 731class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 732 733class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 734class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 735class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 736class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 737 738class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 739class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 740class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 741class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 742 743class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 744class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 745class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 746class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 747 748class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 749class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 750class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 751class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 752 753class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 754class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 755class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 756class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 757 758class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 759class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 760class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 761class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 762 763class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 764class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 765class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 766class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 767 768class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 769class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 770class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 771class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 772 773class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 774class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 775class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 776class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 777 778class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 779class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 780class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 781class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 782 783class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 784class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 785class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 786class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 787 788class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 789 790class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 791class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 792 793class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 794class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 795 796class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 797class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 798class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 799class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 800 801class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 802class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 803 804class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 805class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 806 807class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 808class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 809class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 810class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 811 812class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 813class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 814class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 815class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 816 817class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 818class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 819class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 820class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 821 822class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 823 824class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 825 826class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 827 828class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 829 830class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 831class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 832class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 833class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 834 835class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 836class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 837class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 838class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 839 840class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 841class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 842class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 843class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 844 845class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 846class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 847class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 848class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 849 850class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 851class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 852class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 853class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 854 855class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 856class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 857class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 858 859class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 860class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 861class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 862class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 863 864class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 865class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 866class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 867class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 868 869class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 870class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 871class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 872class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 873 874class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 875class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 876class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 877class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 878 879class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 880class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 881class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 882class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 883 884class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 885class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 886class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 887class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 888 889class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 890class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 891class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 892class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 893 894class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 895class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 896class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 897class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 898 899class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 900class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 901class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 902class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 903 904class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 905class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 906class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 907class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 908 909class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 910class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 911class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 912class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 913 914class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 915class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 916class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 917class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 918 919class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 920class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 921class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 922class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 923 924class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 925class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 926class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 927class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 928 929class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 930class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 931class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 932class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 933 934class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 935class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 936class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 937class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 938 939class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 940class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 941class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 942class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 943 944class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 945class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 946class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 947class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 948 949class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 950class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 951class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 952class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 953 954class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 955class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 956class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 957class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 958 959class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 960class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 961class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 962class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 963 964class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 965class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 966class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 967class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 968 969class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 970class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 971class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 972class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 973 974class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 975 976class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 977 978// Instruction desc. 979class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 980 RegisterClass RCWD, RegisterClass RCWS = RCWD, 981 InstrItinClass itin = NoItinerary> { 982 dag OutOperandList = (outs RCWD:$wd); 983 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 984 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 985 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 986 InstrItinClass Itinerary = itin; 987} 988 989class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 990 RegisterClass RCWD, RegisterClass RCWS = RCWD, 991 InstrItinClass itin = NoItinerary> { 992 dag OutOperandList = (outs RCWD:$wd); 993 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 994 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 995 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 996 InstrItinClass Itinerary = itin; 997} 998 999class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1000 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1001 InstrItinClass itin = NoItinerary> { 1002 dag OutOperandList = (outs RCWD:$wd); 1003 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 1004 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 1005 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 1006 InstrItinClass Itinerary = itin; 1007} 1008 1009class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1010 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1011 InstrItinClass itin = NoItinerary> { 1012 dag OutOperandList = (outs RCWD:$wd); 1013 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 1014 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 1015 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 1016 InstrItinClass Itinerary = itin; 1017} 1018 1019class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1020 SplatComplexPattern SplatImm, RegisterClass RCWD, 1021 RegisterClass RCWS = RCWD, 1022 InstrItinClass itin = NoItinerary> { 1023 dag OutOperandList = (outs RCWD:$wd); 1024 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u); 1025 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u"); 1026 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))]; 1027 InstrItinClass Itinerary = itin; 1028} 1029 1030class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1031 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 1032 InstrItinClass itin = NoItinerary> { 1033 dag OutOperandList = (outs RCD:$rd); 1034 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 1035 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 1036 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 1037 InstrItinClass Itinerary = itin; 1038} 1039 1040class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1041 SplatComplexPattern SplatImm, RegisterClass RCWD, 1042 RegisterClass RCWS = RCWD, 1043 InstrItinClass itin = NoItinerary> { 1044 dag OutOperandList = (outs RCWD:$wd); 1045 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm); 1046 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm"); 1047 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))]; 1048 InstrItinClass Itinerary = itin; 1049} 1050 1051class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1052 SplatComplexPattern SplatImm, RegisterClass RCWD, 1053 RegisterClass RCWS = RCWD, 1054 InstrItinClass itin = NoItinerary> { 1055 dag OutOperandList = (outs RCWD:$wd); 1056 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8); 1057 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1058 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))]; 1059 InstrItinClass Itinerary = itin; 1060} 1061 1062// This class is deprecated and will be removed in the next few patches 1063class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1064 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1065 InstrItinClass itin = NoItinerary> { 1066 dag OutOperandList = (outs RCWD:$wd); 1067 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1068 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1069 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1070 InstrItinClass Itinerary = itin; 1071} 1072 1073class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD, 1074 InstrItinClass itin = NoItinerary> { 1075 dag OutOperandList = (outs RCWD:$wd); 1076 dag InOperandList = (ins vsplat_simm10:$i10); 1077 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1078 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp 1079 list<dag> Pattern = []; 1080 bit hasSideEffects = 0; 1081 InstrItinClass Itinerary = itin; 1082} 1083 1084class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1085 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1086 InstrItinClass itin = NoItinerary> { 1087 dag OutOperandList = (outs RCWD:$wd); 1088 dag InOperandList = (ins RCWS:$ws); 1089 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1090 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1091 InstrItinClass Itinerary = itin; 1092} 1093 1094class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT, 1095 SDPatternOperator OpNode, RegisterClass RCWD, 1096 RegisterClass RCWS = RCWD, 1097 InstrItinClass itin = NoItinerary> { 1098 dag OutOperandList = (outs RCWD:$wd); 1099 dag InOperandList = (ins RCWS:$ws); 1100 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1101 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))]; 1102 InstrItinClass Itinerary = itin; 1103} 1104 1105class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1106 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1107 InstrItinClass itin = NoItinerary> : 1108 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 1109 1110 1111class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1112 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1113 RegisterClass RCWT = RCWD, 1114 InstrItinClass itin = NoItinerary> { 1115 dag OutOperandList = (outs RCWD:$wd); 1116 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1117 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1118 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1119 InstrItinClass Itinerary = itin; 1120} 1121 1122class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1123 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1124 RegisterClass RCWT = RCWD, 1125 InstrItinClass itin = NoItinerary> { 1126 dag OutOperandList = (outs RCWD:$wd); 1127 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1128 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1129 list<dag> Pattern = [(set RCWD:$wd, 1130 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 1131 InstrItinClass Itinerary = itin; 1132 string Constraints = "$wd = $wd_in"; 1133} 1134 1135class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1136 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1137 RegisterClass RCWT = RCWD, 1138 InstrItinClass itin = NoItinerary> : 1139 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1140 1141class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1142 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1143 RegisterClass RCWT = RCWD, 1144 InstrItinClass itin = NoItinerary> : 1145 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1146 1147class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1148 dag OutOperandList = (outs); 1149 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1150 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1151 list<dag> Pattern = []; 1152 InstrItinClass Itinerary = IIBranch; 1153 bit isBranch = 1; 1154 bit isTerminator = 1; 1155 bit hasDelaySlot = 1; 1156 list<Register> Defs = [AT]; 1157} 1158 1159class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1160 RegisterClass RCD, RegisterClass RCWS, 1161 InstrItinClass itin = NoItinerary> { 1162 dag OutOperandList = (outs RCD:$wd); 1163 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1164 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1165 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1166 RCWS:$rs, 1167 immZExt6:$n))]; 1168 InstrItinClass Itinerary = itin; 1169 string Constraints = "$wd = $wd_in"; 1170} 1171 1172class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1173 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1174 InstrItinClass itin = NoItinerary> { 1175 dag OutOperandList = (outs RCWD:$wd); 1176 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1177 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1178 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1179 immZExt6:$n, 1180 RCWS:$ws))]; 1181 InstrItinClass Itinerary = itin; 1182 string Constraints = "$wd = $wd_in"; 1183} 1184 1185class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1186 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1187 RegisterClass RCWT = RCWD, 1188 InstrItinClass itin = NoItinerary> { 1189 dag OutOperandList = (outs RCWD:$wd); 1190 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1191 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1192 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1193 InstrItinClass Itinerary = itin; 1194} 1195 1196class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1197 RegisterClass RCWS = RCWD, 1198 RegisterClass RCWT = RCWD> : 1199 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1200 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1201 1202class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 1203 IsCommutable; 1204class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 1205 IsCommutable; 1206class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 1207 IsCommutable; 1208class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 1209 IsCommutable; 1210 1211class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 1212 IsCommutable; 1213class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 1214 IsCommutable; 1215class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 1216 IsCommutable; 1217class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 1218 IsCommutable; 1219 1220class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 1221 IsCommutable; 1222class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 1223 IsCommutable; 1224class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 1225 IsCommutable; 1226class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 1227 IsCommutable; 1228 1229class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 1230 IsCommutable; 1231class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 1232 IsCommutable; 1233class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 1234 IsCommutable; 1235class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 1236 IsCommutable; 1237 1238class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 1239class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1240class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1241class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1242 1243class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>; 1244class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>; 1245class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>; 1246class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>; 1247 1248class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1249class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1250class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1251class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1252 1253class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>; 1254 1255class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1256class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1257class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1258class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1259 1260class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1261class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1262class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1263class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1264 1265class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1266 IsCommutable; 1267class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1268 IsCommutable; 1269class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1270 IsCommutable; 1271class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1272 IsCommutable; 1273 1274class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1275 IsCommutable; 1276class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1277 IsCommutable; 1278class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1279 IsCommutable; 1280class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1281 IsCommutable; 1282 1283class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1284 IsCommutable; 1285class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1286 IsCommutable; 1287class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1288 IsCommutable; 1289class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1290 IsCommutable; 1291 1292class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1293 IsCommutable; 1294class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1295 IsCommutable; 1296class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1297 IsCommutable; 1298class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1299 IsCommutable; 1300 1301class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1302class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1303class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1304class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1305 1306class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1307class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1308class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1309class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1310 1311class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1312class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1313class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1314class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1315 1316class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1317 MSA128B>; 1318class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1319 MSA128H>; 1320class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1321 MSA128W>; 1322class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1323 MSA128D>; 1324 1325class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1326class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1327class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1328class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1329 1330class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1331 MSA128B>; 1332class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1333 MSA128H>; 1334class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1335 MSA128W>; 1336class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1337 MSA128D>; 1338 1339class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1340 1341class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1342 1343class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1344 1345class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1346 1347class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1348class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1349class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1350class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1351 1352class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1353class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1354class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1355class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1356 1357class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1358class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1359class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1360class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1361 1362class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1363 1364class BSEL_V_DESC { 1365 dag OutOperandList = (outs MSA128B:$wd); 1366 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt); 1367 string AsmString = "bsel.v\t$wd, $ws, $wt"; 1368 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws, 1369 MSA128B:$wt))]; 1370 InstrItinClass Itinerary = NoItinerary; 1371 string Constraints = "$wd = $wd_in"; 1372} 1373 1374class BSELI_B_DESC { 1375 dag OutOperandList = (outs MSA128B:$wd); 1376 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8); 1377 string AsmString = "bseli.b\t$wd, $ws, $u8"; 1378 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, 1379 MSA128B:$ws, 1380 vsplati8_uimm8:$u8))]; 1381 InstrItinClass Itinerary = NoItinerary; 1382 string Constraints = "$wd = $wd_in"; 1383} 1384 1385class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1386class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1387class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1388class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1389 1390class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1391class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1392class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1393class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1394 1395class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1396class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1397class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1398class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1399 1400class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1401 1402class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>, 1403 IsCommutable; 1404class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>, 1405 IsCommutable; 1406class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>, 1407 IsCommutable; 1408class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>, 1409 IsCommutable; 1410 1411class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5, 1412 MSA128B>; 1413class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5, 1414 MSA128H>; 1415class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5, 1416 MSA128W>; 1417class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5, 1418 MSA128D>; 1419 1420class CFCMSA_DESC { 1421 dag OutOperandList = (outs GPR32:$rd); 1422 dag InOperandList = (ins MSACtrl:$cs); 1423 string AsmString = "cfcmsa\t$rd, $cs"; 1424 InstrItinClass Itinerary = NoItinerary; 1425 bit hasSideEffects = 1; 1426} 1427 1428class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>; 1429class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>; 1430class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>; 1431class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>; 1432 1433class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>; 1434class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>; 1435class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>; 1436class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>; 1437 1438class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8, 1439 vsplati8_simm5, MSA128B>; 1440class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16, 1441 vsplati16_simm5, MSA128H>; 1442class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32, 1443 vsplati32_simm5, MSA128W>; 1444class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64, 1445 vsplati64_simm5, MSA128D>; 1446 1447class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, 1448 vsplati8_uimm5, MSA128B>; 1449class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, 1450 vsplati16_uimm5, MSA128H>; 1451class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, 1452 vsplati32_uimm5, MSA128W>; 1453class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, 1454 vsplati64_uimm5, MSA128D>; 1455 1456class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>; 1457class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>; 1458class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>; 1459class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>; 1460 1461class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>; 1462class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>; 1463class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>; 1464class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>; 1465 1466class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8, 1467 vsplati8_simm5, MSA128B>; 1468class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16, 1469 vsplati16_simm5, MSA128H>; 1470class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32, 1471 vsplati32_simm5, MSA128W>; 1472class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64, 1473 vsplati64_simm5, MSA128D>; 1474 1475class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, 1476 vsplati8_uimm5, MSA128B>; 1477class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, 1478 vsplati16_uimm5, MSA128H>; 1479class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, 1480 vsplati32_uimm5, MSA128W>; 1481class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, 1482 vsplati64_uimm5, MSA128D>; 1483 1484class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1485 GPR32, MSA128B>; 1486class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1487 GPR32, MSA128H>; 1488class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1489 GPR32, MSA128W>; 1490 1491class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1492 GPR32, MSA128B>; 1493class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1494 GPR32, MSA128H>; 1495class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1496 GPR32, MSA128W>; 1497 1498class CTCMSA_DESC { 1499 dag OutOperandList = (outs); 1500 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1501 string AsmString = "ctcmsa\t$cd, $rs"; 1502 InstrItinClass Itinerary = NoItinerary; 1503 bit hasSideEffects = 1; 1504} 1505 1506class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1507class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1508class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1509class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1510 1511class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1512class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1513class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1514class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1515 1516class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1517 MSA128B, MSA128B>, IsCommutable; 1518class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1519 MSA128H, MSA128H>, IsCommutable; 1520class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1521 MSA128W, MSA128W>, IsCommutable; 1522 1523class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1524 MSA128B, MSA128B>, IsCommutable; 1525class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1526 MSA128H, MSA128H>, IsCommutable; 1527class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1528 MSA128W, MSA128W>, IsCommutable; 1529 1530class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1531 MSA128H, MSA128B, MSA128B>, 1532 IsCommutable; 1533class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1534 MSA128W, MSA128H, MSA128H>, 1535 IsCommutable; 1536class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1537 MSA128D, MSA128W, MSA128W>, 1538 IsCommutable; 1539 1540class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1541 MSA128H, MSA128B, MSA128B>, 1542 IsCommutable; 1543class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1544 MSA128W, MSA128H, MSA128H>, 1545 IsCommutable; 1546class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1547 MSA128D, MSA128W, MSA128W>, 1548 IsCommutable; 1549 1550class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1551 MSA128H, MSA128B, MSA128B>; 1552class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1553 MSA128W, MSA128H, MSA128H>; 1554class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1555 MSA128D, MSA128W, MSA128W>; 1556 1557class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1558 MSA128H, MSA128B, MSA128B>; 1559class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1560 MSA128W, MSA128H, MSA128H>; 1561class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1562 MSA128D, MSA128W, MSA128W>; 1563 1564class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1565class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1566 1567class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1568 IsCommutable; 1569class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1570 IsCommutable; 1571 1572class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>, 1573 IsCommutable; 1574class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>, 1575 IsCommutable; 1576 1577class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1578 MSA128W>; 1579class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1580 MSA128D>; 1581 1582class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>; 1583class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>; 1584 1585class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>; 1586class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>; 1587 1588class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>, 1589 IsCommutable; 1590class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>, 1591 IsCommutable; 1592 1593class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>, 1594 IsCommutable; 1595class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>, 1596 IsCommutable; 1597 1598class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>, 1599 IsCommutable; 1600class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>, 1601 IsCommutable; 1602 1603class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>, 1604 IsCommutable; 1605class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>, 1606 IsCommutable; 1607 1608class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>, 1609 IsCommutable; 1610class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>, 1611 IsCommutable; 1612 1613class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>, 1614 IsCommutable; 1615class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>, 1616 IsCommutable; 1617 1618class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>, 1619 IsCommutable; 1620class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>, 1621 IsCommutable; 1622 1623class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1624class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1625 1626class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1627 MSA128H, MSA128W, MSA128W>; 1628class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1629 MSA128W, MSA128D, MSA128D>; 1630 1631class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1632class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1633 1634class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1635 MSA128W, MSA128H>; 1636class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1637 MSA128D, MSA128W>; 1638 1639class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1640 MSA128W, MSA128H>; 1641class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1642 MSA128D, MSA128W>; 1643 1644class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1645 MSA128W>; 1646class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1647 MSA128D>; 1648 1649class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1650 MSA128W>; 1651class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1652 MSA128D>; 1653 1654class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1655 MSA128W, MSA128H>; 1656class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1657 MSA128D, MSA128W>; 1658 1659class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1660 MSA128W, MSA128H>; 1661class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1662 MSA128D, MSA128W>; 1663 1664class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B, 1665 GPR32>; 1666class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H, 1667 GPR32>; 1668class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W, 1669 GPR32>; 1670 1671class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1672class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1673 1674class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1675 MSA128W>; 1676class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1677 MSA128D>; 1678 1679class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1680class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1681 1682class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1683 MSA128W>; 1684class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1685 MSA128D>; 1686 1687class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1688class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1689 1690class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1691 MSA128W>; 1692class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1693 MSA128D>; 1694 1695class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1696 MSA128W>; 1697class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1698 MSA128D>; 1699 1700class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1701class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1702 1703class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1704class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1705 1706class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1707class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1708 1709class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1710 MSA128W>; 1711class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1712 MSA128D>; 1713 1714class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1715class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1716 1717class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1718class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1719 1720class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1721class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1722 1723class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1724class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1725 1726class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1727class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1728 1729class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1730class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1731 1732class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1733class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1734 1735class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1736class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1737 1738class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1739class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1740 1741class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1742class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1743 1744class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1745class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1746 1747class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1748class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1749 1750class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1751class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1752 1753class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1754 MSA128W>; 1755class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1756 MSA128D>; 1757 1758class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1759 MSA128W>; 1760class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1761 MSA128D>; 1762 1763class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1764 MSA128W>; 1765class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1766 MSA128D>; 1767 1768class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1769 MSA128W>; 1770class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1771 MSA128D>; 1772 1773class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1774 MSA128H, MSA128W, MSA128W>; 1775class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1776 MSA128W, MSA128D, MSA128D>; 1777 1778class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1779 MSA128B, MSA128B>; 1780class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1781 MSA128H, MSA128H>; 1782class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1783 MSA128W, MSA128W>; 1784 1785class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1786 MSA128B, MSA128B>; 1787class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1788 MSA128H, MSA128H>; 1789class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1790 MSA128W, MSA128W>; 1791 1792class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1793 MSA128B, MSA128B>; 1794class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1795 MSA128H, MSA128H>; 1796class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1797 MSA128W, MSA128W>; 1798 1799class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1800 MSA128B, MSA128B>; 1801class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1802 MSA128H, MSA128H>; 1803class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1804 MSA128W, MSA128W>; 1805 1806class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1807class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1808class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1809class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1810 1811class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1812class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1813class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1814class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1815 1816class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1817class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1818class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1819class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1820 1821class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1822class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1823class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1824class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1825 1826class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1827 GPR32>; 1828class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1829 GPR32>; 1830class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1831 GPR32>; 1832 1833class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1834class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1835class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1836class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1837 1838class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1839 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 1840 ComplexPattern Addr = addrRegImm, 1841 InstrItinClass itin = NoItinerary> { 1842 dag OutOperandList = (outs RCWD:$wd); 1843 dag InOperandList = (ins MemOpnd:$addr); 1844 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1845 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1846 InstrItinClass Itinerary = itin; 1847} 1848 1849class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1850class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1851class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1852class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1853 1854class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>; 1855class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>; 1856class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>; 1857class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>; 1858 1859class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1860 ValueType TyNode, RegisterClass RCWD, 1861 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1862 InstrItinClass itin = NoItinerary> { 1863 dag OutOperandList = (outs RCWD:$wd); 1864 dag InOperandList = (ins MemOpnd:$addr); 1865 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1866 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1867 InstrItinClass Itinerary = itin; 1868} 1869 1870class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1871class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1872class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1873class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1874 1875class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1876 MSA128H>; 1877class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1878 MSA128W>; 1879 1880class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1881 MSA128H>; 1882class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1883 MSA128W>; 1884 1885class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1886class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1887class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1888class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1889 1890class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1891class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1892class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1893class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1894 1895class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>; 1896class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>; 1897class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>; 1898class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>; 1899 1900class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>; 1901class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>; 1902class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>; 1903class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>; 1904 1905class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5, 1906 MSA128B>; 1907class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5, 1908 MSA128H>; 1909class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5, 1910 MSA128W>; 1911class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5, 1912 MSA128D>; 1913 1914class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5, 1915 MSA128B>; 1916class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5, 1917 MSA128H>; 1918class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5, 1919 MSA128W>; 1920class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5, 1921 MSA128D>; 1922 1923class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1924class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1925class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1926class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1927 1928class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>; 1929class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>; 1930class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>; 1931class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>; 1932 1933class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>; 1934class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>; 1935class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>; 1936class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>; 1937 1938class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5, 1939 MSA128B>; 1940class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5, 1941 MSA128H>; 1942class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5, 1943 MSA128W>; 1944class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5, 1945 MSA128D>; 1946 1947class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5, 1948 MSA128B>; 1949class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5, 1950 MSA128H>; 1951class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5, 1952 MSA128W>; 1953class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5, 1954 MSA128D>; 1955 1956class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1957class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1958class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1959class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1960 1961class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1962class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1963class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1964class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1965 1966class MOVE_V_DESC { 1967 dag OutOperandList = (outs MSA128B:$wd); 1968 dag InOperandList = (ins MSA128B:$ws); 1969 string AsmString = "move.v\t$wd, $ws"; 1970 list<dag> Pattern = []; 1971 InstrItinClass Itinerary = NoItinerary; 1972} 1973 1974class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 1975 MSA128H>; 1976class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 1977 MSA128W>; 1978 1979class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 1980 MSA128H>; 1981class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 1982 MSA128W>; 1983 1984class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 1985class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 1986class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 1987class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 1988 1989class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 1990class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 1991 1992class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 1993 MSA128H>; 1994class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 1995 MSA128W>; 1996 1997class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 1998class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 1999class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 2000class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 2001 2002class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 2003class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 2004class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 2005class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 2006 2007class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 2008class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 2009class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 2010class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 2011 2012class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 2013class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 2014class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 2015class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 2016 2017class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8, 2018 MSA128B>; 2019 2020class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 2021class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 2022class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 2023class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 2024 2025class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>; 2026 2027class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 2028class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 2029class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 2030class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 2031 2032class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 2033class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 2034class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 2035class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 2036 2037class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 2038class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 2039class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 2040class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 2041 2042class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 2043class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 2044class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 2045class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 2046 2047class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 2048class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 2049class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 2050class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 2051 2052class SHF_B_DESC : MSA_I8_X_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>; 2053class SHF_H_DESC : MSA_I8_X_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>; 2054class SHF_W_DESC : MSA_I8_X_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>; 2055 2056class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 2057class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 2058class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 2059class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 2060 2061class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 2062class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 2063class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 2064class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 2065 2066class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 2067class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 2068class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 2069class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 2070 2071class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3, 2072 MSA128B>; 2073class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4, 2074 MSA128H>; 2075class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5, 2076 MSA128W>; 2077class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6, 2078 MSA128D>; 2079 2080class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 2081 MSA128B, GPR32>; 2082class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 2083 MSA128H, GPR32>; 2084class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 2085 MSA128W, GPR32>; 2086class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 2087 MSA128D, GPR32>; 2088 2089class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 2090 MSA128B>; 2091class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 2092 MSA128H>; 2093class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 2094 MSA128W>; 2095class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 2096 MSA128D>; 2097 2098class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 2099class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 2100class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 2101class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 2102 2103class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3, 2104 MSA128B>; 2105class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4, 2106 MSA128H>; 2107class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5, 2108 MSA128W>; 2109class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6, 2110 MSA128D>; 2111 2112class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 2113class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 2114class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 2115class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 2116 2117class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2118class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2119class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2120class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2121 2122class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 2123class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 2124class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 2125class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 2126 2127class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3, 2128 MSA128B>; 2129class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4, 2130 MSA128H>; 2131class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5, 2132 MSA128W>; 2133class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6, 2134 MSA128D>; 2135 2136class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 2137class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 2138class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 2139class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 2140 2141class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2142class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2143class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2144class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2145 2146class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2147 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem, 2148 ComplexPattern Addr = addrRegImm, 2149 InstrItinClass itin = NoItinerary> { 2150 dag OutOperandList = (outs); 2151 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2152 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2153 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2154 InstrItinClass Itinerary = itin; 2155} 2156 2157class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2158class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2159class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2160class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2161 2162class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2163 ValueType TyNode, RegisterClass RCWD, 2164 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2165 InstrItinClass itin = NoItinerary> { 2166 dag OutOperandList = (outs); 2167 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2168 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2169 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2170 InstrItinClass Itinerary = itin; 2171} 2172 2173class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2174class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2175class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2176class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2177 2178class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 2179class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 2180class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 2181class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 2182 2183class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 2184class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 2185class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 2186class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 2187 2188class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2189 MSA128B>; 2190class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2191 MSA128H>; 2192class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2193 MSA128W>; 2194class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2195 MSA128D>; 2196 2197class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2198 MSA128B>; 2199class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2200 MSA128H>; 2201class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2202 MSA128W>; 2203class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2204 MSA128D>; 2205 2206class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 2207class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 2208class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 2209class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 2210 2211class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>; 2212class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>; 2213class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>; 2214class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>; 2215 2216class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>; 2217class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>; 2218class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>; 2219class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>; 2220 2221class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2222class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2223class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2224class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2225 2226class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>; 2227 2228// Instruction defs. 2229def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2230def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2231def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2232def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2233 2234def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2235def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2236def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2237def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2238 2239def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2240def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2241def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2242def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2243 2244def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2245def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2246def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2247def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2248 2249def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2250def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2251def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2252def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2253 2254def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2255def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2256def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2257def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2258 2259def AND_V : AND_V_ENC, AND_V_DESC; 2260def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2261 PseudoInstExpansion<(AND_V MSA128B:$wd, 2262 MSA128B:$ws, MSA128B:$wt)>; 2263def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2264 PseudoInstExpansion<(AND_V MSA128B:$wd, 2265 MSA128B:$ws, MSA128B:$wt)>; 2266def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2267 PseudoInstExpansion<(AND_V MSA128B:$wd, 2268 MSA128B:$ws, MSA128B:$wt)>; 2269 2270def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2271 2272def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2273def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2274def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2275def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2276 2277def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2278def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2279def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2280def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2281 2282def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2283def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2284def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2285def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2286 2287def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2288def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2289def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2290def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2291 2292def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2293def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2294def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2295def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2296 2297def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2298def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2299def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2300def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2301 2302def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2303def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2304def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2305def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2306 2307def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2308def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2309def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2310def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2311 2312def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2313def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2314def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2315def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2316 2317def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2318def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2319def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2320def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2321 2322def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2323def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2324def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2325def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2326 2327def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2328def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2329def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2330def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2331 2332def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2333 2334def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2335 2336def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2337 2338def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2339 2340def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2341def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2342def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2343def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2344 2345def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2346def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2347def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2348def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2349 2350def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2351def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2352def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2353def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2354 2355def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2356 2357def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2358 2359class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> : 2360 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt), 2361 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>, 2362 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws, 2363 MSA128B:$wt)> { 2364 let Constraints = "$wd_in = $wd"; 2365} 2366 2367def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>; 2368def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>; 2369def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>; 2370def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>; 2371def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>; 2372 2373def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2374 2375def BSET_B : BSET_B_ENC, BSET_B_DESC; 2376def BSET_H : BSET_H_ENC, BSET_H_DESC; 2377def BSET_W : BSET_W_ENC, BSET_W_DESC; 2378def BSET_D : BSET_D_ENC, BSET_D_DESC; 2379 2380def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2381def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2382def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2383def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2384 2385def BZ_B : BZ_B_ENC, BZ_B_DESC; 2386def BZ_H : BZ_H_ENC, BZ_H_DESC; 2387def BZ_W : BZ_W_ENC, BZ_W_DESC; 2388def BZ_D : BZ_D_ENC, BZ_D_DESC; 2389 2390def BZ_V : BZ_V_ENC, BZ_V_DESC; 2391 2392def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2393def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2394def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2395def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2396 2397def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2398def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2399def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2400def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2401 2402def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2403 2404def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2405def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2406def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2407def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2408 2409def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2410def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2411def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2412def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2413 2414def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2415def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2416def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2417def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2418 2419def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2420def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2421def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2422def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2423 2424def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2425def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2426def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2427def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2428 2429def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2430def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2431def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2432def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2433 2434def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2435def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2436def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2437def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2438 2439def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2440def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2441def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2442def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2443 2444def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2445def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2446def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2447 2448def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2449def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2450def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2451 2452def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2453 2454def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2455def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2456def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2457def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2458 2459def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2460def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2461def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2462def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2463 2464def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2465def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2466def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2467 2468def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2469def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2470def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2471 2472def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2473def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2474def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2475 2476def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2477def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2478def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2479 2480def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2481def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2482def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2483 2484def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2485def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2486def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2487 2488def FADD_W : FADD_W_ENC, FADD_W_DESC; 2489def FADD_D : FADD_D_ENC, FADD_D_DESC; 2490 2491def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2492def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2493 2494def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2495def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2496 2497def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2498def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2499 2500def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2501def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2502 2503def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2504def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2505 2506def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2507def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2508 2509def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2510def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2511 2512def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2513def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2514 2515def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2516def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2517 2518def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2519def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2520 2521def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2522def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2523 2524def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2525def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2526 2527def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2528def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2529 2530def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2531def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2532 2533def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2534def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2535 2536def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2537def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2538 2539def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2540def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2541 2542def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2543def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2544 2545def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2546def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2547 2548def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2549def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2550 2551def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2552def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2553 2554def FILL_B : FILL_B_ENC, FILL_B_DESC; 2555def FILL_H : FILL_H_ENC, FILL_H_DESC; 2556def FILL_W : FILL_W_ENC, FILL_W_DESC; 2557 2558def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2559def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2560 2561def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2562def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2563 2564def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2565def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2566 2567def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2568def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2569 2570def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2571def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2572 2573def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2574def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2575 2576def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2577def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2578 2579def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2580def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2581 2582def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2583def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2584 2585def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2586def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2587 2588def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2589def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2590 2591def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2592def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2593 2594def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2595def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2596 2597def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2598def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2599 2600def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2601def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2602 2603def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2604def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2605 2606def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2607def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2608 2609def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2610def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2611 2612def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2613def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2614 2615def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2616def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2617 2618def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2619def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2620 2621def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2622def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2623 2624def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2625def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2626 2627def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2628def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2629 2630def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2631def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2632 2633def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2634def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2635 2636def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2637def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2638 2639def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2640def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2641 2642def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2643def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2644 2645def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2646def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2647def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2648 2649def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2650def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2651def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2652 2653def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2654def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2655def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2656 2657def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2658def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2659def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2660 2661def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2662def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2663def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2664def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2665 2666def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2667def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2668def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2669def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2670 2671def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2672def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2673def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2674def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2675 2676def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2677def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2678def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2679def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2680 2681def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2682def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2683def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2684 2685def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2686def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2687def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2688def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2689 2690def LD_B: LD_B_ENC, LD_B_DESC; 2691def LD_H: LD_H_ENC, LD_H_DESC; 2692def LD_W: LD_W_ENC, LD_W_DESC; 2693def LD_D: LD_D_ENC, LD_D_DESC; 2694 2695def LDI_B : LDI_B_ENC, LDI_B_DESC; 2696def LDI_H : LDI_H_ENC, LDI_H_DESC; 2697def LDI_W : LDI_W_ENC, LDI_W_DESC; 2698def LDI_D : LDI_D_ENC, LDI_D_DESC; 2699 2700def LDX_B: LDX_B_ENC, LDX_B_DESC; 2701def LDX_H: LDX_H_ENC, LDX_H_DESC; 2702def LDX_W: LDX_W_ENC, LDX_W_DESC; 2703def LDX_D: LDX_D_ENC, LDX_D_DESC; 2704 2705def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2706def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2707 2708def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2709def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2710 2711def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2712def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2713def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2714def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2715 2716def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2717def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2718def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2719def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2720 2721def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2722def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2723def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2724def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2725 2726def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2727def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2728def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2729def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2730 2731def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2732def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2733def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2734def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2735 2736def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2737def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2738def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2739def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2740 2741def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2742def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2743def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2744def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2745 2746def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2747def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2748def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2749def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2750 2751def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2752def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2753def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2754def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2755 2756def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2757def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2758def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2759def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2760 2761def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2762def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2763def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2764def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2765 2766def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2767def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2768def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2769def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2770 2771def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2772def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2773def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2774def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2775 2776def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2777 2778def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2779def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2780 2781def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2782def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2783 2784def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2785def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2786def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2787def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2788 2789def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2790def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2791 2792def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2793def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2794 2795def MULV_B : MULV_B_ENC, MULV_B_DESC; 2796def MULV_H : MULV_H_ENC, MULV_H_DESC; 2797def MULV_W : MULV_W_ENC, MULV_W_DESC; 2798def MULV_D : MULV_D_ENC, MULV_D_DESC; 2799 2800def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2801def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2802def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2803def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2804 2805def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2806def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2807def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2808def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2809 2810def NOR_V : NOR_V_ENC, NOR_V_DESC; 2811def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2812 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2813 MSA128B:$ws, MSA128B:$wt)>; 2814def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2815 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2816 MSA128B:$ws, MSA128B:$wt)>; 2817def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2818 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2819 MSA128B:$ws, MSA128B:$wt)>; 2820 2821def NORI_B : NORI_B_ENC, NORI_B_DESC; 2822 2823def OR_V : OR_V_ENC, OR_V_DESC; 2824def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2825 PseudoInstExpansion<(OR_V MSA128B:$wd, 2826 MSA128B:$ws, MSA128B:$wt)>; 2827def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2828 PseudoInstExpansion<(OR_V MSA128B:$wd, 2829 MSA128B:$ws, MSA128B:$wt)>; 2830def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2831 PseudoInstExpansion<(OR_V MSA128B:$wd, 2832 MSA128B:$ws, MSA128B:$wt)>; 2833 2834def ORI_B : ORI_B_ENC, ORI_B_DESC; 2835 2836def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2837def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2838def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2839def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2840 2841def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2842def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2843def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2844def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2845 2846def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2847def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2848def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2849def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2850 2851def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2852def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2853def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2854def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2855 2856def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2857def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2858def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2859def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2860 2861def SHF_B : SHF_B_ENC, SHF_B_DESC; 2862def SHF_H : SHF_H_ENC, SHF_H_DESC; 2863def SHF_W : SHF_W_ENC, SHF_W_DESC; 2864 2865def SLD_B : SLD_B_ENC, SLD_B_DESC; 2866def SLD_H : SLD_H_ENC, SLD_H_DESC; 2867def SLD_W : SLD_W_ENC, SLD_W_DESC; 2868def SLD_D : SLD_D_ENC, SLD_D_DESC; 2869 2870def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2871def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2872def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2873def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2874 2875def SLL_B : SLL_B_ENC, SLL_B_DESC; 2876def SLL_H : SLL_H_ENC, SLL_H_DESC; 2877def SLL_W : SLL_W_ENC, SLL_W_DESC; 2878def SLL_D : SLL_D_ENC, SLL_D_DESC; 2879 2880def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2881def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2882def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2883def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2884 2885def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2886def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2887def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2888def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2889 2890def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2891def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2892def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2893def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2894 2895def SRA_B : SRA_B_ENC, SRA_B_DESC; 2896def SRA_H : SRA_H_ENC, SRA_H_DESC; 2897def SRA_W : SRA_W_ENC, SRA_W_DESC; 2898def SRA_D : SRA_D_ENC, SRA_D_DESC; 2899 2900def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2901def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2902def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2903def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2904 2905def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2906def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2907def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2908def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2909 2910def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2911def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2912def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2913def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2914 2915def SRL_B : SRL_B_ENC, SRL_B_DESC; 2916def SRL_H : SRL_H_ENC, SRL_H_DESC; 2917def SRL_W : SRL_W_ENC, SRL_W_DESC; 2918def SRL_D : SRL_D_ENC, SRL_D_DESC; 2919 2920def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2921def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2922def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2923def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2924 2925def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2926def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2927def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2928def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2929 2930def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2931def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2932def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2933def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2934 2935def ST_B: ST_B_ENC, ST_B_DESC; 2936def ST_H: ST_H_ENC, ST_H_DESC; 2937def ST_W: ST_W_ENC, ST_W_DESC; 2938def ST_D: ST_D_ENC, ST_D_DESC; 2939 2940def STX_B: STX_B_ENC, STX_B_DESC; 2941def STX_H: STX_H_ENC, STX_H_DESC; 2942def STX_W: STX_W_ENC, STX_W_DESC; 2943def STX_D: STX_D_ENC, STX_D_DESC; 2944 2945def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2946def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2947def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2948def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2949 2950def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2951def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2952def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2953def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2954 2955def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2956def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2957def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2958def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2959 2960def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2961def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2962def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2963def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2964 2965def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2966def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2967def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2968def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2969 2970def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 2971def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 2972def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 2973def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 2974 2975def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 2976def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 2977def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 2978def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 2979 2980def XOR_V : XOR_V_ENC, XOR_V_DESC; 2981def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 2982 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2983 MSA128B:$ws, MSA128B:$wt)>; 2984def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 2985 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2986 MSA128B:$ws, MSA128B:$wt)>; 2987def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 2988 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2989 MSA128B:$ws, MSA128B:$wt)>; 2990 2991def XORI_B : XORI_B_ENC, XORI_B_DESC; 2992 2993// Patterns. 2994class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 2995 Pat<pattern, result>, Requires<pred>; 2996 2997def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 2998 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 2999 3000def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 3001def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 3002def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 3003def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 3004def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 3005def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 3006def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 3007 3008def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 3009def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 3010def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 3011 3012def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 3013 (ST_B MSA128B:$ws, addr:$addr)>; 3014def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 3015 (ST_H MSA128H:$ws, addr:$addr)>; 3016def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 3017 (ST_W MSA128W:$ws, addr:$addr)>; 3018def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 3019 (ST_D MSA128D:$ws, addr:$addr)>; 3020def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 3021 (ST_H MSA128H:$ws, addr:$addr)>; 3022def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 3023 (ST_W MSA128W:$ws, addr:$addr)>; 3024def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 3025 (ST_D MSA128D:$ws, addr:$addr)>; 3026 3027def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 3028 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 3029def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 3030 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 3031def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 3032 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 3033 3034class MSA_FABS_PSEUDO_DESC_BASE<RegisterClass RCWD, RegisterClass RCWS = RCWD, 3035 InstrItinClass itin = NoItinerary> : 3036 MipsPseudo<(outs RCWD:$wd), 3037 (ins RCWS:$ws), 3038 [(set RCWD:$wd, (fabs RCWS:$ws))]> { 3039 InstrItinClass Itinerary = itin; 3040} 3041def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128W>, 3042 PseudoInstExpansion<(FMAX_A_W MSA128W:$wd, MSA128W:$ws, 3043 MSA128W:$ws)>; 3044def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128D>, 3045 PseudoInstExpansion<(FMAX_A_D MSA128D:$wd, MSA128D:$ws, 3046 MSA128D:$ws)>; 3047 3048class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 3049 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 3050 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3051 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 3052 3053// These are endian-independant because the element size doesnt change 3054def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 3055def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 3056def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 3057def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 3058def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 3059def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 3060 3061// Little endian bitcasts are always no-ops 3062def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 3063def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 3064def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 3065def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 3066def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 3067def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 3068 3069def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 3070def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 3071def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 3072def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 3073def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 3074 3075def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 3076def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 3077def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 3078def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 3079def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 3080 3081def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 3082def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 3083def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 3084def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 3085def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 3086 3087def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 3088def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 3089def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 3090def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 3091def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 3092 3093def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 3094def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 3095def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 3096def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 3097def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 3098 3099// Big endian bitcasts expand to shuffle instructions. 3100// This is because bitcast is defined to be a store/load sequence and the 3101// vector store/load instructions are mixed-endian with respect to the vector 3102// as a whole (little endian with respect to element order, but big endian 3103// elements). 3104 3105class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 3106 RegisterClass DstRC, MSAInst Insn, 3107 RegisterClass ViaRC> : 3108 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3109 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 3110 DstRC), 3111 [HasMSA, IsBE]>; 3112 3113class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 3114 RegisterClass DstRC, MSAInst Insn, 3115 RegisterClass ViaRC> : 3116 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3117 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 3118 DstRC), 3119 [HasMSA, IsBE]>; 3120 3121class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 3122 RegisterClass DstRC> : 3123 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3124 3125class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 3126 RegisterClass DstRC> : 3127 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 3128 3129class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 3130 RegisterClass DstRC> : 3131 MSAPat<(DstVT (bitconvert SrcVT:$src)), 3132 (COPY_TO_REGCLASS 3133 (SHF_W 3134 (COPY_TO_REGCLASS 3135 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 3136 MSA128W), 177), 3137 DstRC), 3138 [HasMSA, IsBE]>; 3139 3140class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3141 RegisterClass DstRC> : 3142 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3143 3144class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3145 RegisterClass DstRC> : 3146 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3147 3148class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3149 RegisterClass DstRC> : 3150 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3151 3152def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3153def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3154def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3155def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3156def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3157def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3158 3159def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3160def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3161def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3162def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3163def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3164 3165def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3166def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3167def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3168def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3169def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3170 3171def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3172def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3173def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3174def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3175def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3176 3177def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3178def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3179def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3180def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3181def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3182 3183def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3184def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3185def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3186def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3187def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3188 3189def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3190def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3191def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3192def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3193def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3194 3195// Pseudos used to implement BNZ.df, and BZ.df 3196 3197class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3198 RegisterClass RCWS, 3199 InstrItinClass itin = NoItinerary> : 3200 MipsPseudo<(outs GPR32:$dst), 3201 (ins RCWS:$ws), 3202 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3203 bit usesCustomInserter = 1; 3204} 3205 3206def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3207 MSA128B, NoItinerary>; 3208def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3209 MSA128H, NoItinerary>; 3210def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3211 MSA128W, NoItinerary>; 3212def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3213 MSA128D, NoItinerary>; 3214def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3215 MSA128B, NoItinerary>; 3216 3217def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3218 MSA128B, NoItinerary>; 3219def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3220 MSA128H, NoItinerary>; 3221def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3222 MSA128W, NoItinerary>; 3223def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3224 MSA128D, NoItinerary>; 3225def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3226 MSA128B, NoItinerary>; 3227