MipsMSAInstrInfo.td revision ae1fb8fc19dcfd2f0e33a36f40d687b08dcc9a6b
1//===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes Mips MSA ASE instructions. 11// 12//===----------------------------------------------------------------------===// 13 14def SDT_MipsSplat : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisInt<1>]>; 15def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>; 16def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 17 SDTCisInt<1>, 18 SDTCisSameAs<1, 2>, 19 SDTCisVT<3, OtherVT>]>; 20def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>, 21 SDTCisFP<1>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, OtherVT>]>; 24 25def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>; 26def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>; 27def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>; 28def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>; 29def MipsVSplat : SDNode<"MipsISD::VSPLAT", SDT_MipsSplat>; 30def MipsVSplatD : SDNode<"MipsISD::VSPLATD", SDT_MipsSplat>; 31def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp, 32 [SDNPCommutative, SDNPAssociative]>; 33 34def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>; 35def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>; 36 37def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT", 38 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 39def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT", 40 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>; 41 42// Pattern fragments 43def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx), 44 (MipsVExtractSExt node:$vec, node:$idx, i8)>; 45def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx), 46 (MipsVExtractSExt node:$vec, node:$idx, i16)>; 47def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx), 48 (MipsVExtractSExt node:$vec, node:$idx, i32)>; 49 50def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx), 51 (MipsVExtractZExt node:$vec, node:$idx, i8)>; 52def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx), 53 (MipsVExtractZExt node:$vec, node:$idx, i16)>; 54def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx), 55 (MipsVExtractZExt node:$vec, node:$idx, i32)>; 56 57def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx), 58 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>; 59def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx), 60 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>; 61def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx), 62 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>; 63 64class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> : 65 PatFrag<(ops node:$lhs, node:$rhs), 66 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>; 67 68// ISD::SETFALSE cannot occur 69def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>; 70def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>; 71def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>; 72def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>; 73def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>; 74def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>; 75def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>; 76def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>; 77def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>; 78def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>; 79def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>; 80def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>; 81def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>; 82def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>; 83def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>; 84def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>; 85def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>; 86def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>; 87def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>; 88def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>; 89def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>; 90def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>; 91def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>; 92def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>; 93def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>; 94def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>; 95def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>; 96def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>; 97// ISD::SETTRUE cannot occur 98// ISD::SETFALSE2 cannot occur 99// ISD::SETTRUE2 cannot occur 100 101class vsetcc_type<ValueType ResTy, CondCode CC> : 102 PatFrag<(ops node:$lhs, node:$rhs), 103 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>; 104 105def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>; 106def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>; 107def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>; 108def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>; 109def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 110def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 111def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 112def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>; 113def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>; 114def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>; 115def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>; 116def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>; 117def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>; 118def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>; 119def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>; 120def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>; 121def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>; 122def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>; 123def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>; 124def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>; 125 126def vsplati8 : PatFrag<(ops node:$in), (v16i8 (MipsVSplat (i32 node:$in)))>; 127def vsplati16 : PatFrag<(ops node:$in), (v8i16 (MipsVSplat (i32 node:$in)))>; 128def vsplati32 : PatFrag<(ops node:$in), (v4i32 (MipsVSplat (i32 node:$in)))>; 129def vsplati64 : PatFrag<(ops node:$in), (v2i64 (MipsVSplatD (i32 node:$in)))>; 130 131// Immediates 132def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>; 133def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>; 134 135def uimm3 : Operand<i32> { 136 let PrintMethod = "printUnsignedImm"; 137} 138 139def uimm4 : Operand<i32> { 140 let PrintMethod = "printUnsignedImm"; 141} 142 143def uimm8 : Operand<i32> { 144 let PrintMethod = "printUnsignedImm"; 145} 146 147def simm5 : Operand<i32>; 148 149def simm10 : Operand<i32>; 150 151// Instruction encoding. 152class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>; 153class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>; 154class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>; 155class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>; 156 157class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>; 158class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>; 159class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>; 160class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>; 161 162class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>; 163class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>; 164class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>; 165class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>; 166 167class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>; 168class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>; 169class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>; 170class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>; 171 172class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>; 173class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>; 174class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>; 175class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>; 176 177class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>; 178class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>; 179class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>; 180class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>; 181 182class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>; 183 184class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>; 185 186class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>; 187class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>; 188class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>; 189class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>; 190 191class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>; 192class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>; 193class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>; 194class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>; 195 196class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>; 197class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>; 198class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>; 199class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>; 200 201class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>; 202class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>; 203class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>; 204class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>; 205 206class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>; 207class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>; 208class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>; 209class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>; 210 211class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>; 212class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>; 213class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>; 214class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>; 215 216class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>; 217class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>; 218class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>; 219class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>; 220 221class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>; 222class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>; 223class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>; 224class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>; 225 226class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>; 227class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>; 228class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>; 229class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>; 230 231class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>; 232class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>; 233class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>; 234class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>; 235 236class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>; 237class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>; 238class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>; 239class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>; 240 241class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>; 242class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>; 243class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>; 244class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>; 245 246class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>; 247 248class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>; 249 250class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>; 251 252class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>; 253 254class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>; 255class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>; 256class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>; 257class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>; 258 259class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>; 260class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>; 261class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>; 262class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>; 263 264class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>; 265class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>; 266class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>; 267class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>; 268 269class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>; 270 271class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>; 272 273class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>; 274 275class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>; 276class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>; 277class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>; 278class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>; 279 280class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>; 281class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>; 282class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>; 283class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>; 284 285class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>; 286class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>; 287class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>; 288class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>; 289 290class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>; 291 292class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>; 293class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>; 294class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>; 295class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>; 296 297class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>; 298class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>; 299class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>; 300class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>; 301 302class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>; 303 304class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>; 305class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>; 306class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>; 307class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>; 308 309class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>; 310class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>; 311class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>; 312class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>; 313 314class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>; 315class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>; 316class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>; 317class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>; 318 319class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>; 320class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>; 321class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>; 322class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>; 323 324class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>; 325class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>; 326class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>; 327class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>; 328 329class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>; 330class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>; 331class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>; 332class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>; 333 334class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>; 335class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>; 336class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>; 337class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>; 338 339class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>; 340class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; 341class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; 342class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; 343 344class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; 345class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; 346class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; 347 348class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; 349class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; 350class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; 351 352class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; 353 354class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>; 355class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>; 356class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>; 357class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>; 358 359class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>; 360class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>; 361class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>; 362class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>; 363 364class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>; 365class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>; 366class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>; 367 368class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>; 369class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>; 370class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>; 371 372class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>; 373class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>; 374class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>; 375 376class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>; 377class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>; 378class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>; 379 380class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>; 381class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>; 382class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>; 383 384class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>; 385class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>; 386class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>; 387 388class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>; 389class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>; 390 391class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>; 392class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>; 393 394class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>; 395class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>; 396 397class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>; 398class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>; 399 400class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>; 401class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>; 402 403class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>; 404class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>; 405 406class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>; 407class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>; 408 409class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>; 410class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>; 411 412class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>; 413class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>; 414 415class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>; 416class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>; 417 418class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>; 419class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>; 420 421class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>; 422class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>; 423 424class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>; 425class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>; 426 427class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>; 428class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>; 429 430class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>; 431class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>; 432 433class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>; 434class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>; 435 436class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>; 437class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>; 438 439class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>; 440class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>; 441 442class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>; 443class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>; 444 445class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>; 446class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>; 447 448class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>; 449class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>; 450 451class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>; 452class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>; 453 454class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>; 455class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>; 456class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>; 457 458class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>; 459class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>; 460 461class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>; 462class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>; 463 464class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>; 465class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>; 466 467class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>; 468class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>; 469 470class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>; 471class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>; 472 473class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>; 474class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>; 475 476class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>; 477class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>; 478 479class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>; 480class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>; 481 482class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>; 483class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>; 484 485class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>; 486class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>; 487 488class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>; 489class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>; 490 491class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>; 492class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>; 493 494class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>; 495class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>; 496 497class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>; 498class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>; 499 500class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>; 501class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>; 502 503class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>; 504class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>; 505 506class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>; 507class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>; 508 509class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>; 510class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>; 511 512class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>; 513class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>; 514 515class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>; 516class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>; 517 518class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>; 519class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>; 520 521class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>; 522class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>; 523 524class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>; 525class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>; 526 527class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>; 528class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>; 529 530class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>; 531class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>; 532 533class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>; 534class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>; 535 536class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>; 537class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>; 538 539class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>; 540class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>; 541 542class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>; 543class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>; 544 545class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>; 546class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>; 547class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>; 548 549class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>; 550class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>; 551class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>; 552 553class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>; 554class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>; 555class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>; 556 557class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>; 558class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>; 559class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>; 560 561class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>; 562class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>; 563class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>; 564class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>; 565 566class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>; 567class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>; 568class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>; 569class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>; 570 571class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>; 572class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>; 573class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>; 574class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>; 575 576class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>; 577class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>; 578class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>; 579class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>; 580 581class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>; 582class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>; 583class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>; 584 585class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>; 586class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>; 587class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>; 588class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>; 589 590class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>; 591class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>; 592class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>; 593class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>; 594 595class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>; 596class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; 597class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; 598class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; 599 600class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>; 601class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>; 602class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>; 603class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>; 604 605class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; 606class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; 607 608class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>; 609class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>; 610 611class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>; 612class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>; 613class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>; 614class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>; 615 616class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>; 617class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>; 618class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>; 619class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>; 620 621class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>; 622class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>; 623class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>; 624class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>; 625 626class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>; 627class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>; 628class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>; 629class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>; 630 631class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>; 632class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>; 633class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>; 634class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>; 635 636class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>; 637class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>; 638class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>; 639class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>; 640 641class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>; 642class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>; 643class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>; 644class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>; 645 646class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>; 647class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>; 648class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>; 649class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>; 650 651class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>; 652class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>; 653class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>; 654class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>; 655 656class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>; 657class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>; 658class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>; 659class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>; 660 661class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>; 662class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>; 663class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>; 664class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>; 665 666class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>; 667class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>; 668class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>; 669class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>; 670 671class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>; 672class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>; 673class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>; 674class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>; 675 676class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>; 677 678class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>; 679class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>; 680 681class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>; 682class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>; 683 684class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>; 685class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>; 686class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>; 687class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>; 688 689class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>; 690class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>; 691 692class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>; 693class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>; 694 695class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>; 696class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>; 697class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>; 698class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>; 699 700class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>; 701class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>; 702class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>; 703class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>; 704 705class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>; 706class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>; 707class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>; 708class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>; 709 710class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>; 711 712class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>; 713 714class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>; 715 716class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>; 717 718class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>; 719class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>; 720class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>; 721class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>; 722 723class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>; 724class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>; 725class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>; 726class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>; 727 728class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>; 729class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>; 730class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>; 731class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>; 732 733class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>; 734class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>; 735class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>; 736class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>; 737 738class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>; 739class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>; 740class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>; 741class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>; 742 743class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>; 744class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>; 745class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>; 746 747class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>; 748class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>; 749class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>; 750class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>; 751 752class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>; 753class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>; 754class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>; 755class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>; 756 757class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>; 758class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>; 759class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>; 760class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>; 761 762class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>; 763class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>; 764class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>; 765class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>; 766 767class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>; 768class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>; 769class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>; 770class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>; 771 772class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>; 773class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>; 774class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>; 775class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>; 776 777class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>; 778class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>; 779class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>; 780class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>; 781 782class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>; 783class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>; 784class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>; 785class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>; 786 787class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>; 788class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>; 789class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>; 790class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>; 791 792class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>; 793class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>; 794class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>; 795class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>; 796 797class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>; 798class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>; 799class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>; 800class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>; 801 802class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>; 803class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>; 804class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>; 805class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>; 806 807class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>; 808class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>; 809class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>; 810class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>; 811 812class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>; 813class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>; 814class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>; 815class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>; 816 817class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>; 818class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>; 819class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>; 820class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>; 821 822class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>; 823class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>; 824class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>; 825class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>; 826 827class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>; 828class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>; 829class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>; 830class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>; 831 832class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>; 833class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>; 834class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>; 835class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>; 836 837class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>; 838class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>; 839class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>; 840class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>; 841 842class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>; 843class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>; 844class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>; 845class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>; 846 847class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>; 848class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>; 849class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>; 850class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>; 851 852class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>; 853class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>; 854class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>; 855class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>; 856 857class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>; 858class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>; 859class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>; 860class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>; 861 862class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>; 863 864class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>; 865 866// Instruction desc. 867class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 868 RegisterClass RCWD, RegisterClass RCWS = RCWD, 869 InstrItinClass itin = NoItinerary> { 870 dag OutOperandList = (outs RCWD:$wd); 871 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 872 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 873 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))]; 874 InstrItinClass Itinerary = itin; 875} 876 877class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 878 RegisterClass RCWD, RegisterClass RCWS = RCWD, 879 InstrItinClass itin = NoItinerary> { 880 dag OutOperandList = (outs RCWD:$wd); 881 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 882 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 883 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))]; 884 InstrItinClass Itinerary = itin; 885} 886 887class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 888 RegisterClass RCWD, RegisterClass RCWS = RCWD, 889 InstrItinClass itin = NoItinerary> { 890 dag OutOperandList = (outs RCWD:$wd); 891 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 892 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 893 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 894 InstrItinClass Itinerary = itin; 895} 896 897class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 898 RegisterClass RCWD, RegisterClass RCWS = RCWD, 899 InstrItinClass itin = NoItinerary> { 900 dag OutOperandList = (outs RCWD:$wd); 901 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 902 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 903 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))]; 904 InstrItinClass Itinerary = itin; 905} 906 907class MSA_BIT_SPLATB_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 908 RegisterClass RCWD, RegisterClass RCWS = RCWD, 909 InstrItinClass itin = NoItinerary> { 910 dag OutOperandList = (outs RCWD:$wd); 911 dag InOperandList = (ins RCWS:$ws, uimm3:$u3); 912 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3"); 913 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 914 (vsplati8 immZExt3:$u3)))]; 915 InstrItinClass Itinerary = itin; 916} 917 918class MSA_BIT_SPLATH_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 919 RegisterClass RCWD, RegisterClass RCWS = RCWD, 920 InstrItinClass itin = NoItinerary> { 921 dag OutOperandList = (outs RCWD:$wd); 922 dag InOperandList = (ins RCWS:$ws, uimm4:$u4); 923 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4"); 924 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 925 (vsplati16 immZExt4:$u4)))]; 926 InstrItinClass Itinerary = itin; 927} 928 929class MSA_BIT_SPLATW_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 930 RegisterClass RCWD, RegisterClass RCWS = RCWD, 931 InstrItinClass itin = NoItinerary> { 932 dag OutOperandList = (outs RCWD:$wd); 933 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 934 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 935 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 936 (vsplati32 immZExt5:$u5)))]; 937 InstrItinClass Itinerary = itin; 938} 939 940class MSA_BIT_SPLATD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 941 RegisterClass RCWD, RegisterClass RCWS = RCWD, 942 InstrItinClass itin = NoItinerary> { 943 dag OutOperandList = (outs RCWD:$wd); 944 dag InOperandList = (ins RCWS:$ws, uimm6:$u6); 945 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6"); 946 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 947 (vsplati64 immZExt6:$u6)))]; 948 InstrItinClass Itinerary = itin; 949} 950 951class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 952 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS, 953 InstrItinClass itin = NoItinerary> { 954 dag OutOperandList = (outs RCD:$rd); 955 dag InOperandList = (ins RCWS:$ws, uimm4:$n); 956 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); 957 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; 958 InstrItinClass Itinerary = itin; 959} 960 961class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 962 SDPatternOperator SplatNode, RegisterClass RCWD, 963 RegisterClass RCWS = RCWD, 964 InstrItinClass itin = NoItinerary> { 965 dag OutOperandList = (outs RCWD:$wd); 966 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 967 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 968 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 969 (SplatNode immZExt5:$u5)))]; 970 InstrItinClass Itinerary = itin; 971} 972 973// This class is deprecated and will be removed in the next few changes 974class MSA_I5_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 975 RegisterClass RCWD, RegisterClass RCWS = RCWD, 976 InstrItinClass itin = NoItinerary> { 977 dag OutOperandList = (outs RCWD:$wd); 978 dag InOperandList = (ins RCWS:$ws, uimm5:$u5); 979 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5"); 980 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))]; 981 InstrItinClass Itinerary = itin; 982} 983 984class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 985 SDPatternOperator SplatNode, RegisterClass RCWD, 986 RegisterClass RCWS = RCWD, 987 InstrItinClass itin = NoItinerary> { 988 dag OutOperandList = (outs RCWD:$wd); 989 dag InOperandList = (ins RCWS:$ws, simm5:$s5); 990 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5"); 991 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, 992 (SplatNode immSExt5:$s5)))]; 993 InstrItinClass Itinerary = itin; 994} 995 996class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 997 RegisterClass RCWD, RegisterClass RCWS = RCWD, 998 InstrItinClass itin = NoItinerary> { 999 dag OutOperandList = (outs RCWD:$wd); 1000 dag InOperandList = (ins RCWS:$ws, uimm8:$u8); 1001 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8"); 1002 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))]; 1003 InstrItinClass Itinerary = itin; 1004} 1005 1006class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1007 RegisterClass RCWD, 1008 InstrItinClass itin = NoItinerary> { 1009 dag OutOperandList = (outs RCWD:$wd); 1010 dag InOperandList = (ins simm10:$i10); 1011 string AsmString = !strconcat(instr_asm, "\t$wd, $i10"); 1012 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))]; 1013 InstrItinClass Itinerary = itin; 1014} 1015 1016class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1017 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1018 InstrItinClass itin = NoItinerary> { 1019 dag OutOperandList = (outs RCWD:$wd); 1020 dag InOperandList = (ins RCWS:$ws); 1021 string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); 1022 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; 1023 InstrItinClass Itinerary = itin; 1024} 1025 1026class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1027 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1028 InstrItinClass itin = NoItinerary> : 1029 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>; 1030 1031 1032class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1033 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1034 RegisterClass RCWT = RCWD, 1035 InstrItinClass itin = NoItinerary> { 1036 dag OutOperandList = (outs RCWD:$wd); 1037 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1038 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1039 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1040 InstrItinClass Itinerary = itin; 1041} 1042 1043class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1044 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1045 RegisterClass RCWT = RCWD, 1046 InstrItinClass itin = NoItinerary> { 1047 dag OutOperandList = (outs RCWD:$wd); 1048 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt); 1049 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1050 list<dag> Pattern = [(set RCWD:$wd, 1051 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))]; 1052 InstrItinClass Itinerary = itin; 1053 string Constraints = "$wd = $wd_in"; 1054} 1055 1056class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1057 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1058 RegisterClass RCWT = RCWD, 1059 InstrItinClass itin = NoItinerary> : 1060 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1061 1062class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1063 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1064 RegisterClass RCWT = RCWD, 1065 InstrItinClass itin = NoItinerary> : 1066 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>; 1067 1068class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> { 1069 dag OutOperandList = (outs); 1070 dag InOperandList = (ins RCWD:$wd, brtarget:$offset); 1071 string AsmString = !strconcat(instr_asm, "\t$wd, $offset"); 1072 list<dag> Pattern = []; 1073 InstrItinClass Itinerary = IIBranch; 1074 bit isBranch = 1; 1075 bit isTerminator = 1; 1076 bit hasDelaySlot = 1; 1077 list<Register> Defs = [AT]; 1078} 1079 1080class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1081 RegisterClass RCD, RegisterClass RCWS, 1082 InstrItinClass itin = NoItinerary> { 1083 dag OutOperandList = (outs RCD:$wd); 1084 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n); 1085 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs"); 1086 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in, 1087 RCWS:$rs, 1088 immZExt6:$n))]; 1089 InstrItinClass Itinerary = itin; 1090 string Constraints = "$wd = $wd_in"; 1091} 1092 1093class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1094 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1095 InstrItinClass itin = NoItinerary> { 1096 dag OutOperandList = (outs RCWD:$wd); 1097 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws); 1098 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]"); 1099 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in, 1100 immZExt6:$n, 1101 RCWS:$ws))]; 1102 InstrItinClass Itinerary = itin; 1103 string Constraints = "$wd = $wd_in"; 1104} 1105 1106class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1107 RegisterClass RCWD, RegisterClass RCWS = RCWD, 1108 RegisterClass RCWT = RCWD, 1109 InstrItinClass itin = NoItinerary> { 1110 dag OutOperandList = (outs RCWD:$wd); 1111 dag InOperandList = (ins RCWS:$ws, RCWT:$wt); 1112 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt"); 1113 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]; 1114 InstrItinClass Itinerary = itin; 1115} 1116 1117class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD, 1118 RegisterClass RCWS = RCWD, 1119 RegisterClass RCWT = RCWD> : 1120 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt), 1121 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>; 1122 1123class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>, 1124 IsCommutable; 1125class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>, 1126 IsCommutable; 1127class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>, 1128 IsCommutable; 1129class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>, 1130 IsCommutable; 1131 1132class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>, 1133 IsCommutable; 1134class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>, 1135 IsCommutable; 1136class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>, 1137 IsCommutable; 1138class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>, 1139 IsCommutable; 1140 1141class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>, 1142 IsCommutable; 1143class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>, 1144 IsCommutable; 1145class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>, 1146 IsCommutable; 1147class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>, 1148 IsCommutable; 1149 1150class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>, 1151 IsCommutable; 1152class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>, 1153 IsCommutable; 1154class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>, 1155 IsCommutable; 1156class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>, 1157 IsCommutable; 1158 1159class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable; 1160class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable; 1161class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable; 1162class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable; 1163 1164class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8, MSA128B>; 1165class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16, MSA128H>; 1166class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32, MSA128W>; 1167class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64, MSA128D>; 1168 1169class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>; 1170class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>; 1171class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>; 1172class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>; 1173 1174class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>; 1175 1176class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>; 1177class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>; 1178class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>; 1179class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>; 1180 1181class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>; 1182class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>; 1183class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>; 1184class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>; 1185 1186class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>, 1187 IsCommutable; 1188class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>, 1189 IsCommutable; 1190class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>, 1191 IsCommutable; 1192class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>, 1193 IsCommutable; 1194 1195class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>, 1196 IsCommutable; 1197class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>, 1198 IsCommutable; 1199class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>, 1200 IsCommutable; 1201class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>, 1202 IsCommutable; 1203 1204class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>, 1205 IsCommutable; 1206class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>, 1207 IsCommutable; 1208class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>, 1209 IsCommutable; 1210class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>, 1211 IsCommutable; 1212 1213class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>, 1214 IsCommutable; 1215class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>, 1216 IsCommutable; 1217class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>, 1218 IsCommutable; 1219class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>, 1220 IsCommutable; 1221 1222class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>; 1223class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>; 1224class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>; 1225class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>; 1226 1227class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>; 1228class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>; 1229class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>; 1230class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>; 1231 1232class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>; 1233class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>; 1234class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>; 1235class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>; 1236 1237class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b, 1238 MSA128B>; 1239class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h, 1240 MSA128H>; 1241class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w, 1242 MSA128W>; 1243class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d, 1244 MSA128D>; 1245 1246class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>; 1247class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>; 1248class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>; 1249class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>; 1250 1251class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b, 1252 MSA128B>; 1253class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h, 1254 MSA128H>; 1255class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w, 1256 MSA128W>; 1257class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d, 1258 MSA128D>; 1259 1260class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>; 1261 1262class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>; 1263 1264class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>; 1265 1266class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>; 1267 1268class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>; 1269class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>; 1270class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>; 1271class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>; 1272 1273class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>; 1274class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>; 1275class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>; 1276class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>; 1277 1278class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>; 1279class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>; 1280class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>; 1281class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>; 1282 1283class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>; 1284 1285class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>; 1286 1287class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>; 1288 1289class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>; 1290class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>; 1291class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>; 1292class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>; 1293 1294class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>; 1295class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>; 1296class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>; 1297class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>; 1298 1299class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>; 1300class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>; 1301class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>; 1302class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>; 1303 1304class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>; 1305 1306class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>, 1307 IsCommutable; 1308class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>, 1309 IsCommutable; 1310class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>, 1311 IsCommutable; 1312class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>, 1313 IsCommutable; 1314 1315class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8, 1316 MSA128B>; 1317class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16, 1318 MSA128H>; 1319class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32, 1320 MSA128W>; 1321class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64, 1322 MSA128D>; 1323 1324class CFCMSA_DESC { 1325 dag OutOperandList = (outs GPR32:$rd); 1326 dag InOperandList = (ins MSACtrl:$cs); 1327 string AsmString = "cfcmsa\t$rd, $cs"; 1328 InstrItinClass Itinerary = NoItinerary; 1329 bit hasSideEffects = 1; 1330} 1331 1332class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>; 1333class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>; 1334class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>; 1335class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>; 1336 1337class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>; 1338class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>; 1339class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>; 1340class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>; 1341 1342class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", vsetle_v16i8, vsplati8, 1343 MSA128B>; 1344class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", vsetle_v8i16, vsplati16, 1345 MSA128H>; 1346class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", vsetle_v4i32, vsplati32, 1347 MSA128W>; 1348class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", vsetle_v2i64, vsplati64, 1349 MSA128D>; 1350 1351class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8, vsplati8, 1352 MSA128B>; 1353class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16, vsplati16, 1354 MSA128H>; 1355class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32, vsplati32, 1356 MSA128W>; 1357class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64, vsplati64, 1358 MSA128D>; 1359 1360class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>; 1361class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>; 1362class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>; 1363class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>; 1364 1365class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>; 1366class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>; 1367class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>; 1368class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>; 1369 1370class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", vsetlt_v16i8, vsplati8, 1371 MSA128B>; 1372class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", vsetlt_v8i16, vsplati16, 1373 MSA128H>; 1374class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", vsetlt_v4i32, vsplati32, 1375 MSA128W>; 1376class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", vsetlt_v2i64, vsplati64, 1377 MSA128D>; 1378 1379class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8, vsplati8, 1380 MSA128B>; 1381class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16, vsplati16, 1382 MSA128H>; 1383class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32, vsplati32, 1384 MSA128W>; 1385class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, vsplati64, 1386 MSA128D>; 1387 1388class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, 1389 GPR32, MSA128B>; 1390class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, 1391 GPR32, MSA128H>; 1392class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, 1393 GPR32, MSA128W>; 1394 1395class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, 1396 GPR32, MSA128B>; 1397class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, 1398 GPR32, MSA128H>; 1399class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, 1400 GPR32, MSA128W>; 1401 1402class CTCMSA_DESC { 1403 dag OutOperandList = (outs); 1404 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs); 1405 string AsmString = "ctcmsa\t$cd, $rs"; 1406 InstrItinClass Itinerary = NoItinerary; 1407 bit hasSideEffects = 1; 1408} 1409 1410class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>; 1411class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>; 1412class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>; 1413class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>; 1414 1415class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>; 1416class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>; 1417class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>; 1418class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>; 1419 1420class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H, 1421 MSA128B, MSA128B>, IsCommutable; 1422class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W, 1423 MSA128H, MSA128H>, IsCommutable; 1424class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D, 1425 MSA128W, MSA128W>, IsCommutable; 1426 1427class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H, 1428 MSA128B, MSA128B>, IsCommutable; 1429class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W, 1430 MSA128H, MSA128H>, IsCommutable; 1431class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D, 1432 MSA128W, MSA128W>, IsCommutable; 1433 1434class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h, 1435 MSA128H, MSA128B, MSA128B>, 1436 IsCommutable; 1437class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w, 1438 MSA128W, MSA128H, MSA128H>, 1439 IsCommutable; 1440class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d, 1441 MSA128D, MSA128W, MSA128W>, 1442 IsCommutable; 1443 1444class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h, 1445 MSA128H, MSA128B, MSA128B>, 1446 IsCommutable; 1447class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w, 1448 MSA128W, MSA128H, MSA128H>, 1449 IsCommutable; 1450class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d, 1451 MSA128D, MSA128W, MSA128W>, 1452 IsCommutable; 1453 1454class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h, 1455 MSA128H, MSA128B, MSA128B>; 1456class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w, 1457 MSA128W, MSA128H, MSA128H>; 1458class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d, 1459 MSA128D, MSA128W, MSA128W>; 1460 1461class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h, 1462 MSA128H, MSA128B, MSA128B>; 1463class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w, 1464 MSA128W, MSA128H, MSA128H>; 1465class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d, 1466 MSA128D, MSA128W, MSA128W>; 1467 1468class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable; 1469class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable; 1470 1471class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>, 1472 IsCommutable; 1473class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>, 1474 IsCommutable; 1475 1476class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>, 1477 IsCommutable; 1478class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>, 1479 IsCommutable; 1480 1481class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w, 1482 MSA128W>; 1483class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d, 1484 MSA128D>; 1485 1486class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>; 1487class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>; 1488 1489class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>; 1490class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>; 1491 1492class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>, 1493 IsCommutable; 1494class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>, 1495 IsCommutable; 1496 1497class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>, 1498 IsCommutable; 1499class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>, 1500 IsCommutable; 1501 1502class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>, 1503 IsCommutable; 1504class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>, 1505 IsCommutable; 1506 1507class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>, 1508 IsCommutable; 1509class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>, 1510 IsCommutable; 1511 1512class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>, 1513 IsCommutable; 1514class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>, 1515 IsCommutable; 1516 1517class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>, 1518 IsCommutable; 1519class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>, 1520 IsCommutable; 1521 1522class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>, 1523 IsCommutable; 1524class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>, 1525 IsCommutable; 1526 1527class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>; 1528class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>; 1529 1530class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h, 1531 MSA128H, MSA128W, MSA128W>; 1532class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w, 1533 MSA128W, MSA128D, MSA128D>; 1534 1535class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>; 1536class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>; 1537 1538class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w, 1539 MSA128W, MSA128H>; 1540class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d, 1541 MSA128D, MSA128W>; 1542 1543class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w, 1544 MSA128W, MSA128H>; 1545class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d, 1546 MSA128D, MSA128W>; 1547 1548class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w, 1549 MSA128W>; 1550class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d, 1551 MSA128D>; 1552 1553class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w, 1554 MSA128W>; 1555class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d, 1556 MSA128D>; 1557 1558class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w, 1559 MSA128W, MSA128H>; 1560class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d, 1561 MSA128D, MSA128W>; 1562 1563class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w, 1564 MSA128W, MSA128H>; 1565class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d, 1566 MSA128D, MSA128W>; 1567 1568class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", vsplati8, MSA128B, GPR32>; 1569class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", vsplati16, MSA128H, GPR32>; 1570class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", vsplati32, MSA128W, GPR32>; 1571 1572class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>; 1573class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>; 1574 1575class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w, 1576 MSA128W>; 1577class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d, 1578 MSA128D>; 1579 1580class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>; 1581class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>; 1582 1583class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w, 1584 MSA128W>; 1585class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d, 1586 MSA128D>; 1587 1588class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>; 1589class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>; 1590 1591class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w, 1592 MSA128W>; 1593class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d, 1594 MSA128D>; 1595 1596class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w, 1597 MSA128W>; 1598class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d, 1599 MSA128D>; 1600 1601class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>; 1602class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>; 1603 1604class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>; 1605class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>; 1606 1607class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>; 1608class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>; 1609 1610class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w, 1611 MSA128W>; 1612class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d, 1613 MSA128D>; 1614 1615class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>; 1616class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>; 1617 1618class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>; 1619class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>; 1620 1621class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>; 1622class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>; 1623 1624class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>; 1625class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>; 1626 1627class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>; 1628class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>; 1629 1630class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>; 1631class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>; 1632 1633class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>; 1634class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>; 1635 1636class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>; 1637class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>; 1638 1639class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>; 1640class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>; 1641 1642class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>; 1643class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>; 1644 1645class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>; 1646class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>; 1647 1648class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>; 1649class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>; 1650 1651class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>; 1652class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>; 1653 1654class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w, 1655 MSA128W>; 1656class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d, 1657 MSA128D>; 1658 1659class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w, 1660 MSA128W>; 1661class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d, 1662 MSA128D>; 1663 1664class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w, 1665 MSA128W>; 1666class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d, 1667 MSA128D>; 1668 1669class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w, 1670 MSA128W>; 1671class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d, 1672 MSA128D>; 1673 1674class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h, 1675 MSA128H, MSA128W, MSA128W>; 1676class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w, 1677 MSA128W, MSA128D, MSA128D>; 1678 1679class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H, 1680 MSA128B, MSA128B>; 1681class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W, 1682 MSA128H, MSA128H>; 1683class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D, 1684 MSA128W, MSA128W>; 1685 1686class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H, 1687 MSA128B, MSA128B>; 1688class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W, 1689 MSA128H, MSA128H>; 1690class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D, 1691 MSA128W, MSA128W>; 1692 1693class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H, 1694 MSA128B, MSA128B>; 1695class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W, 1696 MSA128H, MSA128H>; 1697class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D, 1698 MSA128W, MSA128W>; 1699 1700class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H, 1701 MSA128B, MSA128B>; 1702class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W, 1703 MSA128H, MSA128H>; 1704class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D, 1705 MSA128W, MSA128W>; 1706 1707class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>; 1708class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>; 1709class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>; 1710class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>; 1711 1712class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>; 1713class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>; 1714class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>; 1715class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>; 1716 1717class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>; 1718class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>; 1719class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>; 1720class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>; 1721 1722class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>; 1723class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>; 1724class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>; 1725class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>; 1726 1727class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B, 1728 GPR32>; 1729class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H, 1730 GPR32>; 1731class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W, 1732 GPR32>; 1733 1734class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>; 1735class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>; 1736class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>; 1737class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>; 1738 1739class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1740 ValueType TyNode, RegisterClass RCWD, 1741 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 1742 InstrItinClass itin = NoItinerary> { 1743 dag OutOperandList = (outs RCWD:$wd); 1744 dag InOperandList = (ins MemOpnd:$addr); 1745 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1746 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1747 InstrItinClass Itinerary = itin; 1748} 1749 1750class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>; 1751class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>; 1752class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>; 1753class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>; 1754 1755class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", vsplati8, MSA128B>; 1756class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", vsplati16, MSA128H>; 1757class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", vsplati32, MSA128W>; 1758class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", vsplati64, MSA128D>; 1759 1760class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 1761 ValueType TyNode, RegisterClass RCWD, 1762 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 1763 InstrItinClass itin = NoItinerary> { 1764 dag OutOperandList = (outs RCWD:$wd); 1765 dag InOperandList = (ins MemOpnd:$addr); 1766 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 1767 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))]; 1768 InstrItinClass Itinerary = itin; 1769} 1770 1771class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>; 1772class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>; 1773class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>; 1774class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>; 1775 1776class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, 1777 MSA128H>; 1778class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w, 1779 MSA128W>; 1780 1781class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h, 1782 MSA128H>; 1783class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w, 1784 MSA128W>; 1785 1786class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>; 1787class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>; 1788class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>; 1789class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>; 1790 1791class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>; 1792class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>; 1793class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>; 1794class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>; 1795 1796class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>; 1797class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>; 1798class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>; 1799class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>; 1800 1801class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>; 1802class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>; 1803class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>; 1804class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>; 1805 1806class MAXI_S_B_DESC : MSA_I5_X_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b, 1807 MSA128B>; 1808class MAXI_S_H_DESC : MSA_I5_X_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h, 1809 MSA128H>; 1810class MAXI_S_W_DESC : MSA_I5_X_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w, 1811 MSA128W>; 1812class MAXI_S_D_DESC : MSA_I5_X_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d, 1813 MSA128D>; 1814 1815class MAXI_U_B_DESC : MSA_I5_X_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b, 1816 MSA128B>; 1817class MAXI_U_H_DESC : MSA_I5_X_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h, 1818 MSA128H>; 1819class MAXI_U_W_DESC : MSA_I5_X_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w, 1820 MSA128W>; 1821class MAXI_U_D_DESC : MSA_I5_X_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d, 1822 MSA128D>; 1823 1824class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>; 1825class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>; 1826class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>; 1827class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>; 1828 1829class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>; 1830class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>; 1831class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>; 1832class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>; 1833 1834class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>; 1835class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>; 1836class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>; 1837class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>; 1838 1839class MINI_S_B_DESC : MSA_I5_X_DESC_BASE<"mini_s.b", int_mips_mini_s_b, 1840 MSA128B>; 1841class MINI_S_H_DESC : MSA_I5_X_DESC_BASE<"mini_s.h", int_mips_mini_s_h, 1842 MSA128H>; 1843class MINI_S_W_DESC : MSA_I5_X_DESC_BASE<"mini_s.w", int_mips_mini_s_w, 1844 MSA128W>; 1845class MINI_S_D_DESC : MSA_I5_X_DESC_BASE<"mini_s.d", int_mips_mini_s_d, 1846 MSA128D>; 1847 1848class MINI_U_B_DESC : MSA_I5_X_DESC_BASE<"mini_u.b", int_mips_mini_u_b, 1849 MSA128B>; 1850class MINI_U_H_DESC : MSA_I5_X_DESC_BASE<"mini_u.h", int_mips_mini_u_h, 1851 MSA128H>; 1852class MINI_U_W_DESC : MSA_I5_X_DESC_BASE<"mini_u.w", int_mips_mini_u_w, 1853 MSA128W>; 1854class MINI_U_D_DESC : MSA_I5_X_DESC_BASE<"mini_u.d", int_mips_mini_u_d, 1855 MSA128D>; 1856 1857class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>; 1858class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>; 1859class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>; 1860class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>; 1861 1862class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>; 1863class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>; 1864class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>; 1865class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>; 1866 1867class MOVE_V_DESC { 1868 dag OutOperandList = (outs MSA128B:$wd); 1869 dag InOperandList = (ins MSA128B:$ws); 1870 string AsmString = "move.v\t$wd, $ws"; 1871 list<dag> Pattern = []; 1872 InstrItinClass Itinerary = NoItinerary; 1873} 1874 1875class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h, 1876 MSA128H>; 1877class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w, 1878 MSA128W>; 1879 1880class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h, 1881 MSA128H>; 1882class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w, 1883 MSA128W>; 1884 1885class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>; 1886class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>; 1887class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>; 1888class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>; 1889 1890class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>; 1891class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>; 1892 1893class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h, 1894 MSA128H>; 1895class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w, 1896 MSA128W>; 1897 1898class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>; 1899class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>; 1900class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>; 1901class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>; 1902 1903class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; 1904class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; 1905class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; 1906class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; 1907 1908class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; 1909class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; 1910class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; 1911class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; 1912 1913class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; 1914class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>; 1915class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>; 1916class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>; 1917 1918class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>; 1919 1920class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>; 1921class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>; 1922class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>; 1923class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>; 1924 1925class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>; 1926 1927class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>; 1928class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>; 1929class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>; 1930class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>; 1931 1932class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>; 1933class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>; 1934class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>; 1935class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>; 1936 1937class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; 1938class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; 1939class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; 1940class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; 1941 1942class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; 1943class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; 1944class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>; 1945class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>; 1946 1947class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>; 1948class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>; 1949class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>; 1950class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>; 1951 1952class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>; 1953class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>; 1954class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>; 1955 1956class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>; 1957class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>; 1958class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>; 1959class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>; 1960 1961class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; 1962class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; 1963class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; 1964class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; 1965 1966class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>; 1967class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>; 1968class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>; 1969class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>; 1970 1971class SLLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"slli.b", shl, MSA128B>; 1972class SLLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"slli.h", shl, MSA128H>; 1973class SLLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"slli.w", shl, MSA128W>; 1974class SLLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"slli.d", shl, MSA128D>; 1975 1976class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B, 1977 MSA128B, GPR32>; 1978class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H, 1979 MSA128H, GPR32>; 1980class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W, 1981 MSA128W, GPR32>; 1982class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D, 1983 MSA128D, GPR32>; 1984 1985class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b, 1986 MSA128B>; 1987class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h, 1988 MSA128H>; 1989class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w, 1990 MSA128W>; 1991class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d, 1992 MSA128D>; 1993 1994class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>; 1995class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>; 1996class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>; 1997class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>; 1998 1999class SRAI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srai.b", sra, MSA128B>; 2000class SRAI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srai.h", sra, MSA128H>; 2001class SRAI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srai.w", sra, MSA128W>; 2002class SRAI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srai.d", sra, MSA128D>; 2003 2004class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>; 2005class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>; 2006class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>; 2007class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>; 2008 2009class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>; 2010class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>; 2011class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>; 2012class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>; 2013 2014class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>; 2015class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>; 2016class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>; 2017class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>; 2018 2019class SRLI_B_DESC : MSA_BIT_SPLATB_DESC_BASE<"srli.b", srl, MSA128B>; 2020class SRLI_H_DESC : MSA_BIT_SPLATH_DESC_BASE<"srli.h", srl, MSA128H>; 2021class SRLI_W_DESC : MSA_BIT_SPLATW_DESC_BASE<"srli.w", srl, MSA128W>; 2022class SRLI_D_DESC : MSA_BIT_SPLATD_DESC_BASE<"srli.d", srl, MSA128D>; 2023 2024class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>; 2025class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>; 2026class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>; 2027class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>; 2028 2029class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>; 2030class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>; 2031class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>; 2032class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>; 2033 2034class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2035 ValueType TyNode, RegisterClass RCWD, 2036 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm, 2037 InstrItinClass itin = NoItinerary> { 2038 dag OutOperandList = (outs); 2039 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2040 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2041 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2042 InstrItinClass Itinerary = itin; 2043} 2044 2045class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>; 2046class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>; 2047class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>; 2048class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>; 2049 2050class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 2051 ValueType TyNode, RegisterClass RCWD, 2052 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg, 2053 InstrItinClass itin = NoItinerary> { 2054 dag OutOperandList = (outs); 2055 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr); 2056 string AsmString = !strconcat(instr_asm, "\t$wd, $addr"); 2057 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)]; 2058 InstrItinClass Itinerary = itin; 2059} 2060 2061class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>; 2062class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>; 2063class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>; 2064class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>; 2065 2066class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>; 2067class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>; 2068class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>; 2069class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>; 2070 2071class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>; 2072class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>; 2073class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>; 2074class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>; 2075 2076class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b, 2077 MSA128B>; 2078class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h, 2079 MSA128H>; 2080class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w, 2081 MSA128W>; 2082class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d, 2083 MSA128D>; 2084 2085class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b, 2086 MSA128B>; 2087class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h, 2088 MSA128H>; 2089class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w, 2090 MSA128W>; 2091class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d, 2092 MSA128D>; 2093 2094class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>; 2095class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>; 2096class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>; 2097class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>; 2098 2099class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8, MSA128B>; 2100class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16, MSA128H>; 2101class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32, MSA128W>; 2102class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64, MSA128D>; 2103 2104class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>; 2105class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>; 2106class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>; 2107class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>; 2108 2109class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>; 2110class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>; 2111class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>; 2112class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>; 2113 2114class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>; 2115 2116// Instruction defs. 2117def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC; 2118def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC; 2119def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC; 2120def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC; 2121 2122def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC; 2123def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC; 2124def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC; 2125def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC; 2126 2127def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC; 2128def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC; 2129def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC; 2130def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC; 2131 2132def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC; 2133def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC; 2134def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC; 2135def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC; 2136 2137def ADDV_B : ADDV_B_ENC, ADDV_B_DESC; 2138def ADDV_H : ADDV_H_ENC, ADDV_H_DESC; 2139def ADDV_W : ADDV_W_ENC, ADDV_W_DESC; 2140def ADDV_D : ADDV_D_ENC, ADDV_D_DESC; 2141 2142def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC; 2143def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC; 2144def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC; 2145def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC; 2146 2147def AND_V : AND_V_ENC, AND_V_DESC; 2148def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC, 2149 PseudoInstExpansion<(AND_V MSA128B:$wd, 2150 MSA128B:$ws, MSA128B:$wt)>; 2151def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC, 2152 PseudoInstExpansion<(AND_V MSA128B:$wd, 2153 MSA128B:$ws, MSA128B:$wt)>; 2154def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC, 2155 PseudoInstExpansion<(AND_V MSA128B:$wd, 2156 MSA128B:$ws, MSA128B:$wt)>; 2157 2158def ANDI_B : ANDI_B_ENC, ANDI_B_DESC; 2159 2160def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC; 2161def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC; 2162def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC; 2163def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC; 2164 2165def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC; 2166def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC; 2167def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC; 2168def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC; 2169 2170def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC; 2171def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC; 2172def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC; 2173def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC; 2174 2175def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC; 2176def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC; 2177def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC; 2178def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC; 2179 2180def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC; 2181def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC; 2182def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC; 2183def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC; 2184 2185def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC; 2186def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC; 2187def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC; 2188def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC; 2189 2190def BCLR_B : BCLR_B_ENC, BCLR_B_DESC; 2191def BCLR_H : BCLR_H_ENC, BCLR_H_DESC; 2192def BCLR_W : BCLR_W_ENC, BCLR_W_DESC; 2193def BCLR_D : BCLR_D_ENC, BCLR_D_DESC; 2194 2195def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC; 2196def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC; 2197def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC; 2198def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC; 2199 2200def BINSL_B : BINSL_B_ENC, BINSL_B_DESC; 2201def BINSL_H : BINSL_H_ENC, BINSL_H_DESC; 2202def BINSL_W : BINSL_W_ENC, BINSL_W_DESC; 2203def BINSL_D : BINSL_D_ENC, BINSL_D_DESC; 2204 2205def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC; 2206def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC; 2207def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC; 2208def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC; 2209 2210def BINSR_B : BINSR_B_ENC, BINSR_B_DESC; 2211def BINSR_H : BINSR_H_ENC, BINSR_H_DESC; 2212def BINSR_W : BINSR_W_ENC, BINSR_W_DESC; 2213def BINSR_D : BINSR_D_ENC, BINSR_D_DESC; 2214 2215def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC; 2216def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC; 2217def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC; 2218def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC; 2219 2220def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC; 2221 2222def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC; 2223 2224def BMZ_V : BMZ_V_ENC, BMZ_V_DESC; 2225 2226def BMZI_B : BMZI_B_ENC, BMZI_B_DESC; 2227 2228def BNEG_B : BNEG_B_ENC, BNEG_B_DESC; 2229def BNEG_H : BNEG_H_ENC, BNEG_H_DESC; 2230def BNEG_W : BNEG_W_ENC, BNEG_W_DESC; 2231def BNEG_D : BNEG_D_ENC, BNEG_D_DESC; 2232 2233def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC; 2234def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC; 2235def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC; 2236def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC; 2237 2238def BNZ_B : BNZ_B_ENC, BNZ_B_DESC; 2239def BNZ_H : BNZ_H_ENC, BNZ_H_DESC; 2240def BNZ_W : BNZ_W_ENC, BNZ_W_DESC; 2241def BNZ_D : BNZ_D_ENC, BNZ_D_DESC; 2242 2243def BNZ_V : BNZ_V_ENC, BNZ_V_DESC; 2244 2245def BSEL_V : BSEL_V_ENC, BSEL_V_DESC; 2246 2247def BSELI_B : BSELI_B_ENC, BSELI_B_DESC; 2248 2249def BSET_B : BSET_B_ENC, BSET_B_DESC; 2250def BSET_H : BSET_H_ENC, BSET_H_DESC; 2251def BSET_W : BSET_W_ENC, BSET_W_DESC; 2252def BSET_D : BSET_D_ENC, BSET_D_DESC; 2253 2254def BSETI_B : BSETI_B_ENC, BSETI_B_DESC; 2255def BSETI_H : BSETI_H_ENC, BSETI_H_DESC; 2256def BSETI_W : BSETI_W_ENC, BSETI_W_DESC; 2257def BSETI_D : BSETI_D_ENC, BSETI_D_DESC; 2258 2259def BZ_B : BZ_B_ENC, BZ_B_DESC; 2260def BZ_H : BZ_H_ENC, BZ_H_DESC; 2261def BZ_W : BZ_W_ENC, BZ_W_DESC; 2262def BZ_D : BZ_D_ENC, BZ_D_DESC; 2263 2264def BZ_V : BZ_V_ENC, BZ_V_DESC; 2265 2266def CEQ_B : CEQ_B_ENC, CEQ_B_DESC; 2267def CEQ_H : CEQ_H_ENC, CEQ_H_DESC; 2268def CEQ_W : CEQ_W_ENC, CEQ_W_DESC; 2269def CEQ_D : CEQ_D_ENC, CEQ_D_DESC; 2270 2271def CEQI_B : CEQI_B_ENC, CEQI_B_DESC; 2272def CEQI_H : CEQI_H_ENC, CEQI_H_DESC; 2273def CEQI_W : CEQI_W_ENC, CEQI_W_DESC; 2274def CEQI_D : CEQI_D_ENC, CEQI_D_DESC; 2275 2276def CFCMSA : CFCMSA_ENC, CFCMSA_DESC; 2277 2278def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC; 2279def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC; 2280def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC; 2281def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC; 2282 2283def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC; 2284def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC; 2285def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC; 2286def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC; 2287 2288def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC; 2289def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC; 2290def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC; 2291def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC; 2292 2293def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC; 2294def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC; 2295def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC; 2296def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC; 2297 2298def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC; 2299def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC; 2300def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC; 2301def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC; 2302 2303def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC; 2304def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC; 2305def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC; 2306def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC; 2307 2308def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC; 2309def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC; 2310def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC; 2311def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC; 2312 2313def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC; 2314def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC; 2315def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC; 2316def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC; 2317 2318def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC; 2319def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC; 2320def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC; 2321 2322def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC; 2323def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC; 2324def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC; 2325 2326def CTCMSA : CTCMSA_ENC, CTCMSA_DESC; 2327 2328def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC; 2329def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC; 2330def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC; 2331def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC; 2332 2333def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC; 2334def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC; 2335def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC; 2336def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC; 2337 2338def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC; 2339def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC; 2340def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC; 2341 2342def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC; 2343def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC; 2344def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC; 2345 2346def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC; 2347def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC; 2348def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC; 2349 2350def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC; 2351def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC; 2352def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC; 2353 2354def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC; 2355def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC; 2356def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC; 2357 2358def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC; 2359def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC; 2360def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC; 2361 2362def FADD_W : FADD_W_ENC, FADD_W_DESC; 2363def FADD_D : FADD_D_ENC, FADD_D_DESC; 2364 2365def FCAF_W : FCAF_W_ENC, FCAF_W_DESC; 2366def FCAF_D : FCAF_D_ENC, FCAF_D_DESC; 2367 2368def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC; 2369def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC; 2370 2371def FCLE_W : FCLE_W_ENC, FCLE_W_DESC; 2372def FCLE_D : FCLE_D_ENC, FCLE_D_DESC; 2373 2374def FCLT_W : FCLT_W_ENC, FCLT_W_DESC; 2375def FCLT_D : FCLT_D_ENC, FCLT_D_DESC; 2376 2377def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC; 2378def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC; 2379 2380def FCNE_W : FCNE_W_ENC, FCNE_W_DESC; 2381def FCNE_D : FCNE_D_ENC, FCNE_D_DESC; 2382 2383def FCOR_W : FCOR_W_ENC, FCOR_W_DESC; 2384def FCOR_D : FCOR_D_ENC, FCOR_D_DESC; 2385 2386def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC; 2387def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC; 2388 2389def FCULE_W : FCULE_W_ENC, FCULE_W_DESC; 2390def FCULE_D : FCULE_D_ENC, FCULE_D_DESC; 2391 2392def FCULT_W : FCULT_W_ENC, FCULT_W_DESC; 2393def FCULT_D : FCULT_D_ENC, FCULT_D_DESC; 2394 2395def FCUN_W : FCUN_W_ENC, FCUN_W_DESC; 2396def FCUN_D : FCUN_D_ENC, FCUN_D_DESC; 2397 2398def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC; 2399def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC; 2400 2401def FDIV_W : FDIV_W_ENC, FDIV_W_DESC; 2402def FDIV_D : FDIV_D_ENC, FDIV_D_DESC; 2403 2404def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC; 2405def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC; 2406 2407def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC; 2408def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC; 2409 2410def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC; 2411def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC; 2412 2413def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC; 2414def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC; 2415 2416def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC; 2417def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC; 2418 2419def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC; 2420def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC; 2421 2422def FFQL_W : FFQL_W_ENC, FFQL_W_DESC; 2423def FFQL_D : FFQL_D_ENC, FFQL_D_DESC; 2424 2425def FFQR_W : FFQR_W_ENC, FFQR_W_DESC; 2426def FFQR_D : FFQR_D_ENC, FFQR_D_DESC; 2427 2428def FILL_B : FILL_B_ENC, FILL_B_DESC; 2429def FILL_H : FILL_H_ENC, FILL_H_DESC; 2430def FILL_W : FILL_W_ENC, FILL_W_DESC; 2431 2432def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC; 2433def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC; 2434 2435def FMADD_W : FMADD_W_ENC, FMADD_W_DESC; 2436def FMADD_D : FMADD_D_ENC, FMADD_D_DESC; 2437 2438def FMAX_W : FMAX_W_ENC, FMAX_W_DESC; 2439def FMAX_D : FMAX_D_ENC, FMAX_D_DESC; 2440 2441def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC; 2442def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC; 2443 2444def FMIN_W : FMIN_W_ENC, FMIN_W_DESC; 2445def FMIN_D : FMIN_D_ENC, FMIN_D_DESC; 2446 2447def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC; 2448def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC; 2449 2450def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC; 2451def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC; 2452 2453def FMUL_W : FMUL_W_ENC, FMUL_W_DESC; 2454def FMUL_D : FMUL_D_ENC, FMUL_D_DESC; 2455 2456def FRINT_W : FRINT_W_ENC, FRINT_W_DESC; 2457def FRINT_D : FRINT_D_ENC, FRINT_D_DESC; 2458 2459def FRCP_W : FRCP_W_ENC, FRCP_W_DESC; 2460def FRCP_D : FRCP_D_ENC, FRCP_D_DESC; 2461 2462def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC; 2463def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC; 2464 2465def FSAF_W : FSAF_W_ENC, FSAF_W_DESC; 2466def FSAF_D : FSAF_D_ENC, FSAF_D_DESC; 2467 2468def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC; 2469def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC; 2470 2471def FSLE_W : FSLE_W_ENC, FSLE_W_DESC; 2472def FSLE_D : FSLE_D_ENC, FSLE_D_DESC; 2473 2474def FSLT_W : FSLT_W_ENC, FSLT_W_DESC; 2475def FSLT_D : FSLT_D_ENC, FSLT_D_DESC; 2476 2477def FSNE_W : FSNE_W_ENC, FSNE_W_DESC; 2478def FSNE_D : FSNE_D_ENC, FSNE_D_DESC; 2479 2480def FSOR_W : FSOR_W_ENC, FSOR_W_DESC; 2481def FSOR_D : FSOR_D_ENC, FSOR_D_DESC; 2482 2483def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC; 2484def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC; 2485 2486def FSUB_W : FSUB_W_ENC, FSUB_W_DESC; 2487def FSUB_D : FSUB_D_ENC, FSUB_D_DESC; 2488 2489def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC; 2490def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC; 2491 2492def FSULE_W : FSULE_W_ENC, FSULE_W_DESC; 2493def FSULE_D : FSULE_D_ENC, FSULE_D_DESC; 2494 2495def FSULT_W : FSULT_W_ENC, FSULT_W_DESC; 2496def FSULT_D : FSULT_D_ENC, FSULT_D_DESC; 2497 2498def FSUN_W : FSUN_W_ENC, FSUN_W_DESC; 2499def FSUN_D : FSUN_D_ENC, FSUN_D_DESC; 2500 2501def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC; 2502def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC; 2503 2504def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC; 2505def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC; 2506 2507def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC; 2508def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC; 2509 2510def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC; 2511def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC; 2512 2513def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC; 2514def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC; 2515 2516def FTQ_H : FTQ_H_ENC, FTQ_H_DESC; 2517def FTQ_W : FTQ_W_ENC, FTQ_W_DESC; 2518 2519def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC; 2520def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC; 2521def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC; 2522 2523def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC; 2524def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC; 2525def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC; 2526 2527def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC; 2528def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC; 2529def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC; 2530 2531def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC; 2532def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC; 2533def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC; 2534 2535def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC; 2536def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC; 2537def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC; 2538def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC; 2539 2540def ILVL_B : ILVL_B_ENC, ILVL_B_DESC; 2541def ILVL_H : ILVL_H_ENC, ILVL_H_DESC; 2542def ILVL_W : ILVL_W_ENC, ILVL_W_DESC; 2543def ILVL_D : ILVL_D_ENC, ILVL_D_DESC; 2544 2545def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC; 2546def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC; 2547def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC; 2548def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC; 2549 2550def ILVR_B : ILVR_B_ENC, ILVR_B_DESC; 2551def ILVR_H : ILVR_H_ENC, ILVR_H_DESC; 2552def ILVR_W : ILVR_W_ENC, ILVR_W_DESC; 2553def ILVR_D : ILVR_D_ENC, ILVR_D_DESC; 2554 2555def INSERT_B : INSERT_B_ENC, INSERT_B_DESC; 2556def INSERT_H : INSERT_H_ENC, INSERT_H_DESC; 2557def INSERT_W : INSERT_W_ENC, INSERT_W_DESC; 2558 2559def INSVE_B : INSVE_B_ENC, INSVE_B_DESC; 2560def INSVE_H : INSVE_H_ENC, INSVE_H_DESC; 2561def INSVE_W : INSVE_W_ENC, INSVE_W_DESC; 2562def INSVE_D : INSVE_D_ENC, INSVE_D_DESC; 2563 2564def LD_B: LD_B_ENC, LD_B_DESC; 2565def LD_H: LD_H_ENC, LD_H_DESC; 2566def LD_W: LD_W_ENC, LD_W_DESC; 2567def LD_D: LD_D_ENC, LD_D_DESC; 2568 2569def LDI_B : LDI_B_ENC, LDI_B_DESC; 2570def LDI_H : LDI_H_ENC, LDI_H_DESC; 2571def LDI_W : LDI_W_ENC, LDI_W_DESC; 2572def LDI_D : LDI_D_ENC, LDI_D_DESC; 2573 2574def LDX_B: LDX_B_ENC, LDX_B_DESC; 2575def LDX_H: LDX_H_ENC, LDX_H_DESC; 2576def LDX_W: LDX_W_ENC, LDX_W_DESC; 2577def LDX_D: LDX_D_ENC, LDX_D_DESC; 2578 2579def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; 2580def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; 2581 2582def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC; 2583def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC; 2584 2585def MADDV_B : MADDV_B_ENC, MADDV_B_DESC; 2586def MADDV_H : MADDV_H_ENC, MADDV_H_DESC; 2587def MADDV_W : MADDV_W_ENC, MADDV_W_DESC; 2588def MADDV_D : MADDV_D_ENC, MADDV_D_DESC; 2589 2590def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC; 2591def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC; 2592def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC; 2593def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC; 2594 2595def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC; 2596def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC; 2597def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC; 2598def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC; 2599 2600def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC; 2601def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC; 2602def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC; 2603def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC; 2604 2605def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC; 2606def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC; 2607def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC; 2608def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC; 2609 2610def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC; 2611def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC; 2612def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC; 2613def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC; 2614 2615def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC; 2616def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC; 2617def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC; 2618def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC; 2619 2620def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC; 2621def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC; 2622def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC; 2623def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC; 2624 2625def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC; 2626def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC; 2627def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC; 2628def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC; 2629 2630def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC; 2631def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC; 2632def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC; 2633def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC; 2634 2635def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC; 2636def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC; 2637def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC; 2638def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC; 2639 2640def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC; 2641def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC; 2642def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC; 2643def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC; 2644 2645def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC; 2646def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC; 2647def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC; 2648def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC; 2649 2650def MOVE_V : MOVE_V_ENC, MOVE_V_DESC; 2651 2652def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC; 2653def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC; 2654 2655def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC; 2656def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC; 2657 2658def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC; 2659def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC; 2660def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC; 2661def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC; 2662 2663def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC; 2664def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC; 2665 2666def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC; 2667def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC; 2668 2669def MULV_B : MULV_B_ENC, MULV_B_DESC; 2670def MULV_H : MULV_H_ENC, MULV_H_DESC; 2671def MULV_W : MULV_W_ENC, MULV_W_DESC; 2672def MULV_D : MULV_D_ENC, MULV_D_DESC; 2673 2674def NLOC_B : NLOC_B_ENC, NLOC_B_DESC; 2675def NLOC_H : NLOC_H_ENC, NLOC_H_DESC; 2676def NLOC_W : NLOC_W_ENC, NLOC_W_DESC; 2677def NLOC_D : NLOC_D_ENC, NLOC_D_DESC; 2678 2679def NLZC_B : NLZC_B_ENC, NLZC_B_DESC; 2680def NLZC_H : NLZC_H_ENC, NLZC_H_DESC; 2681def NLZC_W : NLZC_W_ENC, NLZC_W_DESC; 2682def NLZC_D : NLZC_D_ENC, NLZC_D_DESC; 2683 2684def NOR_V : NOR_V_ENC, NOR_V_DESC; 2685def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC, 2686 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2687 MSA128B:$ws, MSA128B:$wt)>; 2688def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC, 2689 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2690 MSA128B:$ws, MSA128B:$wt)>; 2691def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC, 2692 PseudoInstExpansion<(NOR_V MSA128B:$wd, 2693 MSA128B:$ws, MSA128B:$wt)>; 2694 2695def NORI_B : NORI_B_ENC, NORI_B_DESC; 2696 2697def OR_V : OR_V_ENC, OR_V_DESC; 2698def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC, 2699 PseudoInstExpansion<(OR_V MSA128B:$wd, 2700 MSA128B:$ws, MSA128B:$wt)>; 2701def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC, 2702 PseudoInstExpansion<(OR_V MSA128B:$wd, 2703 MSA128B:$ws, MSA128B:$wt)>; 2704def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC, 2705 PseudoInstExpansion<(OR_V MSA128B:$wd, 2706 MSA128B:$ws, MSA128B:$wt)>; 2707 2708def ORI_B : ORI_B_ENC, ORI_B_DESC; 2709 2710def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC; 2711def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC; 2712def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC; 2713def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC; 2714 2715def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC; 2716def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC; 2717def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC; 2718def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC; 2719 2720def PCNT_B : PCNT_B_ENC, PCNT_B_DESC; 2721def PCNT_H : PCNT_H_ENC, PCNT_H_DESC; 2722def PCNT_W : PCNT_W_ENC, PCNT_W_DESC; 2723def PCNT_D : PCNT_D_ENC, PCNT_D_DESC; 2724 2725def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC; 2726def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC; 2727def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC; 2728def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC; 2729 2730def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC; 2731def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC; 2732def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC; 2733def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC; 2734 2735def SHF_B : SHF_B_ENC, SHF_B_DESC; 2736def SHF_H : SHF_H_ENC, SHF_H_DESC; 2737def SHF_W : SHF_W_ENC, SHF_W_DESC; 2738 2739def SLD_B : SLD_B_ENC, SLD_B_DESC; 2740def SLD_H : SLD_H_ENC, SLD_H_DESC; 2741def SLD_W : SLD_W_ENC, SLD_W_DESC; 2742def SLD_D : SLD_D_ENC, SLD_D_DESC; 2743 2744def SLDI_B : SLDI_B_ENC, SLDI_B_DESC; 2745def SLDI_H : SLDI_H_ENC, SLDI_H_DESC; 2746def SLDI_W : SLDI_W_ENC, SLDI_W_DESC; 2747def SLDI_D : SLDI_D_ENC, SLDI_D_DESC; 2748 2749def SLL_B : SLL_B_ENC, SLL_B_DESC; 2750def SLL_H : SLL_H_ENC, SLL_H_DESC; 2751def SLL_W : SLL_W_ENC, SLL_W_DESC; 2752def SLL_D : SLL_D_ENC, SLL_D_DESC; 2753 2754def SLLI_B : SLLI_B_ENC, SLLI_B_DESC; 2755def SLLI_H : SLLI_H_ENC, SLLI_H_DESC; 2756def SLLI_W : SLLI_W_ENC, SLLI_W_DESC; 2757def SLLI_D : SLLI_D_ENC, SLLI_D_DESC; 2758 2759def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC; 2760def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC; 2761def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC; 2762def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC; 2763 2764def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC; 2765def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC; 2766def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC; 2767def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC; 2768 2769def SRA_B : SRA_B_ENC, SRA_B_DESC; 2770def SRA_H : SRA_H_ENC, SRA_H_DESC; 2771def SRA_W : SRA_W_ENC, SRA_W_DESC; 2772def SRA_D : SRA_D_ENC, SRA_D_DESC; 2773 2774def SRAI_B : SRAI_B_ENC, SRAI_B_DESC; 2775def SRAI_H : SRAI_H_ENC, SRAI_H_DESC; 2776def SRAI_W : SRAI_W_ENC, SRAI_W_DESC; 2777def SRAI_D : SRAI_D_ENC, SRAI_D_DESC; 2778 2779def SRAR_B : SRAR_B_ENC, SRAR_B_DESC; 2780def SRAR_H : SRAR_H_ENC, SRAR_H_DESC; 2781def SRAR_W : SRAR_W_ENC, SRAR_W_DESC; 2782def SRAR_D : SRAR_D_ENC, SRAR_D_DESC; 2783 2784def SRARI_B : SRARI_B_ENC, SRARI_B_DESC; 2785def SRARI_H : SRARI_H_ENC, SRARI_H_DESC; 2786def SRARI_W : SRARI_W_ENC, SRARI_W_DESC; 2787def SRARI_D : SRARI_D_ENC, SRARI_D_DESC; 2788 2789def SRL_B : SRL_B_ENC, SRL_B_DESC; 2790def SRL_H : SRL_H_ENC, SRL_H_DESC; 2791def SRL_W : SRL_W_ENC, SRL_W_DESC; 2792def SRL_D : SRL_D_ENC, SRL_D_DESC; 2793 2794def SRLI_B : SRLI_B_ENC, SRLI_B_DESC; 2795def SRLI_H : SRLI_H_ENC, SRLI_H_DESC; 2796def SRLI_W : SRLI_W_ENC, SRLI_W_DESC; 2797def SRLI_D : SRLI_D_ENC, SRLI_D_DESC; 2798 2799def SRLR_B : SRLR_B_ENC, SRLR_B_DESC; 2800def SRLR_H : SRLR_H_ENC, SRLR_H_DESC; 2801def SRLR_W : SRLR_W_ENC, SRLR_W_DESC; 2802def SRLR_D : SRLR_D_ENC, SRLR_D_DESC; 2803 2804def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC; 2805def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC; 2806def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC; 2807def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC; 2808 2809def ST_B: ST_B_ENC, ST_B_DESC; 2810def ST_H: ST_H_ENC, ST_H_DESC; 2811def ST_W: ST_W_ENC, ST_W_DESC; 2812def ST_D: ST_D_ENC, ST_D_DESC; 2813 2814def STX_B: STX_B_ENC, STX_B_DESC; 2815def STX_H: STX_H_ENC, STX_H_DESC; 2816def STX_W: STX_W_ENC, STX_W_DESC; 2817def STX_D: STX_D_ENC, STX_D_DESC; 2818 2819def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC; 2820def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC; 2821def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC; 2822def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC; 2823 2824def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC; 2825def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC; 2826def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC; 2827def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC; 2828 2829def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC; 2830def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC; 2831def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC; 2832def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC; 2833 2834def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC; 2835def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC; 2836def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC; 2837def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC; 2838 2839def SUBV_B : SUBV_B_ENC, SUBV_B_DESC; 2840def SUBV_H : SUBV_H_ENC, SUBV_H_DESC; 2841def SUBV_W : SUBV_W_ENC, SUBV_W_DESC; 2842def SUBV_D : SUBV_D_ENC, SUBV_D_DESC; 2843 2844def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC; 2845def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC; 2846def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC; 2847def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC; 2848 2849def VSHF_B : VSHF_B_ENC, VSHF_B_DESC; 2850def VSHF_H : VSHF_H_ENC, VSHF_H_DESC; 2851def VSHF_W : VSHF_W_ENC, VSHF_W_DESC; 2852def VSHF_D : VSHF_D_ENC, VSHF_D_DESC; 2853 2854def XOR_V : XOR_V_ENC, XOR_V_DESC; 2855def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC, 2856 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2857 MSA128B:$ws, MSA128B:$wt)>; 2858def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC, 2859 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2860 MSA128B:$ws, MSA128B:$wt)>; 2861def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC, 2862 PseudoInstExpansion<(XOR_V MSA128B:$wd, 2863 MSA128B:$ws, MSA128B:$wt)>; 2864 2865def XORI_B : XORI_B_ENC, XORI_B_DESC; 2866 2867// Patterns. 2868class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> : 2869 Pat<pattern, result>, Requires<pred>; 2870 2871def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx), 2872 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>; 2873 2874def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>; 2875def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>; 2876def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>; 2877def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>; 2878def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>; 2879def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>; 2880def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>; 2881 2882def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>; 2883def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>; 2884def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>; 2885 2886def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr), 2887 (ST_B MSA128B:$ws, addr:$addr)>; 2888def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr), 2889 (ST_H MSA128H:$ws, addr:$addr)>; 2890def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr), 2891 (ST_W MSA128W:$ws, addr:$addr)>; 2892def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr), 2893 (ST_D MSA128D:$ws, addr:$addr)>; 2894def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr), 2895 (ST_H MSA128H:$ws, addr:$addr)>; 2896def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr), 2897 (ST_W MSA128W:$ws, addr:$addr)>; 2898def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr), 2899 (ST_D MSA128D:$ws, addr:$addr)>; 2900 2901def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr), 2902 (ST_H MSA128H:$ws, addrRegImm:$addr)>; 2903def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr), 2904 (ST_W MSA128W:$ws, addrRegImm:$addr)>; 2905def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr), 2906 (ST_D MSA128D:$ws, addrRegImm:$addr)>; 2907 2908class MSABitconvertPat<ValueType DstVT, ValueType SrcVT, 2909 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> : 2910 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2911 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>; 2912 2913// These are endian-independant because the element size doesnt change 2914def : MSABitconvertPat<v8i16, v8f16, MSA128H>; 2915def : MSABitconvertPat<v4i32, v4f32, MSA128W>; 2916def : MSABitconvertPat<v2i64, v2f64, MSA128D>; 2917def : MSABitconvertPat<v8f16, v8i16, MSA128H>; 2918def : MSABitconvertPat<v4f32, v4i32, MSA128W>; 2919def : MSABitconvertPat<v2f64, v2i64, MSA128D>; 2920 2921// Little endian bitcasts are always no-ops 2922def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>; 2923def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>; 2924def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>; 2925def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>; 2926def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>; 2927def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>; 2928 2929def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>; 2930def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>; 2931def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>; 2932def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>; 2933def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>; 2934 2935def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>; 2936def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>; 2937def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>; 2938def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>; 2939def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>; 2940 2941def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>; 2942def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>; 2943def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>; 2944def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>; 2945def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>; 2946 2947def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>; 2948def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>; 2949def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>; 2950def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>; 2951def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>; 2952 2953def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>; 2954def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>; 2955def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>; 2956def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>; 2957def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>; 2958 2959// Big endian bitcasts expand to shuffle instructions. 2960// This is because bitcast is defined to be a store/load sequence and the 2961// vector store/load instructions are mixed-endian with respect to the vector 2962// as a whole (little endian with respect to element order, but big endian 2963// elements). 2964 2965class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT, 2966 RegisterClass DstRC, MSAInst Insn, 2967 RegisterClass ViaRC> : 2968 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2969 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27), 2970 DstRC), 2971 [HasMSA, IsBE]>; 2972 2973class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT, 2974 RegisterClass DstRC, MSAInst Insn, 2975 RegisterClass ViaRC> : 2976 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2977 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177), 2978 DstRC), 2979 [HasMSA, IsBE]>; 2980 2981class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT, 2982 RegisterClass DstRC> : 2983 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2984 2985class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT, 2986 RegisterClass DstRC> : 2987 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>; 2988 2989class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT, 2990 RegisterClass DstRC> : 2991 MSAPat<(DstVT (bitconvert SrcVT:$src)), 2992 (COPY_TO_REGCLASS 2993 (SHF_W 2994 (COPY_TO_REGCLASS 2995 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27), 2996 MSA128W), 177), 2997 DstRC), 2998 [HasMSA, IsBE]>; 2999 3000class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT, 3001 RegisterClass DstRC> : 3002 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3003 3004class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT, 3005 RegisterClass DstRC> : 3006 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>; 3007 3008class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT, 3009 RegisterClass DstRC> : 3010 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>; 3011 3012def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>; 3013def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>; 3014def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>; 3015def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>; 3016def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>; 3017def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>; 3018 3019def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>; 3020def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>; 3021def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>; 3022def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>; 3023def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>; 3024 3025def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>; 3026def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>; 3027def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>; 3028def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>; 3029def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>; 3030 3031def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>; 3032def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>; 3033def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>; 3034def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>; 3035def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>; 3036 3037def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>; 3038def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>; 3039def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>; 3040def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>; 3041def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>; 3042 3043def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>; 3044def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>; 3045def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>; 3046def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>; 3047def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>; 3048 3049def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>; 3050def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>; 3051def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>; 3052def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>; 3053def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>; 3054 3055// Pseudos used to implement BNZ.df, and BZ.df 3056 3057class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode, 3058 RegisterClass RCWS, 3059 InstrItinClass itin = NoItinerary> : 3060 MipsPseudo<(outs GPR32:$dst), 3061 (ins RCWS:$ws), 3062 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> { 3063 bit usesCustomInserter = 1; 3064} 3065 3066def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8, 3067 MSA128B, NoItinerary>; 3068def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16, 3069 MSA128H, NoItinerary>; 3070def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32, 3071 MSA128W, NoItinerary>; 3072def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64, 3073 MSA128D, NoItinerary>; 3074def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8, 3075 MSA128B, NoItinerary>; 3076 3077def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8, 3078 MSA128B, NoItinerary>; 3079def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16, 3080 MSA128H, NoItinerary>; 3081def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32, 3082 MSA128W, NoItinerary>; 3083def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64, 3084 MSA128D, NoItinerary>; 3085def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8, 3086 MSA128B, NoItinerary>; 3087